forked from luck/tmp_suning_uos_patched
KVM: x86: Restore all 64 bits of DR6 and DR7 during RSM on x86-64
[ Upstream commit 2644312052d54e2e7543c7d186899a36ed22f0bf ]
Restore the full 64-bit values of DR6 and DR7 when emulating RSM on
x86-64, as defined by both Intel's SDM and AMD's APM.
Note, bits 63:32 of DR6 and DR7 are reserved, so this is a glorified nop
unless the SMM handler is poking into SMRAM, which it most definitely
shouldn't be doing since both Intel and AMD list the DR6 and DR7 fields
as read-only.
Fixes: 660a5d517a
("KVM: x86: save/load state on SMM switch")
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210205012458.3872687-3-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -2564,12 +2564,12 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
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ctxt->_eip = GET_SMSTATE(u64, smstate, 0x7f78);
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ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED;
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val = GET_SMSTATE(u32, smstate, 0x7f68);
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val = GET_SMSTATE(u64, smstate, 0x7f68);
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if (ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1))
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return X86EMUL_UNHANDLEABLE;
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val = GET_SMSTATE(u32, smstate, 0x7f60);
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val = GET_SMSTATE(u64, smstate, 0x7f60);
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if (ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1))
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return X86EMUL_UNHANDLEABLE;
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