forked from luck/tmp_suning_uos_patched
add NAPI support to sb1250-mac.c
Patch to add NAPI support to sb1250-mac.c (rev 2). This patch differs from the last in that the NAPI support isn't marked as experimental, nor is it configurable (ie. once applied - NAPI is enabled all the time). This was based on feedback from Ralf and others. Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
parent
55e924cf57
commit
693aa9470d
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@ -95,19 +95,28 @@ MODULE_PARM_DESC(full_duplex, "1-" __MODULE_STRING(MAX_UNITS));
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#endif
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#ifdef CONFIG_SBMAC_COALESCE
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static int int_pktcnt = 0;
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module_param(int_pktcnt, int, S_IRUGO);
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MODULE_PARM_DESC(int_pktcnt, "Packet count");
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static int int_pktcnt_tx = 255;
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module_param(int_pktcnt_tx, int, S_IRUGO);
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MODULE_PARM_DESC(int_pktcnt_tx, "TX packet count");
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static int int_timeout = 0;
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module_param(int_timeout, int, S_IRUGO);
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MODULE_PARM_DESC(int_timeout, "Timeout value");
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static int int_timeout_tx = 255;
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module_param(int_timeout_tx, int, S_IRUGO);
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MODULE_PARM_DESC(int_timeout_tx, "TX timeout value");
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static int int_pktcnt_rx = 64;
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module_param(int_pktcnt_rx, int, S_IRUGO);
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MODULE_PARM_DESC(int_pktcnt_rx, "RX packet count");
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static int int_timeout_rx = 64;
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module_param(int_timeout_rx, int, S_IRUGO);
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MODULE_PARM_DESC(int_timeout_rx, "RX timeout value");
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#endif
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#include <asm/sibyte/sb1250.h>
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#include <asm/sibyte/bcm1480_regs.h>
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#include <asm/sibyte/bcm1480_int.h>
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#define R_MAC_DMA_OODPKTLOST_RX R_MAC_DMA_OODPKTLOST
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#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_int.h>
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@ -155,8 +164,8 @@ typedef enum { sbmac_state_uninit, sbmac_state_off, sbmac_state_on,
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#define NUMCACHEBLKS(x) (((x)+SMP_CACHE_BYTES-1)/SMP_CACHE_BYTES)
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#define SBMAC_MAX_TXDESCR 32
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#define SBMAC_MAX_RXDESCR 32
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#define SBMAC_MAX_TXDESCR 256
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#define SBMAC_MAX_RXDESCR 256
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#define ETHER_ALIGN 2
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#define ETHER_ADDR_LEN 6
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@ -185,10 +194,10 @@ typedef struct sbmacdma_s {
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* associated with it.
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*/
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struct sbmac_softc *sbdma_eth; /* back pointer to associated MAC */
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int sbdma_channel; /* channel number */
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struct sbmac_softc *sbdma_eth; /* back pointer to associated MAC */
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int sbdma_channel; /* channel number */
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int sbdma_txdir; /* direction (1=transmit) */
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int sbdma_maxdescr; /* total # of descriptors in ring */
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int sbdma_maxdescr; /* total # of descriptors in ring */
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#ifdef CONFIG_SBMAC_COALESCE
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int sbdma_int_pktcnt; /* # descriptors rx/tx before interrupt*/
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int sbdma_int_timeout; /* # usec rx/tx interrupt */
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@ -197,13 +206,16 @@ typedef struct sbmacdma_s {
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volatile void __iomem *sbdma_config0; /* DMA config register 0 */
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volatile void __iomem *sbdma_config1; /* DMA config register 1 */
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volatile void __iomem *sbdma_dscrbase; /* Descriptor base address */
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volatile void __iomem *sbdma_dscrcnt; /* Descriptor count register */
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volatile void __iomem *sbdma_dscrcnt; /* Descriptor count register */
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volatile void __iomem *sbdma_curdscr; /* current descriptor address */
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volatile void __iomem *sbdma_oodpktlost;/* pkt drop (rx only) */
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/*
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* This stuff is for maintenance of the ring
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*/
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sbdmadscr_t *sbdma_dscrtable_unaligned;
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sbdmadscr_t *sbdma_dscrtable; /* base of descriptor table */
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sbdmadscr_t *sbdma_dscrtable_end; /* end of descriptor table */
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@ -286,8 +298,8 @@ static int sbdma_add_rcvbuffer(sbmacdma_t *d,struct sk_buff *m);
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static int sbdma_add_txbuffer(sbmacdma_t *d,struct sk_buff *m);
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static void sbdma_emptyring(sbmacdma_t *d);
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static void sbdma_fillring(sbmacdma_t *d);
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static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d);
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static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d);
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static int sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d, int work_to_do, int poll);
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static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d, int poll);
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static int sbmac_initctx(struct sbmac_softc *s);
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static void sbmac_channel_start(struct sbmac_softc *s);
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static void sbmac_channel_stop(struct sbmac_softc *s);
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@ -308,6 +320,8 @@ static struct net_device_stats *sbmac_get_stats(struct net_device *dev);
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static void sbmac_set_rx_mode(struct net_device *dev);
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static int sbmac_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
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static int sbmac_close(struct net_device *dev);
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static int sbmac_poll(struct net_device *poll_dev, int *budget);
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static int sbmac_mii_poll(struct sbmac_softc *s,int noisy);
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static int sbmac_mii_probe(struct net_device *dev);
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@ -679,6 +693,10 @@ static void sbdma_initctx(sbmacdma_t *d,
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int txrx,
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int maxdescr)
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{
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#ifdef CONFIG_SBMAC_COALESCE
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int int_pktcnt, int_timeout;
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#endif
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/*
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* Save away interesting stuff in the structure
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*/
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@ -728,6 +746,11 @@ static void sbdma_initctx(sbmacdma_t *d,
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s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_DSCR_CNT);
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d->sbdma_curdscr =
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s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CUR_DSCRADDR);
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if (d->sbdma_txdir)
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d->sbdma_oodpktlost = NULL;
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else
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d->sbdma_oodpktlost =
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s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_OODPKTLOST_RX);
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/*
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* Allocate memory for the ring
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@ -735,6 +758,7 @@ static void sbdma_initctx(sbmacdma_t *d,
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d->sbdma_maxdescr = maxdescr;
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d->sbdma_dscrtable_unaligned =
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d->sbdma_dscrtable = (sbdmadscr_t *)
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kmalloc((d->sbdma_maxdescr+1)*sizeof(sbdmadscr_t), GFP_KERNEL);
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@ -765,12 +789,14 @@ static void sbdma_initctx(sbmacdma_t *d,
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* Setup Rx/Tx DMA coalescing defaults
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*/
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int_pktcnt = (txrx == DMA_TX) ? int_pktcnt_tx : int_pktcnt_rx;
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if ( int_pktcnt ) {
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d->sbdma_int_pktcnt = int_pktcnt;
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} else {
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d->sbdma_int_pktcnt = 1;
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}
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int_timeout = (txrx == DMA_TX) ? int_timeout_tx : int_timeout_rx;
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if ( int_timeout ) {
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d->sbdma_int_timeout = int_timeout;
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} else {
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@ -1147,30 +1173,41 @@ static void sbmac_netpoll(struct net_device *netdev)
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#endif
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/**********************************************************************
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* SBDMA_RX_PROCESS(sc,d)
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* SBDMA_RX_PROCESS(sc,d,work_to_do,poll)
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*
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* Process "completed" receive buffers on the specified DMA channel.
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* Note that this isn't really ideal for priority channels, since
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* it processes all of the packets on a given channel before
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* returning.
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*
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* Input parameters:
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* sc - softc structure
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* d - DMA channel context
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* sc - softc structure
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* d - DMA channel context
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* work_to_do - no. of packets to process before enabling interrupt
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* again (for NAPI)
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* poll - 1: using polling (for NAPI)
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*
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* Return value:
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* nothing
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********************************************************************* */
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static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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static int sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d,
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int work_to_do, int poll)
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{
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int curidx;
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int hwidx;
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sbdmadscr_t *dsc;
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struct sk_buff *sb;
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int len;
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int work_done = 0;
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int dropped = 0;
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for (;;) {
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prefetch(d);
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again:
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/* Check if the HW dropped any frames */
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sc->sbm_stats.rx_fifo_errors
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+= __raw_readq(sc->sbm_rxdma.sbdma_oodpktlost) & 0xffff;
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__raw_writeq(0, sc->sbm_rxdma.sbdma_oodpktlost);
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while (work_to_do-- > 0) {
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/*
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* figure out where we are (as an index) and where
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* the hardware is (also as an index)
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* (sbdma_remptr) and the physical address (sbdma_curdscr CSR)
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*/
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curidx = d->sbdma_remptr - d->sbdma_dscrtable;
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dsc = d->sbdma_remptr;
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curidx = dsc - d->sbdma_dscrtable;
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prefetch(dsc);
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prefetch(&d->sbdma_ctxtable[curidx]);
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hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) -
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d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t));
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*/
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if (curidx == hwidx)
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break;
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goto done;
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/*
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* Otherwise, get the packet's sk_buff ptr back
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*/
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dsc = &(d->sbdma_dscrtable[curidx]);
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sb = d->sbdma_ctxtable[curidx];
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d->sbdma_ctxtable[curidx] = NULL;
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@ -1211,7 +1252,7 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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* receive ring.
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*/
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if (!(dsc->dscr_a & M_DMA_ETHRX_BAD)) {
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if (likely (!(dsc->dscr_a & M_DMA_ETHRX_BAD))) {
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/*
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* Add a new buffer to replace the old one. If we fail
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@ -1219,9 +1260,14 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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* packet and put it right back on the receive ring.
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*/
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if (sbdma_add_rcvbuffer(d,NULL) == -ENOBUFS) {
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sc->sbm_stats.rx_dropped++;
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if (unlikely (sbdma_add_rcvbuffer(d,NULL) ==
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-ENOBUFS)) {
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sc->sbm_stats.rx_dropped++;
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sbdma_add_rcvbuffer(d,sb); /* re-add old buffer */
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/* No point in continuing at the moment */
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printk(KERN_ERR "dropped packet (1)\n");
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d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
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goto done;
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} else {
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/*
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* Set length into the packet
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@ -1233,8 +1279,6 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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* receive ring. Pass the buffer to
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* the kernel
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*/
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sc->sbm_stats.rx_bytes += len;
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sc->sbm_stats.rx_packets++;
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sb->protocol = eth_type_trans(sb,d->sbdma_eth->sbm_dev);
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/* Check hw IPv4/TCP checksum if supported */
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if (sc->rx_hw_checksum == ENABLE) {
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@ -1246,8 +1290,22 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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sb->ip_summed = CHECKSUM_NONE;
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}
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}
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prefetch(sb->data);
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prefetch((const void *)(((char *)sb->data)+32));
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if (poll)
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dropped = netif_receive_skb(sb);
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else
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dropped = netif_rx(sb);
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netif_rx(sb);
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if (dropped == NET_RX_DROP) {
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sc->sbm_stats.rx_dropped++;
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d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
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goto done;
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}
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else {
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sc->sbm_stats.rx_bytes += len;
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sc->sbm_stats.rx_packets++;
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}
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}
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} else {
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/*
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@ -1264,12 +1322,16 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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*/
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d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
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work_done++;
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}
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if (!poll) {
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work_to_do = 32;
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goto again; /* collect fifo drop statistics again */
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}
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done:
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return work_done;
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}
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/**********************************************************************
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* SBDMA_TX_PROCESS(sc,d)
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*
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@ -1281,22 +1343,30 @@ static void sbdma_rx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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*
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* Input parameters:
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* sc - softc structure
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* d - DMA channel context
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* d - DMA channel context
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* poll - 1: using polling (for NAPI)
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*
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* Return value:
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* nothing
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********************************************************************* */
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static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d, int poll)
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{
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int curidx;
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int hwidx;
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sbdmadscr_t *dsc;
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struct sk_buff *sb;
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unsigned long flags;
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int packets_handled = 0;
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spin_lock_irqsave(&(sc->sbm_lock), flags);
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if (d->sbdma_remptr == d->sbdma_addptr)
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goto end_unlock;
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hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) -
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d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t));
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for (;;) {
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/*
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* figure out where we are (as an index) and where
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@ -1310,8 +1380,6 @@ static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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*/
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curidx = d->sbdma_remptr - d->sbdma_dscrtable;
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hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) -
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d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t));
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/*
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* If they're the same, that means we've processed all
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@ -1349,6 +1417,8 @@ static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
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packets_handled++;
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}
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/*
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@ -1357,8 +1427,10 @@ static void sbdma_tx_process(struct sbmac_softc *sc,sbmacdma_t *d)
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* watermark on the transmit queue.
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*/
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netif_wake_queue(d->sbdma_eth->sbm_dev);
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if (packets_handled)
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netif_wake_queue(d->sbdma_eth->sbm_dev);
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end_unlock:
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spin_unlock_irqrestore(&(sc->sbm_lock), flags);
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}
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@ -1432,9 +1504,9 @@ static int sbmac_initctx(struct sbmac_softc *s)
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static void sbdma_uninitctx(struct sbmacdma_s *d)
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{
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if (d->sbdma_dscrtable) {
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kfree(d->sbdma_dscrtable);
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d->sbdma_dscrtable = NULL;
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if (d->sbdma_dscrtable_unaligned) {
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kfree(d->sbdma_dscrtable_unaligned);
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d->sbdma_dscrtable_unaligned = d->sbdma_dscrtable = NULL;
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}
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if (d->sbdma_ctxtable) {
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@ -1632,15 +1704,9 @@ static void sbmac_channel_start(struct sbmac_softc *s)
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#endif
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#ifdef CONFIG_SBMAC_COALESCE
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/*
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* Accept any TX interrupt and EOP count/timer RX interrupts on ch 0
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*/
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__raw_writeq(((M_MAC_INT_EOP_COUNT | M_MAC_INT_EOP_TIMER) << S_MAC_TX_CH0) |
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((M_MAC_INT_EOP_COUNT | M_MAC_INT_EOP_TIMER) << S_MAC_RX_CH0), s->sbm_imr);
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#else
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/*
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* Accept any kind of interrupt on TX and RX DMA channel 0
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*/
|
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__raw_writeq((M_MAC_INT_CHANNEL << S_MAC_TX_CH0) |
|
||||
(M_MAC_INT_CHANNEL << S_MAC_RX_CH0), s->sbm_imr);
|
||||
#endif
|
||||
|
@ -2073,57 +2139,46 @@ static irqreturn_t sbmac_intr(int irq,void *dev_instance)
|
|||
uint64_t isr;
|
||||
int handled = 0;
|
||||
|
||||
for (;;) {
|
||||
/*
|
||||
* Read the ISR (this clears the bits in the real
|
||||
* register, except for counter addr)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Read the ISR (this clears the bits in the real
|
||||
* register, except for counter addr)
|
||||
*/
|
||||
isr = __raw_readq(sc->sbm_isr) & ~M_MAC_COUNTER_ADDR;
|
||||
|
||||
isr = __raw_readq(sc->sbm_isr) & ~M_MAC_COUNTER_ADDR;
|
||||
if (isr == 0)
|
||||
return IRQ_RETVAL(0);
|
||||
handled = 1;
|
||||
|
||||
if (isr == 0)
|
||||
break;
|
||||
/*
|
||||
* Transmits on channel 0
|
||||
*/
|
||||
|
||||
handled = 1;
|
||||
|
||||
/*
|
||||
* Transmits on channel 0
|
||||
*/
|
||||
|
||||
if (isr & (M_MAC_INT_CHANNEL << S_MAC_TX_CH0)) {
|
||||
sbdma_tx_process(sc,&(sc->sbm_txdma));
|
||||
if (isr & (M_MAC_INT_CHANNEL << S_MAC_TX_CH0)) {
|
||||
sbdma_tx_process(sc,&(sc->sbm_txdma), 0);
|
||||
#ifdef CONFIG_NETPOLL_TRAP
|
||||
if (netpoll_trap()) {
|
||||
if (test_and_clear_bit(__LINK_STATE_XOFF, &dev->state))
|
||||
__netif_schedule(dev);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Receives on channel 0
|
||||
*/
|
||||
|
||||
/*
|
||||
* It's important to test all the bits (or at least the
|
||||
* EOP_SEEN bit) when deciding to do the RX process
|
||||
* particularly when coalescing, to make sure we
|
||||
* take care of the following:
|
||||
*
|
||||
* If you have some packets waiting (have been received
|
||||
* but no interrupt) and get a TX interrupt before
|
||||
* the RX timer or counter expires, reading the ISR
|
||||
* above will clear the timer and counter, and you
|
||||
* won't get another interrupt until a packet shows
|
||||
* up to start the timer again. Testing
|
||||
* EOP_SEEN here takes care of this case.
|
||||
* (EOP_SEEN is part of M_MAC_INT_CHANNEL << S_MAC_RX_CH0)
|
||||
*/
|
||||
|
||||
|
||||
if (isr & (M_MAC_INT_CHANNEL << S_MAC_RX_CH0)) {
|
||||
sbdma_rx_process(sc,&(sc->sbm_rxdma));
|
||||
if (isr & (M_MAC_INT_CHANNEL << S_MAC_RX_CH0)) {
|
||||
if (netif_rx_schedule_prep(dev)) {
|
||||
__raw_writeq(0, sc->sbm_imr);
|
||||
__netif_rx_schedule(dev);
|
||||
/* Depend on the exit from poll to reenable intr */
|
||||
}
|
||||
else {
|
||||
/* may leave some packets behind */
|
||||
sbdma_rx_process(sc,&(sc->sbm_rxdma),
|
||||
SBMAC_MAX_RXDESCR * 2, 0);
|
||||
}
|
||||
}
|
||||
return IRQ_RETVAL(handled);
|
||||
}
|
||||
|
||||
|
||||
/**********************************************************************
|
||||
* SBMAC_START_TX(skb,dev)
|
||||
*
|
||||
|
@ -2253,8 +2308,6 @@ static void sbmac_setmulti(struct sbmac_softc *sc)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
#if defined(SBMAC_ETH0_HWADDR) || defined(SBMAC_ETH1_HWADDR) || defined(SBMAC_ETH2_HWADDR) || defined(SBMAC_ETH3_HWADDR)
|
||||
/**********************************************************************
|
||||
* SBMAC_PARSE_XDIGIT(str)
|
||||
|
@ -2417,6 +2470,8 @@ static int sbmac_init(struct net_device *dev, int idx)
|
|||
dev->do_ioctl = sbmac_mii_ioctl;
|
||||
dev->tx_timeout = sbmac_tx_timeout;
|
||||
dev->watchdog_timeo = TX_TIMEOUT;
|
||||
dev->poll = sbmac_poll;
|
||||
dev->weight = 16;
|
||||
|
||||
dev->change_mtu = sb1250_change_mtu;
|
||||
#ifdef CONFIG_NET_POLL_CONTROLLER
|
||||
|
@ -2819,7 +2874,39 @@ static int sbmac_close(struct net_device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int sbmac_poll(struct net_device *dev, int *budget)
|
||||
{
|
||||
int work_to_do;
|
||||
int work_done;
|
||||
struct sbmac_softc *sc = netdev_priv(dev);
|
||||
|
||||
work_to_do = min(*budget, dev->quota);
|
||||
work_done = sbdma_rx_process(sc, &(sc->sbm_rxdma), work_to_do, 1);
|
||||
|
||||
if (work_done > work_to_do)
|
||||
printk(KERN_ERR "%s exceeded work_to_do budget=%d quota=%d work-done=%d\n",
|
||||
sc->sbm_dev->name, *budget, dev->quota, work_done);
|
||||
|
||||
sbdma_tx_process(sc, &(sc->sbm_txdma), 1);
|
||||
|
||||
*budget -= work_done;
|
||||
dev->quota -= work_done;
|
||||
|
||||
if (work_done < work_to_do) {
|
||||
netif_rx_complete(dev);
|
||||
|
||||
#ifdef CONFIG_SBMAC_COALESCE
|
||||
__raw_writeq(((M_MAC_INT_EOP_COUNT | M_MAC_INT_EOP_TIMER) << S_MAC_TX_CH0) |
|
||||
((M_MAC_INT_EOP_COUNT | M_MAC_INT_EOP_TIMER) << S_MAC_RX_CH0),
|
||||
sc->sbm_imr);
|
||||
#else
|
||||
__raw_writeq((M_MAC_INT_CHANNEL << S_MAC_TX_CH0) |
|
||||
(M_MAC_INT_CHANNEL << S_MAC_RX_CH0), sc->sbm_imr);
|
||||
#endif
|
||||
}
|
||||
|
||||
return (work_done >= work_to_do);
|
||||
}
|
||||
|
||||
#if defined(SBMAC_ETH0_HWADDR) || defined(SBMAC_ETH1_HWADDR) || defined(SBMAC_ETH2_HWADDR) || defined(SBMAC_ETH3_HWADDR)
|
||||
static void
|
||||
|
@ -2906,7 +2993,7 @@ sbmac_init_module(void)
|
|||
|
||||
/*
|
||||
* The R_MAC_ETHERNET_ADDR register will be set to some nonzero
|
||||
* value for us by the firmware if we're going to use this MAC.
|
||||
* value for us by the firmware if we are going to use this MAC.
|
||||
* If we find a zero, skip this MAC.
|
||||
*/
|
||||
|
||||
|
|
Loading…
Reference in New Issue
Block a user