forked from luck/tmp_suning_uos_patched
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: mtd: nand: Fix probe of Samsung NAND chips mtd: nand: Fix regression in BBM detection pxa3xx: fix ns2cycle equation
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@ -2866,6 +2866,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
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*/
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if (id_data[0] == id_data[6] && id_data[1] == id_data[7] &&
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id_data[0] == NAND_MFR_SAMSUNG &&
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(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
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id_data[5] != 0x00) {
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/* Calc pagesize */
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mtd->writesize = 2048 << (extid & 0x03);
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@ -2934,14 +2935,10 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
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chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 32 - 1;
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/* Set the bad block position */
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if (!(busw & NAND_BUSWIDTH_16) && (*maf_id == NAND_MFR_STMICRO ||
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(*maf_id == NAND_MFR_SAMSUNG &&
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mtd->writesize == 512) ||
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*maf_id == NAND_MFR_AMD))
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chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
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else
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if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
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chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
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else
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chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
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/* Get chip options, preserve non chip based options */
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chip->options &= ~NAND_CHIPOPTIONS_MSK;
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@ -363,7 +363,7 @@ static struct pxa3xx_nand_flash *builtin_flash_types[] = {
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#define tAR_NDTR1(r) (((r) >> 0) & 0xf)
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/* convert nano-seconds to nand flash controller clock cycles */
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#define ns2cycle(ns, clk) (int)(((ns) * (clk / 1000000) / 1000) - 1)
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#define ns2cycle(ns, clk) (int)((ns) * (clk / 1000000) / 1000)
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/* convert nand flash controller clock cycles to nano-seconds */
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#define cycle2ns(c, clk) ((((c) + 1) * 1000000 + clk / 500) / (clk / 1000))
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