forked from luck/tmp_suning_uos_patched
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: AT91 MMC update for 2.6.19 mmc: Change SDHCI iomem error to a warning mmc: fix "prev->state: 2 != TASK_RUNNING??" problem on SD/MMC card removal AT91 MMC 5 : Minor cleanups AT91 MMC 4 : Interrupt handler cleanup AT91 MMC 3 : Move global mci_clk variable AT91 MMC 2 : Use platform resources AT91 MMC 1: Pass host structure.
This commit is contained in:
Linus Torvalds
commit
69de7fc037
@ -1,5 +1,5 @@
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/*
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* linux/drivers/mmc/at91_mci.c - ATMEL AT91RM9200 MCI Driver
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* linux/drivers/mmc/at91_mci.c - ATMEL AT91 MCI Driver
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*
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* Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
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*
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@ -11,7 +11,7 @@
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*/
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/*
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This is the AT91RM9200 MCI driver that has been tested with both MMC cards
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This is the AT91 MCI driver that has been tested with both MMC cards
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and SD-cards. Boards that support write protect are now supported.
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The CCAT91SBC001 board does not support SD cards.
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@ -38,8 +38,8 @@
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controller to manage the transfers.
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A read is done from the controller directly to the scatterlist passed in from the request.
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Due to a bug in the controller, when a read is completed, all the words are byte
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swapped in the scatterlist buffers.
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Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte
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swapped in the scatterlist buffers. AT91SAM926x are not affected by this bug.
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The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
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@ -72,6 +72,7 @@
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#include <asm/irq.h>
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#include <asm/mach/mmc.h>
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#include <asm/arch/board.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/at91_mci.h>
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#include <asm/arch/at91_pdc.h>
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@ -80,33 +81,17 @@
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#undef SUPPORT_4WIRE
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static struct clk *mci_clk;
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#define FL_SENT_COMMAND (1 << 0)
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#define FL_SENT_STOP (1 << 1)
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#define FL_SENT_COMMAND (1 << 0)
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#define FL_SENT_STOP (1 << 1)
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#define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
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| AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
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| AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
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#define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
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#define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
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/*
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* Read from a MCI register.
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*/
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static inline unsigned long at91_mci_read(unsigned int reg)
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{
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void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI;
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return __raw_readl(mci_base + reg);
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}
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/*
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* Write to a MCI register.
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*/
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static inline void at91_mci_write(unsigned int reg, unsigned long value)
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{
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void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI;
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__raw_writel(value, mci_base + reg);
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}
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/*
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* Low level type for this driver
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*/
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@ -116,9 +101,14 @@ struct at91mci_host
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struct mmc_command *cmd;
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struct mmc_request *request;
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void __iomem *baseaddr;
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int irq;
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struct at91_mmc_data *board;
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int present;
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struct clk *mci_clk;
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/*
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* Flag indicating when the command has been sent. This is used to
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* work out whether or not to send the stop
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@ -158,7 +148,6 @@ static inline void at91mci_sg_to_dma(struct at91mci_host *host, struct mmc_data
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for (i = 0; i < len; i++) {
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struct scatterlist *sg;
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int amount;
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int index;
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unsigned int *sgbuffer;
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sg = &data->sg[i];
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@ -166,10 +155,15 @@ static inline void at91mci_sg_to_dma(struct at91mci_host *host, struct mmc_data
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sgbuffer = kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset;
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amount = min(size, sg->length);
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size -= amount;
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amount /= 4;
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for (index = 0; index < amount; index++)
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*dmabuf++ = swab32(sgbuffer[index]);
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if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
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int index;
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for (index = 0; index < (amount / 4); index++)
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*dmabuf++ = swab32(sgbuffer[index]);
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}
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else
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memcpy(dmabuf, sgbuffer, amount);
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kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
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@ -217,13 +211,13 @@ static void at91mci_pre_dma_read(struct at91mci_host *host)
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/* Check to see if this needs filling */
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if (i == 0) {
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if (at91_mci_read(AT91_PDC_RCR) != 0) {
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if (at91_mci_read(host, AT91_PDC_RCR) != 0) {
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pr_debug("Transfer active in current\n");
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continue;
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}
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}
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else {
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if (at91_mci_read(AT91_PDC_RNCR) != 0) {
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if (at91_mci_read(host, AT91_PDC_RNCR) != 0) {
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pr_debug("Transfer active in next\n");
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continue;
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}
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@ -240,12 +234,12 @@ static void at91mci_pre_dma_read(struct at91mci_host *host)
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pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
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if (i == 0) {
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at91_mci_write(AT91_PDC_RPR, sg->dma_address);
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at91_mci_write(AT91_PDC_RCR, sg->length / 4);
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at91_mci_write(host, AT91_PDC_RPR, sg->dma_address);
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at91_mci_write(host, AT91_PDC_RCR, sg->length / 4);
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}
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else {
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at91_mci_write(AT91_PDC_RNPR, sg->dma_address);
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at91_mci_write(AT91_PDC_RNCR, sg->length / 4);
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at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address);
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at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4);
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}
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}
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@ -276,8 +270,6 @@ static void at91mci_post_dma_read(struct at91mci_host *host)
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while (host->in_use_index < host->transfer_index) {
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unsigned int *buffer;
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int index;
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int len;
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struct scatterlist *sg;
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@ -295,11 +287,13 @@ static void at91mci_post_dma_read(struct at91mci_host *host)
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data->bytes_xfered += sg->length;
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len = sg->length / 4;
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if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
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int index;
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for (index = 0; index < len; index++) {
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buffer[index] = swab32(buffer[index]);
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for (index = 0; index < (sg->length / 4); index++)
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buffer[index] = swab32(buffer[index]);
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}
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kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
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flush_dcache_page(sg->page);
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}
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@ -308,8 +302,8 @@ static void at91mci_post_dma_read(struct at91mci_host *host)
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if (host->transfer_index < data->sg_len)
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at91mci_pre_dma_read(host);
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else {
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at91_mci_write(AT91_MCI_IER, AT91_MCI_RXBUFF);
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at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
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at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
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at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
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}
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pr_debug("post dma read done\n");
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@ -326,11 +320,11 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host)
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pr_debug("Handling the transmit\n");
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/* Disable the transfer */
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at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
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at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
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/* Now wait for cmd ready */
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at91_mci_write(AT91_MCI_IDR, AT91_MCI_TXBUFE);
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at91_mci_write(AT91_MCI_IER, AT91_MCI_NOTBUSY);
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at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
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at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
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cmd = host->cmd;
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if (!cmd) return;
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@ -344,21 +338,23 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host)
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/*
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* Enable the controller
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*/
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static void at91_mci_enable(void)
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static void at91_mci_enable(struct at91mci_host *host)
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{
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at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN);
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at91_mci_write(AT91_MCI_IDR, 0xFFFFFFFF);
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at91_mci_write(AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
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at91_mci_write(AT91_MCI_MR, 0x834A);
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at91_mci_write(AT91_MCI_SDCR, 0x0);
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at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
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at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
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at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
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at91_mci_write(host, AT91_MCI_MR, AT91_MCI_PDCMODE | 0x34a);
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/* use Slot A or B (only one at same time) */
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at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
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}
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/*
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* Disable the controller
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*/
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static void at91_mci_disable(void)
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static void at91_mci_disable(struct at91mci_host *host)
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{
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at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
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at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
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}
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/*
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@ -378,13 +374,13 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
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/* Not sure if this is needed */
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#if 0
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if ((at91_mci_read(AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
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if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
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pr_debug("Clearing timeout\n");
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at91_mci_write(AT91_MCI_ARGR, 0);
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at91_mci_write(AT91_MCI_CMDR, AT91_MCI_OPDCMD);
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while (!(at91_mci_read(AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
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at91_mci_write(host, AT91_MCI_ARGR, 0);
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at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
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while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
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/* spin */
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pr_debug("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR));
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pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
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}
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}
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#endif
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@ -431,32 +427,32 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
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/*
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* Set the arguments and send the command
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*/
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pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n",
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cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(AT91_MCI_MR));
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pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
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cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
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if (!data) {
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at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS);
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at91_mci_write(AT91_PDC_RPR, 0);
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at91_mci_write(AT91_PDC_RCR, 0);
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at91_mci_write(AT91_PDC_RNPR, 0);
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at91_mci_write(AT91_PDC_RNCR, 0);
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at91_mci_write(AT91_PDC_TPR, 0);
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at91_mci_write(AT91_PDC_TCR, 0);
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at91_mci_write(AT91_PDC_TNPR, 0);
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at91_mci_write(AT91_PDC_TNCR, 0);
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at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS);
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at91_mci_write(host, AT91_PDC_RPR, 0);
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at91_mci_write(host, AT91_PDC_RCR, 0);
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at91_mci_write(host, AT91_PDC_RNPR, 0);
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at91_mci_write(host, AT91_PDC_RNCR, 0);
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at91_mci_write(host, AT91_PDC_TPR, 0);
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at91_mci_write(host, AT91_PDC_TCR, 0);
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at91_mci_write(host, AT91_PDC_TNPR, 0);
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at91_mci_write(host, AT91_PDC_TNCR, 0);
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at91_mci_write(AT91_MCI_ARGR, cmd->arg);
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at91_mci_write(AT91_MCI_CMDR, cmdr);
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at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
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at91_mci_write(host, AT91_MCI_CMDR, cmdr);
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return AT91_MCI_CMDRDY;
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}
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mr = at91_mci_read(AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
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at91_mci_write(AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
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mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
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at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
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/*
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* Disable the PDC controller
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*/
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at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
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at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
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if (cmdr & AT91_MCI_TRCMD_START) {
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data->bytes_xfered = 0;
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@ -485,8 +481,8 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
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pr_debug("Transmitting %d bytes\n", host->total_length);
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at91_mci_write(AT91_PDC_TPR, host->physical_address);
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at91_mci_write(AT91_PDC_TCR, host->total_length / 4);
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at91_mci_write(host, AT91_PDC_TPR, host->physical_address);
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at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4);
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ier = AT91_MCI_TXBUFE;
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}
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}
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@ -496,14 +492,14 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
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* the data sheet says
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*/
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at91_mci_write(AT91_MCI_ARGR, cmd->arg);
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at91_mci_write(AT91_MCI_CMDR, cmdr);
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at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
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at91_mci_write(host, AT91_MCI_CMDR, cmdr);
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if (cmdr & AT91_MCI_TRCMD_START) {
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if (cmdr & AT91_MCI_TRDIR)
|
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at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTEN);
|
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at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN);
|
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else
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at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTEN);
|
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at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN);
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}
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return ier;
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}
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@ -520,7 +516,7 @@ static void at91mci_process_command(struct at91mci_host *host, struct mmc_comman
|
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pr_debug("setting ier to %08X\n", ier);
|
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|
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/* Stop on errors or the required value */
|
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at91_mci_write(AT91_MCI_IER, 0xffff0000 | ier);
|
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at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
|
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}
|
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|
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/*
|
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@ -548,19 +544,19 @@ static void at91mci_completed_command(struct at91mci_host *host)
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struct mmc_command *cmd = host->cmd;
|
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unsigned int status;
|
||||
|
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at91_mci_write(AT91_MCI_IDR, 0xffffffff);
|
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at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
|
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|
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cmd->resp[0] = at91_mci_read(AT91_MCI_RSPR(0));
|
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cmd->resp[1] = at91_mci_read(AT91_MCI_RSPR(1));
|
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cmd->resp[2] = at91_mci_read(AT91_MCI_RSPR(2));
|
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cmd->resp[3] = at91_mci_read(AT91_MCI_RSPR(3));
|
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cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
|
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cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
|
||||
cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
|
||||
cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
|
||||
|
||||
if (host->buffer) {
|
||||
dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
|
||||
host->buffer = NULL;
|
||||
}
|
||||
|
||||
status = at91_mci_read(AT91_MCI_SR);
|
||||
status = at91_mci_read(host, AT91_MCI_SR);
|
||||
|
||||
pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
|
||||
status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
|
||||
@ -611,18 +607,18 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
||||
{
|
||||
int clkdiv;
|
||||
struct at91mci_host *host = mmc_priv(mmc);
|
||||
unsigned long at91_master_clock = clk_get_rate(mci_clk);
|
||||
unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
|
||||
|
||||
host->bus_mode = ios->bus_mode;
|
||||
|
||||
if (ios->clock == 0) {
|
||||
/* Disable the MCI controller */
|
||||
at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS);
|
||||
at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
|
||||
clkdiv = 0;
|
||||
}
|
||||
else {
|
||||
/* Enable the MCI controller */
|
||||
at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN);
|
||||
at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
|
||||
|
||||
if ((at91_master_clock % (ios->clock * 2)) == 0)
|
||||
clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
|
||||
@ -634,25 +630,25 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
||||
}
|
||||
if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
|
||||
pr_debug("MMC: Setting controller bus width to 4\n");
|
||||
at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
|
||||
at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
|
||||
}
|
||||
else {
|
||||
pr_debug("MMC: Setting controller bus width to 1\n");
|
||||
at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
|
||||
at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
|
||||
}
|
||||
|
||||
/* Set the clock divider */
|
||||
at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
|
||||
at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
|
||||
|
||||
/* maybe switch power to the card */
|
||||
if (host->board->vcc_pin) {
|
||||
switch (ios->power_mode) {
|
||||
case MMC_POWER_OFF:
|
||||
at91_set_gpio_output(host->board->vcc_pin, 0);
|
||||
at91_set_gpio_value(host->board->vcc_pin, 0);
|
||||
break;
|
||||
case MMC_POWER_UP:
|
||||
case MMC_POWER_ON:
|
||||
at91_set_gpio_output(host->board->vcc_pin, 1);
|
||||
at91_set_gpio_value(host->board->vcc_pin, 1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -665,39 +661,40 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
|
||||
{
|
||||
struct at91mci_host *host = devid;
|
||||
int completed = 0;
|
||||
unsigned int int_status, int_mask;
|
||||
|
||||
unsigned int int_status;
|
||||
int_status = at91_mci_read(host, AT91_MCI_SR);
|
||||
int_mask = at91_mci_read(host, AT91_MCI_IMR);
|
||||
|
||||
pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
|
||||
int_status & int_mask);
|
||||
|
||||
int_status = int_status & int_mask;
|
||||
|
||||
int_status = at91_mci_read(AT91_MCI_SR);
|
||||
pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR),
|
||||
int_status & at91_mci_read(AT91_MCI_IMR));
|
||||
|
||||
if ((int_status & at91_mci_read(AT91_MCI_IMR)) & 0xffff0000)
|
||||
if (int_status & AT91_MCI_ERRORS) {
|
||||
completed = 1;
|
||||
|
||||
if (int_status & AT91_MCI_UNRE)
|
||||
pr_debug("MMC: Underrun error\n");
|
||||
if (int_status & AT91_MCI_OVRE)
|
||||
pr_debug("MMC: Overrun error\n");
|
||||
if (int_status & AT91_MCI_DTOE)
|
||||
pr_debug("MMC: Data timeout\n");
|
||||
if (int_status & AT91_MCI_DCRCE)
|
||||
pr_debug("MMC: CRC error in data\n");
|
||||
if (int_status & AT91_MCI_RTOE)
|
||||
pr_debug("MMC: Response timeout\n");
|
||||
if (int_status & AT91_MCI_RENDE)
|
||||
pr_debug("MMC: Response end bit error\n");
|
||||
if (int_status & AT91_MCI_RCRCE)
|
||||
pr_debug("MMC: Response CRC error\n");
|
||||
if (int_status & AT91_MCI_RDIRE)
|
||||
pr_debug("MMC: Response direction error\n");
|
||||
if (int_status & AT91_MCI_RINDE)
|
||||
pr_debug("MMC: Response index error\n");
|
||||
} else {
|
||||
/* Only continue processing if no errors */
|
||||
|
||||
int_status &= at91_mci_read(AT91_MCI_IMR);
|
||||
|
||||
if (int_status & AT91_MCI_UNRE)
|
||||
pr_debug("MMC: Underrun error\n");
|
||||
if (int_status & AT91_MCI_OVRE)
|
||||
pr_debug("MMC: Overrun error\n");
|
||||
if (int_status & AT91_MCI_DTOE)
|
||||
pr_debug("MMC: Data timeout\n");
|
||||
if (int_status & AT91_MCI_DCRCE)
|
||||
pr_debug("MMC: CRC error in data\n");
|
||||
if (int_status & AT91_MCI_RTOE)
|
||||
pr_debug("MMC: Response timeout\n");
|
||||
if (int_status & AT91_MCI_RENDE)
|
||||
pr_debug("MMC: Response end bit error\n");
|
||||
if (int_status & AT91_MCI_RCRCE)
|
||||
pr_debug("MMC: Response CRC error\n");
|
||||
if (int_status & AT91_MCI_RDIRE)
|
||||
pr_debug("MMC: Response direction error\n");
|
||||
if (int_status & AT91_MCI_RINDE)
|
||||
pr_debug("MMC: Response index error\n");
|
||||
|
||||
/* Only continue processing if no errors */
|
||||
if (!completed) {
|
||||
if (int_status & AT91_MCI_TXBUFE) {
|
||||
pr_debug("TX buffer empty\n");
|
||||
at91_mci_handle_transmitted(host);
|
||||
@ -705,12 +702,11 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
|
||||
|
||||
if (int_status & AT91_MCI_RXBUFF) {
|
||||
pr_debug("RX buffer full\n");
|
||||
at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY);
|
||||
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
|
||||
}
|
||||
|
||||
if (int_status & AT91_MCI_ENDTX) {
|
||||
if (int_status & AT91_MCI_ENDTX)
|
||||
pr_debug("Transmit has ended\n");
|
||||
}
|
||||
|
||||
if (int_status & AT91_MCI_ENDRX) {
|
||||
pr_debug("Receive has ended\n");
|
||||
@ -719,37 +715,33 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
|
||||
|
||||
if (int_status & AT91_MCI_NOTBUSY) {
|
||||
pr_debug("Card is ready\n");
|
||||
at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY);
|
||||
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
|
||||
}
|
||||
|
||||
if (int_status & AT91_MCI_DTIP) {
|
||||
if (int_status & AT91_MCI_DTIP)
|
||||
pr_debug("Data transfer in progress\n");
|
||||
}
|
||||
|
||||
if (int_status & AT91_MCI_BLKE) {
|
||||
if (int_status & AT91_MCI_BLKE)
|
||||
pr_debug("Block transfer has ended\n");
|
||||
}
|
||||
|
||||
if (int_status & AT91_MCI_TXRDY) {
|
||||
if (int_status & AT91_MCI_TXRDY)
|
||||
pr_debug("Ready to transmit\n");
|
||||
}
|
||||
|
||||
if (int_status & AT91_MCI_RXRDY) {
|
||||
if (int_status & AT91_MCI_RXRDY)
|
||||
pr_debug("Ready to receive\n");
|
||||
}
|
||||
|
||||
if (int_status & AT91_MCI_CMDRDY) {
|
||||
pr_debug("Command ready\n");
|
||||
completed = 1;
|
||||
}
|
||||
}
|
||||
at91_mci_write(AT91_MCI_IDR, int_status);
|
||||
|
||||
if (completed) {
|
||||
pr_debug("Completed command\n");
|
||||
at91_mci_write(AT91_MCI_IDR, 0xffffffff);
|
||||
at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
|
||||
at91mci_completed_command(host);
|
||||
}
|
||||
} else
|
||||
at91_mci_write(host, AT91_MCI_IDR, int_status);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
@ -769,7 +761,7 @@ static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
|
||||
present ? "insert" : "remove");
|
||||
if (!present) {
|
||||
pr_debug("****** Resetting SD-card bus width ******\n");
|
||||
at91_mci_write(AT91_MCI_SDCR, 0);
|
||||
at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
|
||||
}
|
||||
mmc_detect_change(host->mmc, msecs_to_jiffies(100));
|
||||
}
|
||||
@ -806,15 +798,22 @@ static int at91_mci_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct mmc_host *mmc;
|
||||
struct at91mci_host *host;
|
||||
struct resource *res;
|
||||
int ret;
|
||||
|
||||
pr_debug("Probe MCI devices\n");
|
||||
at91_mci_disable();
|
||||
at91_mci_enable();
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res)
|
||||
return -ENXIO;
|
||||
|
||||
if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
|
||||
return -EBUSY;
|
||||
|
||||
mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
|
||||
if (!mmc) {
|
||||
pr_debug("Failed to allocate mmc host\n");
|
||||
release_mem_region(res->start, res->end - res->start + 1);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -833,30 +832,51 @@ static int at91_mci_probe(struct platform_device *pdev)
|
||||
#ifdef SUPPORT_4WIRE
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA;
|
||||
#else
|
||||
printk("MMC: 4 wire bus mode not supported by this driver - using 1 wire\n");
|
||||
printk("AT91 MMC: 4 wire bus mode not supported by this driver - using 1 wire\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Get Clock
|
||||
*/
|
||||
mci_clk = clk_get(&pdev->dev, "mci_clk");
|
||||
if (IS_ERR(mci_clk)) {
|
||||
host->mci_clk = clk_get(&pdev->dev, "mci_clk");
|
||||
if (IS_ERR(host->mci_clk)) {
|
||||
printk(KERN_ERR "AT91 MMC: no clock defined.\n");
|
||||
mmc_free_host(mmc);
|
||||
release_mem_region(res->start, res->end - res->start + 1);
|
||||
return -ENODEV;
|
||||
}
|
||||
clk_enable(mci_clk); /* Enable the peripheral clock */
|
||||
|
||||
/*
|
||||
* Map I/O region
|
||||
*/
|
||||
host->baseaddr = ioremap(res->start, res->end - res->start + 1);
|
||||
if (!host->baseaddr) {
|
||||
clk_put(host->mci_clk);
|
||||
mmc_free_host(mmc);
|
||||
release_mem_region(res->start, res->end - res->start + 1);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/*
|
||||
* Reset hardware
|
||||
*/
|
||||
clk_enable(host->mci_clk); /* Enable the peripheral clock */
|
||||
at91_mci_disable(host);
|
||||
at91_mci_enable(host);
|
||||
|
||||
/*
|
||||
* Allocate the MCI interrupt
|
||||
*/
|
||||
ret = request_irq(AT91RM9200_ID_MCI, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host);
|
||||
host->irq = platform_get_irq(pdev, 0);
|
||||
ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "Failed to request MCI interrupt\n");
|
||||
clk_disable(mci_clk);
|
||||
clk_put(mci_clk);
|
||||
printk(KERN_ERR "AT91 MMC: Failed to request MCI interrupt\n");
|
||||
clk_disable(host->mci_clk);
|
||||
clk_put(host->mci_clk);
|
||||
mmc_free_host(mmc);
|
||||
iounmap(host->baseaddr);
|
||||
release_mem_region(res->start, res->end - res->start + 1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -879,10 +899,10 @@ static int at91_mci_probe(struct platform_device *pdev)
|
||||
ret = request_irq(host->board->det_pin, at91_mmc_det_irq,
|
||||
0, DRIVER_NAME, host);
|
||||
if (ret)
|
||||
printk(KERN_ERR "couldn't allocate MMC detect irq\n");
|
||||
printk(KERN_ERR "AT91 MMC: Couldn't allocate MMC detect irq\n");
|
||||
}
|
||||
|
||||
pr_debug(KERN_INFO "Added MCI driver\n");
|
||||
pr_debug("Added MCI driver\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -894,6 +914,7 @@ static int at91_mci_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
||||
struct at91mci_host *host;
|
||||
struct resource *res;
|
||||
|
||||
if (!mmc)
|
||||
return -1;
|
||||
@ -905,16 +926,19 @@ static int at91_mci_remove(struct platform_device *pdev)
|
||||
cancel_delayed_work(&host->mmc->detect);
|
||||
}
|
||||
|
||||
at91_mci_disable(host);
|
||||
mmc_remove_host(mmc);
|
||||
at91_mci_disable();
|
||||
free_irq(AT91RM9200_ID_MCI, host);
|
||||
free_irq(host->irq, host);
|
||||
|
||||
clk_disable(host->mci_clk); /* Disable the peripheral clock */
|
||||
clk_put(host->mci_clk);
|
||||
|
||||
iounmap(host->baseaddr);
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(res->start, res->end - res->start + 1);
|
||||
|
||||
mmc_free_host(mmc);
|
||||
|
||||
clk_disable(mci_clk); /* Disable the peripheral clock */
|
||||
clk_put(mci_clk);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
pr_debug("MCI Removed\n");
|
||||
|
||||
return 0;
|
||||
|
||||
@ -78,8 +78,10 @@ static int mmc_queue_thread(void *d)
|
||||
spin_unlock_irq(q->queue_lock);
|
||||
|
||||
if (!req) {
|
||||
if (kthread_should_stop())
|
||||
if (kthread_should_stop()) {
|
||||
set_current_state(TASK_RUNNING);
|
||||
break;
|
||||
}
|
||||
up(&mq->thread_sem);
|
||||
schedule();
|
||||
down(&mq->thread_sem);
|
||||
|
||||
@ -1170,8 +1170,8 @@ static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
|
||||
}
|
||||
|
||||
if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
|
||||
printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
|
||||
return -ENODEV;
|
||||
printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. "
|
||||
"You may experience problems.\n");
|
||||
}
|
||||
|
||||
if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user