forked from luck/tmp_suning_uos_patched
V4L/DVB (8940): saa7115: fix saa7111(a) support
The saa7111 support in saa7115.c was missing some features and did not properly take some of the differences into account. With this patch saa7115 can be used in the mxb driver instead of saa7111.c. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -1309,10 +1309,13 @@ static int saa7115_command(struct i2c_client *client, unsigned int cmd, void *ar
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case VIDIOC_INT_S_VIDEO_ROUTING:
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{
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struct v4l2_routing *route = arg;
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u32 input = route->input;
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u8 mask = (state->ident == V4L2_IDENT_SAA7111) ? 0xf8 : 0xf0;
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v4l_dbg(1, debug, client, "decoder set input %d output %d\n", route->input, route->output);
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/* saa7113 does not have these inputs */
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if (state->ident == V4L2_IDENT_SAA7113 &&
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/* saa7111/3 does not have these inputs */
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if ((state->ident == V4L2_IDENT_SAA7113 ||
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state->ident == V4L2_IDENT_SAA7111) &&
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(route->input == SAA7115_COMPOSITE4 ||
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route->input == SAA7115_COMPOSITE5)) {
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return -EINVAL;
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@ -1327,10 +1330,23 @@ static int saa7115_command(struct i2c_client *client, unsigned int cmd, void *ar
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(route->input >= SAA7115_SVIDEO0) ? "S-Video" : "Composite", (route->output == SAA7115_IPORT_ON) ? "iport on" : "iport off");
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state->input = route->input;
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/* saa7111 has slightly different input numbering */
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if (state->ident == V4L2_IDENT_SAA7111) {
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if (input >= SAA7115_COMPOSITE4)
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input -= 2;
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/* saa7111 specific */
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saa711x_write(client, R_10_CHROMA_CNTL_2,
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(saa711x_read(client, R_10_CHROMA_CNTL_2) & 0x3f) |
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((route->output & 0xc0) ^ 0x40));
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saa711x_write(client, R_13_RT_X_PORT_OUT_CNTL,
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(saa711x_read(client, R_13_RT_X_PORT_OUT_CNTL) & 0xf0) |
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((route->output & 2) ? 0x0a : 0));
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}
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/* select mode */
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saa711x_write(client, R_02_INPUT_CNTL_1,
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(saa711x_read(client, R_02_INPUT_CNTL_1) & 0xf0) |
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state->input);
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(saa711x_read(client, R_02_INPUT_CNTL_1) & mask) |
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input);
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/* bypass chrominance trap for S-Video modes */
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saa711x_write(client, R_09_LUMA_CNTL,
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@ -1384,6 +1400,13 @@ static int saa7115_command(struct i2c_client *client, unsigned int cmd, void *ar
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saa711x_writeregs(client, saa7115_cfg_reset_scaler);
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break;
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case VIDIOC_INT_S_GPIO:
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if (state->ident != V4L2_IDENT_SAA7111)
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return -EINVAL;
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saa711x_write(client, 0x11, (saa711x_read(client, 0x11) & 0x7f) |
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(*(u32 *)arg ? 0x80 : 0));
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break;
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case VIDIOC_INT_G_VBI_DATA:
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{
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struct v4l2_sliced_vbi_data *data = arg;
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@ -1539,7 +1562,8 @@ static int saa7115_probe(struct i2c_client *client,
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state->crystal_freq = SAA7115_FREQ_32_11_MHZ;
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saa711x_writeregs(client, saa7115_init_auto_input);
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}
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saa711x_writeregs(client, saa7115_init_misc);
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if (state->ident != V4L2_IDENT_SAA7111)
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saa711x_writeregs(client, saa7115_init_misc);
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saa711x_set_v4lstd(client, V4L2_STD_NTSC);
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v4l_dbg(1, debug, client, "status: (1E) 0x%02x, (1F) 0x%02x\n",
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@ -1,5 +1,5 @@
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/*
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saa7115.h - definition for saa7113/4/5 inputs and frequency flags
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saa7115.h - definition for saa7111/3/4/5 inputs and frequency flags
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Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
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@ -21,13 +21,13 @@
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#ifndef _SAA7115_H_
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#define _SAA7115_H_
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/* SAA7113/4/5 HW inputs */
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/* SAA7111/3/4/5 HW inputs */
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#define SAA7115_COMPOSITE0 0
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#define SAA7115_COMPOSITE1 1
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#define SAA7115_COMPOSITE2 2
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#define SAA7115_COMPOSITE3 3
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#define SAA7115_COMPOSITE4 4 /* not available for the saa7113 */
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#define SAA7115_COMPOSITE5 5 /* not available for the saa7113 */
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#define SAA7115_COMPOSITE4 4 /* not available for the saa7111/3 */
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#define SAA7115_COMPOSITE5 5 /* not available for the saa7111/3 */
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#define SAA7115_SVIDEO0 6
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#define SAA7115_SVIDEO1 7
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#define SAA7115_SVIDEO2 8
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@ -42,8 +42,15 @@
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#define SAA7115_FREQ_FL_CGCDIV (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */
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#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
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#define SAA7115_IPORT_ON 1
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#define SAA7115_IPORT_OFF 0
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#define SAA7115_IPORT_ON 1
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#define SAA7115_IPORT_OFF 0
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/* SAA7111 specific output flags */
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#define SAA7111_VBI_BYPASS 2
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#define SAA7111_FMT_YUV422 0x00
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#define SAA7111_FMT_RGB 0x40
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#define SAA7111_FMT_CCIR 0x80
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#define SAA7111_FMT_YUV411 0xc0
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#endif
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@ -225,18 +225,22 @@ struct v4l2_crystal_freq {
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An extra flags field allows device specific configuration regarding
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clock frequency dividers, etc. If not used, then set flags to 0.
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If the frequency is not supported, then -EINVAL is returned. */
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#define VIDIOC_INT_S_CRYSTAL_FREQ _IOW ('d', 113, struct v4l2_crystal_freq)
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#define VIDIOC_INT_S_CRYSTAL_FREQ _IOW('d', 113, struct v4l2_crystal_freq)
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/* Initialize the sensor registors to some sort of reasonable
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default values. */
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#define VIDIOC_INT_INIT _IOW ('d', 114, u32)
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#define VIDIOC_INT_INIT _IOW('d', 114, u32)
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/* Set v4l2_std_id for video OUTPUT devices. This is ignored by
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video input devices. */
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#define VIDIOC_INT_S_STD_OUTPUT _IOW ('d', 115, v4l2_std_id)
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#define VIDIOC_INT_S_STD_OUTPUT _IOW('d', 115, v4l2_std_id)
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/* Get v4l2_std_id for video OUTPUT devices. This is ignored by
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video input devices. */
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#define VIDIOC_INT_G_STD_OUTPUT _IOW ('d', 116, v4l2_std_id)
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#define VIDIOC_INT_G_STD_OUTPUT _IOW('d', 116, v4l2_std_id)
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/* Set GPIO pins. Very simple right now, might need to be extended with
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a v4l2_gpio struct if a direction is also needed. */
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#define VIDIOC_INT_S_GPIO _IOW('d', 117, u32)
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#endif /* V4L2_COMMON_H_ */
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