forked from luck/tmp_suning_uos_patched
[IA64] SN: Add support for CPU disable
Add additional support for CPU disable on SN platforms. Correctly setup the smp_affinity mask for I/O error IRQs. Restrict the use of the feature to Altix 4000 and 450 systems running with a CPU disable capable PROM, and do not allow disabling of CPU 0. Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
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1aac0b5739
commit
6e9de18120
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@ -58,6 +58,7 @@
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#include <asm/system.h>
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#include <asm/system.h>
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#include <asm/tlbflush.h>
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#include <asm/tlbflush.h>
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#include <asm/unistd.h>
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#include <asm/unistd.h>
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#include <asm/sn/arch.h>
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#define SMP_DEBUG 0
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#define SMP_DEBUG 0
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@ -730,6 +731,11 @@ int __cpu_disable(void)
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return (-EBUSY);
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return (-EBUSY);
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}
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}
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if (ia64_platform_is("sn2")) {
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if (!sn_cpu_disable_allowed(cpu))
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return -EBUSY;
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}
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cpu_clear(cpu, cpu_online_map);
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cpu_clear(cpu, cpu_online_map);
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if (migrate_platform_irqs(cpu)) {
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if (migrate_platform_irqs(cpu)) {
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@ -185,11 +185,14 @@ void hubiio_crb_error_handler(struct hubdev_info *hubdev_info)
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*/
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*/
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void hub_error_init(struct hubdev_info *hubdev_info)
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void hub_error_init(struct hubdev_info *hubdev_info)
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{
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{
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if (request_irq(SGI_II_ERROR, hub_eint_handler, IRQF_SHARED,
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if (request_irq(SGI_II_ERROR, hub_eint_handler, IRQF_SHARED,
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"SN_hub_error", (void *)hubdev_info))
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"SN_hub_error", (void *)hubdev_info)) {
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printk("hub_error_init: Failed to request_irq for 0x%p\n",
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printk("hub_error_init: Failed to request_irq for 0x%p\n",
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hubdev_info);
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hubdev_info);
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return;
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return;
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}
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sn_set_err_irq_affinity(SGI_II_ERROR);
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}
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}
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@ -202,11 +205,14 @@ void hub_error_init(struct hubdev_info *hubdev_info)
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*/
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*/
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void ice_error_init(struct hubdev_info *hubdev_info)
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void ice_error_init(struct hubdev_info *hubdev_info)
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{
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{
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if (request_irq
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if (request_irq
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(SGI_TIO_ERROR, (void *)hub_eint_handler, IRQF_SHARED, "SN_TIO_error",
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(SGI_TIO_ERROR, (void *)hub_eint_handler, IRQF_SHARED, "SN_TIO_error",
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(void *)hubdev_info))
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(void *)hubdev_info)) {
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printk("ice_error_init: request_irq() error hubdev_info 0x%p\n",
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printk("ice_error_init: request_irq() error hubdev_info 0x%p\n",
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hubdev_info);
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hubdev_info);
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return;
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return;
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}
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sn_set_err_irq_affinity(SGI_TIO_ERROR);
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}
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}
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@ -19,6 +19,7 @@
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#include <asm/sn/pcidev.h>
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#include <asm/sn/pcidev.h>
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/sn_sal.h>
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#include <asm/sn/sn_sal.h>
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#include <asm/sn/sn_feature_sets.h>
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static void force_interrupt(int irq);
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static void force_interrupt(int irq);
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static void register_intr_pda(struct sn_irq_info *sn_irq_info);
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static void register_intr_pda(struct sn_irq_info *sn_irq_info);
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@ -233,6 +234,20 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
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(void)sn_retarget_vector(sn_irq_info, nasid, slice);
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(void)sn_retarget_vector(sn_irq_info, nasid, slice);
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}
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}
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#ifdef CONFIG_SMP
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void sn_set_err_irq_affinity(unsigned int irq)
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{
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/*
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* On systems which support CPU disabling (SHub2), all error interrupts
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* are targetted at the boot CPU.
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*/
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if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT))
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set_irq_affinity_info(irq, cpu_physical_id(0), 0);
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}
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#else
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void sn_set_err_irq_affinity(unsigned int irq) { }
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#endif
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static void
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static void
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sn_mask_irq(unsigned int irq)
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sn_mask_irq(unsigned int irq)
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{
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{
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@ -40,6 +40,7 @@
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/nodepda.h>
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#include <asm/sn/nodepda.h>
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#include <asm/sn/rw_mmr.h>
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#include <asm/sn/rw_mmr.h>
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#include <asm/sn/sn_feature_sets.h>
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DEFINE_PER_CPU(struct ptc_stats, ptcstats);
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DEFINE_PER_CPU(struct ptc_stats, ptcstats);
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DECLARE_PER_CPU(struct ptc_stats, ptcstats);
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DECLARE_PER_CPU(struct ptc_stats, ptcstats);
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@ -429,6 +430,31 @@ void sn2_send_IPI(int cpuid, int vector, int delivery_mode, int redirect)
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sn_send_IPI_phys(nasid, physid, vector, delivery_mode);
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sn_send_IPI_phys(nasid, physid, vector, delivery_mode);
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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/**
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* sn_cpu_disable_allowed - Determine if a CPU can be disabled.
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* @cpu - CPU that is requested to be disabled.
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*
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* CPU disable is only allowed on SHub2 systems running with a PROM
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* that supports CPU disable. It is not permitted to disable the boot processor.
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*/
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bool sn_cpu_disable_allowed(int cpu)
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{
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if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT)) {
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if (cpu != 0)
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return true;
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else
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printk(KERN_WARNING
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"Disabling the boot processor is not allowed.\n");
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} else
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printk(KERN_WARNING
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"CPU disable is not supported on this system.\n");
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return false;
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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#ifdef CONFIG_PROC_FS
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#ifdef CONFIG_PROC_FS
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#define PTC_BASENAME "sgi_sn/ptc_statistics"
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#define PTC_BASENAME "sgi_sn/ptc_statistics"
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@ -145,6 +145,7 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
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printk(KERN_WARNING
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printk(KERN_WARNING
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"pcibr cannot allocate interrupt for error handler\n");
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"pcibr cannot allocate interrupt for error handler\n");
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}
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}
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sn_set_err_irq_affinity(SGI_PCIASIC_ERROR);
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/*
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/*
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* Update the Bridge with the "kernel" pagesize
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* Update the Bridge with the "kernel" pagesize
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@ -654,6 +654,8 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
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__FUNCTION__, SGI_TIOCA_ERROR,
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__FUNCTION__, SGI_TIOCA_ERROR,
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(int)tioca_common->ca_common.bs_persist_busnum);
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(int)tioca_common->ca_common.bs_persist_busnum);
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sn_set_err_irq_affinity(SGI_TIOCA_ERROR);
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/* Setup locality information */
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/* Setup locality information */
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controller->node = tioca_kern->ca_closest_node;
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controller->node = tioca_kern->ca_closest_node;
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return tioca_common;
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return tioca_common;
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@ -1034,6 +1034,7 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
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tioce_common->ce_pcibus.bs_persist_segment,
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tioce_common->ce_pcibus.bs_persist_segment,
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tioce_common->ce_pcibus.bs_persist_busnum);
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tioce_common->ce_pcibus.bs_persist_busnum);
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sn_set_err_irq_affinity(SGI_PCIASIC_ERROR);
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return tioce_common;
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return tioce_common;
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}
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}
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@ -81,5 +81,6 @@ extern u8 sn_sharing_domain_size;
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extern u8 sn_region_size;
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extern u8 sn_region_size;
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extern void sn_flush_all_caches(long addr, long bytes);
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extern void sn_flush_all_caches(long addr, long bytes);
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extern bool sn_cpu_disable_allowed(int cpu);
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#endif /* _ASM_IA64_SN_ARCH_H */
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#endif /* _ASM_IA64_SN_ARCH_H */
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@ -60,6 +60,7 @@ extern u64 sn_intr_alloc(nasid_t, int,
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int, nasid_t, int);
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int, nasid_t, int);
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extern void sn_intr_free(nasid_t, int, struct sn_irq_info *);
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extern void sn_intr_free(nasid_t, int, struct sn_irq_info *);
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extern struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *, nasid_t, int);
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extern struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *, nasid_t, int);
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extern void sn_set_err_irq_affinity(unsigned int);
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extern struct list_head **sn_irq_lh;
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extern struct list_head **sn_irq_lh;
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#define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector)
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#define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector)
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@ -31,6 +31,7 @@ extern int sn_prom_feature_available(int id);
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#define PRF_PAL_CACHE_FLUSH_SAFE 0
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#define PRF_PAL_CACHE_FLUSH_SAFE 0
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#define PRF_DEVICE_FLUSH_LIST 1
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#define PRF_DEVICE_FLUSH_LIST 1
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#define PRF_HOTPLUG_SUPPORT 2
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#define PRF_HOTPLUG_SUPPORT 2
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#define PRF_CPU_DISABLE_SUPPORT 3
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/* --------------------- OS Features -------------------------------*/
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/* --------------------- OS Features -------------------------------*/
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