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[PATCH] patch 1/8] pciehp: use the PCI core for hotplug resource management

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This patch converts the pci express hotplug controller driver
to use the PCI core for resource management. This eliminates a
lot of duplicated code and integrates pciehp with the system's
normal PCI handling code.

Signed-off-by: Rajesh Shah <rajesh.shah@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
rajesh.shah@intel.com 2005-10-31 16:20:06 -08:00 committed by Greg Kroah-Hartman
parent 24a4e37706
commit 71b720c0f9
6 changed files with 84 additions and 3236 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
drivers/pci/hotplug/pciehp.h
View File

@ -59,14 +59,8 @@ struct pci_func {
u8 configured;
u8 switch_save;
u8 presence_save;
u32 base_length[0x06];
u8 base_type[0x06];
u16 reserved2;
u32 config_space[0x20];
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
struct pci_dev* pci_dev;
};
@ -90,12 +84,6 @@ struct slot {
struct list_head slot_list;
};
struct pci_resource {
struct pci_resource * next;
u32 base;
u32 length;
};
struct event_info {
u32 event_type;
u8 hp_slot;
@ -107,10 +95,6 @@ struct controller {
void *hpc_ctlr_handle; /* HPC controller handle */
int num_slots; /* Number of slots on ctlr */
int slot_num_inc; /* 1 or -1 */
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
struct pci_dev *pci_dev;
struct pci_bus *pci_bus;
struct event_info event_queue[10];
@ -133,20 +117,6 @@ struct controller {
u8 cap_base;
};
struct irq_mapping {
u8 barber_pole;
u8 valid_INT;
u8 interrupt[4];
};
struct resource_lists {
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
struct irq_mapping *irqs;
};
#define INT_BUTTON_IGNORE 0
#define INT_PRESENCE_ON 1
#define INT_PRESENCE_OFF 2
@ -203,14 +173,12 @@ struct resource_lists {
#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
#define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
#define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
#define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
/* controller functions */
extern int pciehprm_find_available_resources (struct controller *ctrl);
extern int pciehp_event_start_thread (void);
extern void pciehp_event_stop_thread (void);
extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
@ -224,19 +192,12 @@ extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
/* extern void long_delay (int delay); */
/* resource functions */
extern int pciehp_resource_sort_and_combine (struct pci_resource **head);
/* pci functions */
extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
/*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
extern int pciehp_save_used_resources (struct controller *ctrl, struct pci_func * func, int flag);
extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
extern void pciehp_destroy_board_resources (struct pci_func * func);
extern int pciehp_return_board_resources (struct pci_func * func, struct resource_lists * resources);
extern void pciehp_destroy_resource_list (struct resource_lists * resources);
extern int pciehp_configure_device (struct controller* ctrl, struct pci_func* func);
extern int pciehp_configure_device (struct slot *ctrl);
extern int pciehp_unconfigure_device (struct pci_func* func);
@ -289,15 +250,6 @@ static inline int wait_for_ctrl_irq(struct controller *ctrl)
return retval;
}
/* Puts node back in the resource list pointed to by head */
static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
{
if (!node || !head)
return;
node->next = *head;
*head = node;
}
#define SLOT_NAME_SIZE 10
static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)

35
drivers/pci/hotplug/pciehp_core.c
View File

@ -433,16 +433,8 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
goto err_out_free_ctrl_bus;
}
/* Get IO, memory, and IRQ resources for new devices */
rc = pciehprm_find_available_resources(ctrl);
ctrl->add_support = !rc;
ctrl->add_support = 1;
if (rc) {
dbg("pciehprm_find_available_resources = %#x\n", rc);
err("unable to locate PCI configuration resources for hot plug add.\n");
goto err_out_free_ctrl_bus;
}
/* Setup the slot information structures */
rc = init_slots(ctrl);
if (rc) {
@ -521,18 +513,6 @@ static int pcie_start_thread(void)
return retval;
}
static inline void __exit
free_pciehp_res(struct pci_resource *res)
{
struct pci_resource *tres;
while (res) {
tres = res;
res = res->next;
kfree(tres);
}
}
static void __exit unload_pciehpd(void)
{
struct pci_func *next;
@ -546,11 +526,6 @@ static void __exit unload_pciehpd(void)
while (ctrl) {
cleanup_slots(ctrl);
free_pciehp_res(ctrl->io_head);
free_pciehp_res(ctrl->mem_head);
free_pciehp_res(ctrl->p_mem_head);
free_pciehp_res(ctrl->bus_head);
kfree (ctrl->pci_bus);
ctrl->hpc_ops->release_ctlr(ctrl);
@ -564,11 +539,6 @@ static void __exit unload_pciehpd(void)
for (loop = 0; loop < 256; loop++) {
next = pciehp_slot_list[loop];
while (next != NULL) {
free_pciehp_res(next->io_head);
free_pciehp_res(next->mem_head);
free_pciehp_res(next->p_mem_head);
free_pciehp_res(next->bus_head);
TempSlot = next;
next = next->next;
kfree(TempSlot);
@ -652,8 +622,7 @@ static int __init pcied_init(void)
if (retval) {
pciehprm_cleanup();
pciehp_event_stop_thread();
} else
pciehprm_print_pirt();
};
return retval;
}

1563
drivers/pci/hotplug/pciehp_ctrl.c
View File

File diff suppressed because it is too large Load Diff

485
drivers/pci/hotplug/pciehp_pci.c
View File

@ -37,47 +37,70 @@
#include <linux/pci.h>
#include "../pci.h"
#include "pciehp.h"
#ifndef CONFIG_IA64
#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependant we are... */
#endif
int pciehp_configure_device (struct controller* ctrl, struct pci_func* func)
int pciehp_configure_device(struct slot *p_slot)
{
unsigned char bus;
struct pci_bus *child;
int num;
struct pci_dev *dev;
struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;
int num, fn;
if (func->pci_dev == NULL)
func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0));
if (dev) {
err("Device %s already exists at %x:%x, cannot hot-add\n",
pci_name(dev), p_slot->bus, p_slot->device);
return -EINVAL;
}
/* Still NULL ? Well then scan for it ! */
if (func->pci_dev == NULL) {
dbg("%s: pci_dev still null. do pci_scan_slot\n", __FUNCTION__);
num = pci_scan_slot(parent, PCI_DEVFN(p_slot->device, 0));
if (num == 0) {
err("No new device found\n");
return -ENODEV;
}
num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function));
if (num)
pci_bus_add_devices(ctrl->pci_dev->subordinate);
func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
if (func->pci_dev == NULL) {
dbg("ERROR: pci_dev still null\n");
return 0;
for (fn = 0; fn < 8; fn++) {
if (!(dev = pci_find_slot(p_slot->bus,
PCI_DEVFN(p_slot->device, fn))))
continue;
if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
err("Cannot hot-add display device %s\n",
pci_name(dev));
continue;
}
if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
(dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
/* Find an unused bus number for the new bridge */
struct pci_bus *child;
unsigned char busnr, start = parent->secondary;
unsigned char end = parent->subordinate;
for (busnr = start; busnr <= end; busnr++) {
if (!pci_find_bus(pci_domain_nr(parent),
busnr))
break;
}
if (busnr >= end) {
err("No free bus for hot-added bridge\n");
continue;
}
child = pci_add_new_bus(parent, dev, busnr);
if (!child) {
err("Cannot add new bus for %s\n",
pci_name(dev));
continue;
}
child->subordinate = pci_do_scan_bus(child);
pci_bus_size_bridges(child);
}
/* TBD: program firmware provided _HPP values */
/* program_fw_provided_values(dev); */
}
if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
child = pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
pci_do_scan_bus(child);
}
pci_bus_assign_resources(parent);
pci_bus_add_devices(parent);
pci_enable_bridges(parent);
return 0;
}
int pciehp_unconfigure_device(struct pci_func* func)
{
int rc = 0;
@ -104,47 +127,6 @@ int pciehp_unconfigure_device(struct pci_func* func)
return rc;
}
/*
* pciehp_set_irq
*
* @bus_num: bus number of PCI device
* @dev_num: device number of PCI device
* @slot: pointer to u8 where slot number will be returned
*/
int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
{
#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_IO_APIC)
int rc;
u16 temp_word;
struct pci_dev fakedev;
struct pci_bus fakebus;
fakedev.devfn = dev_num << 3;
fakedev.bus = &fakebus;
fakebus.number = bus_num;
dbg("%s: dev %d, bus %d, pin %d, num %d\n",
__FUNCTION__, dev_num, bus_num, int_pin, irq_num);
rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
dbg("%s: rc %d\n", __FUNCTION__, rc);
if (!rc)
return !rc;
/* set the Edge Level Control Register (ELCR) */
temp_word = inb(0x4d0);
temp_word |= inb(0x4d1) << 8;
temp_word |= 0x01 << irq_num;
/* This should only be for x86 as it sets the Edge Level Control Register */
outb((u8) (temp_word & 0xFF), 0x4d0);
outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
#endif
return 0;
}
/* More PCI configuration routines; this time centered around hotplug controller */
/*
* pciehp_save_config
*
@ -462,366 +444,3 @@ int pciehp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
return 0;
}
/*
* pciehp_save_used_resources
*
* Stores used resource information for existing boards. this is
* for boards that were in the system when this driver was loaded.
* this function is for hot plug ADD
*
* returns 0 if success
* if disable == 1(DISABLE_CARD),
* it loops for all functions of the slot and disables them.
* else, it just get resources of the function and return.
*/
int pciehp_save_used_resources(struct controller *ctrl, struct pci_func *func, int disable)
{
u8 cloop;
u8 header_type;
u8 secondary_bus;
u8 temp_byte;
u16 command;
u16 save_command;
u16 w_base, w_length;
u32 temp_register;
u32 save_base;
u32 base, length;
u64 base64 = 0;
int index = 0;
unsigned int devfn;
struct pci_resource *mem_node = NULL;
struct pci_resource *p_mem_node = NULL;
struct pci_resource *t_mem_node;
struct pci_resource *io_node;
struct pci_resource *bus_node;
struct pci_bus lpci_bus, *pci_bus;
memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
pci_bus = &lpci_bus;
if (disable)
func = pciehp_slot_find(func->bus, func->device, index++);
while ((func != NULL) && func->is_a_board) {
pci_bus->number = func->bus;
devfn = PCI_DEVFN(func->device, func->function);
/* Save the command register */
pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
if (disable) {
/* disable card */
command = 0x00;
pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
}
/* Check for Bridge */
pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n",
func->bus, func->device, save_command);
if (disable) {
/* Clear Bridge Control Register */
command = 0x00;
pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
}
pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
bus_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!bus_node)
return -ENOMEM;
bus_node->base = (ulong)secondary_bus;
bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
bus_node->next = func->bus_head;
func->bus_head = bus_node;
/* Save IO base and Limit registers */
pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &temp_byte);
base = temp_byte;
pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
length = temp_byte;
if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
io_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!io_node)
return -ENOMEM;
io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
io_node->length = (ulong)(length - base + 0x10) << 8;
io_node->next = func->io_head;
func->io_head = io_node;
}
/* Save memory base and Limit registers */
pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
mem_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!mem_node)
return -ENOMEM;
mem_node->base = (ulong)w_base << 16;
mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
mem_node->next = func->mem_head;
func->mem_head = mem_node;
}
/* Save prefetchable memory base and Limit registers */
pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
p_mem_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!p_mem_node)
return -ENOMEM;
p_mem_node->base = (ulong)w_base << 16;
p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
p_mem_node->next = func->p_mem_head;
func->p_mem_head = p_mem_node;
}
} else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n",
func->bus, func->device, save_command);
/* Figure out IO and memory base lengths */
for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
temp_register = 0xFFFFFFFF;
pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
if (!disable)
pci_bus_write_config_dword(pci_bus, devfn, cloop, save_base);
if (!temp_register)
continue;
base = temp_register;
if ((base & PCI_BASE_ADDRESS_SPACE_IO) &&
(!disable || (save_command & PCI_COMMAND_IO))) {
/* IO base */
/* set temp_register = amount of IO space requested */
base = base & 0xFFFFFFFCL;
base = (~base) + 1;
io_node = kmalloc(sizeof (struct pci_resource),
GFP_KERNEL);
if (!io_node)
return -ENOMEM;
io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
io_node->length = (ulong)base;
dbg("sur adapter: IO bar=0x%x(length=0x%x)\n",
io_node->base, io_node->length);
io_node->next = func->io_head;
func->io_head = io_node;
} else { /* map Memory */
int prefetchable = 1;
/* struct pci_resources **res_node; */
char *res_type_str = "PMEM";
u32 temp_register2;
t_mem_node = kmalloc(sizeof (struct pci_resource),
GFP_KERNEL);
if (!t_mem_node)
return -ENOMEM;
if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) &&
(!disable || (save_command & PCI_COMMAND_MEMORY))) {
prefetchable = 0;
mem_node = t_mem_node;
res_type_str++;
} else
p_mem_node = t_mem_node;
base = base & 0xFFFFFFF0L;
base = (~base) + 1;
switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
case PCI_BASE_ADDRESS_MEM_TYPE_32:
if (prefetchable) {
p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
p_mem_node->length = (ulong)base;
dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
res_type_str,
p_mem_node->base,
p_mem_node->length);
p_mem_node->next = func->p_mem_head;
func->p_mem_head = p_mem_node;
} else {
mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
mem_node->length = (ulong)base;
dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
res_type_str,
mem_node->base,
mem_node->length);
mem_node->next = func->mem_head;
func->mem_head = mem_node;
}
break;
case PCI_BASE_ADDRESS_MEM_TYPE_64:
pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
base64 = temp_register2;
base64 = (base64 << 32) | save_base;
if (temp_register2) {
dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n",
res_type_str, temp_register2, (u32)base64);
base64 &= 0x00000000FFFFFFFFL;
}
if (prefetchable) {
p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
p_mem_node->length = base;
dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
res_type_str,
p_mem_node->base,
p_mem_node->length);
p_mem_node->next = func->p_mem_head;
func->p_mem_head = p_mem_node;
} else {
mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
mem_node->length = base;
dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
res_type_str,
mem_node->base,
mem_node->length);
mem_node->next = func->mem_head;
func->mem_head = mem_node;
}
cloop += 4;
break;
default:
dbg("asur: reserved BAR type=0x%x\n",
temp_register);
break;
}
}
} /* End of base register loop */
} else { /* Some other unknown header type */
dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n",
func->bus, func->device);
}
/* find the next device in this slot */
if (!disable)
break;
func = pciehp_slot_find(func->bus, func->device, index++);
}
return 0;
}
/**
* kfree_resource_list: release memory of all list members
* @res: resource list to free
*/
static inline void
return_resource_list(struct pci_resource **func, struct pci_resource **res)
{
struct pci_resource *node;
struct pci_resource *t_node;
node = *func;
*func = NULL;
while (node) {
t_node = node->next;
return_resource(res, node);
node = t_node;
}
}
/*
* pciehp_return_board_resources
*
* this routine returns all resources allocated to a board to
* the available pool.
*
* returns 0 if success
*/
int pciehp_return_board_resources(struct pci_func * func,
struct resource_lists * resources)
{
int rc;
dbg("%s\n", __FUNCTION__);
if (!func)
return 1;
return_resource_list(&(func->io_head),&(resources->io_head));
return_resource_list(&(func->mem_head),&(resources->mem_head));
return_resource_list(&(func->p_mem_head),&(resources->p_mem_head));
return_resource_list(&(func->bus_head),&(resources->bus_head));
rc = pciehp_resource_sort_and_combine(&(resources->mem_head));
rc |= pciehp_resource_sort_and_combine(&(resources->p_mem_head));
rc |= pciehp_resource_sort_and_combine(&(resources->io_head));
rc |= pciehp_resource_sort_and_combine(&(resources->bus_head));
return rc;
}
/**
* kfree_resource_list: release memory of all list members
* @res: resource list to free
*/
static inline void
kfree_resource_list(struct pci_resource **r)
{
struct pci_resource *res, *tres;
res = *r;
*r = NULL;
while (res) {
tres = res;
res = res->next;
kfree(tres);
}
}
/**
* pciehp_destroy_resource_list: put node back in the resource list
* @resources: list to put nodes back
*/
void pciehp_destroy_resource_list(struct resource_lists * resources)
{
kfree_resource_list(&(resources->io_head));
kfree_resource_list(&(resources->mem_head));
kfree_resource_list(&(resources->p_mem_head));
kfree_resource_list(&(resources->bus_head));
}
/**
* pciehp_destroy_board_resources: put node back in the resource list
* @resources: list to put nodes back
*/
void pciehp_destroy_board_resources(struct pci_func * func)
{
kfree_resource_list(&(func->io_head));
kfree_resource_list(&(func->mem_head));
kfree_resource_list(&(func->p_mem_head));
kfree_resource_list(&(func->bus_head));
}

840
drivers/pci/hotplug/pciehprm_acpi.c
View File

@ -35,9 +35,6 @@
#include <linux/pci-acpi.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#ifdef CONFIG_IA64
#include <asm/iosapic.h>
#endif
#include <acpi/acpi.h>
#include <acpi/acpi_bus.h>
#include <acpi/actypes.h>
@ -84,10 +81,6 @@ struct acpi_php_slot {
int dev;
int fun;
u32 sun;
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
void *slot_ops; /* _STA, _EJx, etc */
struct slot *slot;
}; /* per func */
@ -104,14 +97,6 @@ struct acpi_bridge {
int bus; /* pdev->subordinate->number */
struct acpi__hpp *_hpp;
struct acpi_php_slot *slots;
struct pci_resource *tmem_head; /* total from crs */
struct pci_resource *tp_mem_head; /* total from crs */
struct pci_resource *tio_head; /* total from crs */
struct pci_resource *tbus_head; /* total from crs */
struct pci_resource *mem_head; /* available */
struct pci_resource *p_mem_head; /* available */
struct pci_resource *io_head; /* available */
struct pci_resource *bus_head; /* available */
int scanned;
int type;
};
@ -268,485 +253,6 @@ static int acpi_run_oshp ( struct acpi_bridge *ab)
return oshp_run_status;
}
static acpi_status acpi_evaluate_crs(
acpi_handle handle,
struct acpi_resource **retbuf
)
{
acpi_status status;
struct acpi_buffer crsbuf;
u8 *path_name = acpi_path_name(handle);
crsbuf.length = 0;
crsbuf.pointer = NULL;
status = acpi_get_current_resources (handle, &crsbuf);
switch (status) {
case AE_BUFFER_OVERFLOW:
break; /* found */
case AE_NOT_FOUND:
dbg("acpi_pciehprm:%s _CRS not found\n", path_name);
return status;
default:
err ("acpi_pciehprm:%s _CRS fail=0x%x\n", path_name, status);
return status;
}
crsbuf.pointer = kmalloc (crsbuf.length, GFP_KERNEL);
if (!crsbuf.pointer) {
err ("acpi_pciehprm: alloc %ld bytes for %s _CRS fail\n", (ulong)crsbuf.length, path_name);
return AE_NO_MEMORY;
}
status = acpi_get_current_resources (handle, &crsbuf);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm: %s _CRS fail=0x%x.\n", path_name, status);
kfree(crsbuf.pointer);
return status;
}
*retbuf = crsbuf.pointer;
return status;
}
static void free_pci_resource ( struct pci_resource *aprh)
{
struct pci_resource *res, *next;
for (res = aprh; res; res = next) {
next = res->next;
kfree(res);
}
}
static void print_pci_resource ( struct pci_resource *aprh)
{
struct pci_resource *res;
for (res = aprh; res; res = res->next)
dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
}
static void print_slot_resources( struct acpi_php_slot *aps)
{
if (aps->bus_head) {
dbg(" BUS Resources:\n");
print_pci_resource (aps->bus_head);
}
if (aps->io_head) {
dbg(" IO Resources:\n");
print_pci_resource (aps->io_head);
}
if (aps->mem_head) {
dbg(" MEM Resources:\n");
print_pci_resource (aps->mem_head);
}
if (aps->p_mem_head) {
dbg(" PMEM Resources:\n");
print_pci_resource (aps->p_mem_head);
}
}
static void print_pci_resources( struct acpi_bridge *ab)
{
if (ab->tbus_head) {
dbg(" Total BUS Resources:\n");
print_pci_resource (ab->tbus_head);
}
if (ab->bus_head) {
dbg(" BUS Resources:\n");
print_pci_resource (ab->bus_head);
}
if (ab->tio_head) {
dbg(" Total IO Resources:\n");
print_pci_resource (ab->tio_head);
}
if (ab->io_head) {
dbg(" IO Resources:\n");
print_pci_resource (ab->io_head);
}
if (ab->tmem_head) {
dbg(" Total MEM Resources:\n");
print_pci_resource (ab->tmem_head);
}
if (ab->mem_head) {
dbg(" MEM Resources:\n");
print_pci_resource (ab->mem_head);
}
if (ab->tp_mem_head) {
dbg(" Total PMEM Resources:\n");
print_pci_resource (ab->tp_mem_head);
}
if (ab->p_mem_head) {
dbg(" PMEM Resources:\n");
print_pci_resource (ab->p_mem_head);
}
if (ab->_hpp) {
dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
}
}
static int pciehprm_delete_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
struct pci_resource *prevnode;
struct pci_resource *split_node;
ulong tbase;
pciehp_resource_sort_and_combine(aprh);
for (res = *aprh; res; res = res->next) {
if (res->base > base)
continue;
if ((res->base + res->length) < (base + size))
continue;
if (res->base < base) {
tbase = base;
if ((res->length - (tbase - res->base)) < size)
continue;
split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base;
split_node->length = tbase - res->base;
res->base = tbase;
res->length -= split_node->length;
split_node->next = res->next;
res->next = split_node;
}
if (res->length >= size) {
split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base + size;
split_node->length = res->length - size;
res->length = size;
split_node->next = res->next;
res->next = split_node;
}
if (*aprh == res) {
*aprh = res->next;
} else {
prevnode = *aprh;
while (prevnode->next != res)
prevnode = prevnode->next;
prevnode->next = res->next;
}
res->next = NULL;
kfree(res);
break;
}
return 0;
}
static int pciehprm_delete_resources(
struct pci_resource **aprh,
struct pci_resource *this
)
{
struct pci_resource *res;
for (res = this; res; res = res->next)
pciehprm_delete_resource(aprh, res->base, res->length);
return 0;
}
static int pciehprm_add_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
for (res = *aprh; res; res = res->next) {
if ((res->base + res->length) == base) {
res->length += size;
size = 0L;
break;
}
if (res->next == *aprh)
break;
}
if (size) {
res = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!res) {
err ("acpi_pciehprm: alloc for res fail\n");
return -ENOMEM;
}
memset(res, 0, sizeof (struct pci_resource));
res->base = base;
res->length = size;
res->next = *aprh;
*aprh = res;
}
return 0;
}
static int pciehprm_add_resources(
struct pci_resource **aprh,
struct pci_resource *this
)
{
struct pci_resource *res;
int rc = 0;
for (res = this; res && !rc; res = res->next)
rc = pciehprm_add_resource(aprh, res->base, res->length);
return rc;
}
static void acpi_parse_io (
struct acpi_bridge *ab,
union acpi_resource_data *data
)
{
struct acpi_resource_io *dataio;
dataio = (struct acpi_resource_io *) data;
dbg("Io Resource\n");
dbg(" %d bit decode\n", ACPI_DECODE_16 == dataio->io_decode ? 16:10);
dbg(" Range minimum base: %08X\n", dataio->min_base_address);
dbg(" Range maximum base: %08X\n", dataio->max_base_address);
dbg(" Alignment: %08X\n", dataio->alignment);
dbg(" Range Length: %08X\n", dataio->range_length);
}
static void acpi_parse_fixed_io (
struct acpi_bridge *ab,
union acpi_resource_data *data
)
{
struct acpi_resource_fixed_io *datafio;
datafio = (struct acpi_resource_fixed_io *) data;
dbg("Fixed Io Resource\n");
dbg(" Range base address: %08X", datafio->base_address);
dbg(" Range length: %08X", datafio->range_length);
}
static void acpi_parse_address16_32 (
struct acpi_bridge *ab,
union acpi_resource_data *data,
acpi_resource_type id
)
{
/*
* acpi_resource_address16 == acpi_resource_address32
* acpi_resource_address16 *data16 = (acpi_resource_address16 *) data;
*/
struct acpi_resource_address32 *data32 = (struct acpi_resource_address32 *) data;
struct pci_resource **aprh, **tprh;
if (id == ACPI_RSTYPE_ADDRESS16)
dbg("acpi_pciehprm:16-Bit Address Space Resource\n");
else
dbg("acpi_pciehprm:32-Bit Address Space Resource\n");
switch (data32->resource_type) {
case ACPI_MEMORY_RANGE:
dbg(" Resource Type: Memory Range\n");
aprh = &ab->mem_head;
tprh = &ab->tmem_head;
switch (data32->attribute.memory.cache_attribute) {
case ACPI_NON_CACHEABLE_MEMORY:
dbg(" Type Specific: Noncacheable memory\n");
break;
case ACPI_CACHABLE_MEMORY:
dbg(" Type Specific: Cacheable memory\n");
break;
case ACPI_WRITE_COMBINING_MEMORY:
dbg(" Type Specific: Write-combining memory\n");
break;
case ACPI_PREFETCHABLE_MEMORY:
aprh = &ab->p_mem_head;
dbg(" Type Specific: Prefetchable memory\n");
break;
default:
dbg(" Type Specific: Invalid cache attribute\n");
break;
}
dbg(" Type Specific: Read%s\n", ACPI_READ_WRITE_MEMORY == data32->attribute.memory.read_write_attribute ? "/Write":" Only");
break;
case ACPI_IO_RANGE:
dbg(" Resource Type: I/O Range\n");
aprh = &ab->io_head;
tprh = &ab->tio_head;
switch (data32->attribute.io.range_attribute) {
case ACPI_NON_ISA_ONLY_RANGES:
dbg(" Type Specific: Non-ISA Io Addresses\n");
break;
case ACPI_ISA_ONLY_RANGES:
dbg(" Type Specific: ISA Io Addresses\n");
break;
case ACPI_ENTIRE_RANGE:
dbg(" Type Specific: ISA and non-ISA Io Addresses\n");
break;
default:
dbg(" Type Specific: Invalid range attribute\n");
break;
}
break;
case ACPI_BUS_NUMBER_RANGE:
dbg(" Resource Type: Bus Number Range(fixed)\n");
/* fixup to be compatible with the rest of php driver */
data32->min_address_range++;
data32->address_length--;
aprh = &ab->bus_head;
tprh = &ab->tbus_head;
break;
default:
dbg(" Resource Type: Invalid resource type. Exiting.\n");
return;
}
dbg(" Resource %s\n", ACPI_CONSUMER == data32->producer_consumer ? "Consumer":"Producer");
dbg(" %s decode\n", ACPI_SUB_DECODE == data32->decode ? "Subtractive":"Positive");
dbg(" Min address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->min_address_fixed ? "":"not");
dbg(" Max address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->max_address_fixed ? "":"not");
dbg(" Granularity: %08X\n", data32->granularity);
dbg(" Address range min: %08X\n", data32->min_address_range);
dbg(" Address range max: %08X\n", data32->max_address_range);
dbg(" Address translation offset: %08X\n", data32->address_translation_offset);
dbg(" Address Length: %08X\n", data32->address_length);
if (0xFF != data32->resource_source.index) {
dbg(" Resource Source Index: %X\n", data32->resource_source.index);
/* dbg(" Resource Source: %s\n", data32->resource_source.string_ptr); */
}
pciehprm_add_resource(aprh, data32->min_address_range, data32->address_length);
}
static acpi_status acpi_parse_crs(
struct acpi_bridge *ab,
struct acpi_resource *crsbuf
)
{
acpi_status status = AE_OK;
struct acpi_resource *resource = crsbuf;
u8 count = 0;
u8 done = 0;
while (!done) {
dbg("acpi_pciehprm: PCI bus 0x%x Resource structure %x.\n", ab->bus, count++);
switch (resource->id) {
case ACPI_RSTYPE_IRQ:
dbg("Irq -------- Resource\n");
break;
case ACPI_RSTYPE_DMA:
dbg("DMA -------- Resource\n");
break;
case ACPI_RSTYPE_START_DPF:
dbg("Start DPF -------- Resource\n");
break;
case ACPI_RSTYPE_END_DPF:
dbg("End DPF -------- Resource\n");
break;
case ACPI_RSTYPE_IO:
acpi_parse_io (ab, &resource->data);
break;
case ACPI_RSTYPE_FIXED_IO:
acpi_parse_fixed_io (ab, &resource->data);
break;
case ACPI_RSTYPE_VENDOR:
dbg("Vendor -------- Resource\n");
break;
case ACPI_RSTYPE_END_TAG:
dbg("End_tag -------- Resource\n");
done = 1;
break;
case ACPI_RSTYPE_MEM24:
dbg("Mem24 -------- Resource\n");
break;
case ACPI_RSTYPE_MEM32:
dbg("Mem32 -------- Resource\n");
break;
case ACPI_RSTYPE_FIXED_MEM32:
dbg("Fixed Mem32 -------- Resource\n");
break;
case ACPI_RSTYPE_ADDRESS16:
acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS16);
break;
case ACPI_RSTYPE_ADDRESS32:
acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS32);
break;
case ACPI_RSTYPE_ADDRESS64:
info("Address64 -------- Resource unparsed\n");
break;
case ACPI_RSTYPE_EXT_IRQ:
dbg("Ext Irq -------- Resource\n");
break;
default:
dbg("Invalid -------- resource type 0x%x\n", resource->id);
break;
}
resource = (struct acpi_resource *) ((char *)resource + resource->length);
}
return status;
}
static acpi_status acpi_get_crs( struct acpi_bridge *ab)
{
acpi_status status;
struct acpi_resource *crsbuf;
status = acpi_evaluate_crs(ab->handle, &crsbuf);
if (ACPI_SUCCESS(status)) {
status = acpi_parse_crs(ab, crsbuf);
kfree(crsbuf);
pciehp_resource_sort_and_combine(&ab->bus_head);
pciehp_resource_sort_and_combine(&ab->io_head);
pciehp_resource_sort_and_combine(&ab->mem_head);
pciehp_resource_sort_and_combine(&ab->p_mem_head);
pciehprm_add_resources (&ab->tbus_head, ab->bus_head);
pciehprm_add_resources (&ab->tio_head, ab->io_head);
pciehprm_add_resources (&ab->tmem_head, ab->mem_head);
pciehprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
}
return status;
}
/* find acpi_bridge downword from ab. */
static struct acpi_bridge *
find_acpi_bridge_by_bus(
@ -1064,14 +570,6 @@ static struct acpi_bridge * add_host_bridge(
ab->scanned = 0;
ab->type = BRIDGE_TYPE_HOST;
/* get root pci bridge's current resources */
status = acpi_get_crs(ab);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s evaluate _CRS fail=0x%x\n", path_name, status);
kfree(ab);
return NULL;
}
status = pci_osc_control_set (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
if (ACPI_FAILURE(status)) {
err("%s: status %x\n", __FUNCTION__, status);
@ -1179,11 +677,6 @@ static void free_a_slot(struct acpi_php_slot *aps)
{
dbg(" free a php func of slot(0x%02x) on PCI b:d:f=0x%02x:%02x:%02x\n", aps->sun, aps->bus, aps->dev, aps->fun);
free_pci_resource (aps->io_head);
free_pci_resource (aps->bus_head);
free_pci_resource (aps->mem_head);
free_pci_resource (aps->p_mem_head);
kfree(aps);
}
@ -1208,15 +701,6 @@ static void free_a_bridge( struct acpi_bridge *ab)
free_a_slot(aps);
}
free_pci_resource (ab->io_head);
free_pci_resource (ab->tio_head);
free_pci_resource (ab->bus_head);
free_pci_resource (ab->tbus_head);
free_pci_resource (ab->mem_head);
free_pci_resource (ab->tmem_head);
free_pci_resource (ab->p_mem_head);
free_pci_resource (ab->tp_mem_head);
kfree(ab);
}
@ -1266,48 +750,6 @@ static int get_number_of_slots (
return slot_num;
}
static int print_acpi_resources (struct acpi_bridge *ab)
{
struct acpi_php_slot *aps;
int i;
switch (ab->type) {
case BRIDGE_TYPE_HOST:
dbg("PCI HOST Bridge (%x) [%s]\n", ab->bus, acpi_path_name(ab->handle));
break;
case BRIDGE_TYPE_P2P:
dbg("PCI P2P Bridge (%x-%x) [%s]\n", ab->pbus, ab->bus, acpi_path_name(ab->handle));
break;
};
print_pci_resources (ab);
for ( i = -1, aps = ab->slots; aps; aps = aps->next) {
if (aps->dev == i)
continue;
dbg(" Slot sun(%x) s:b:d:f(%02x:%02x:%02x:%02x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
print_slot_resources(aps);
i = aps->dev;
}
if (ab->child)
print_acpi_resources (ab->child);
if (ab->next)
print_acpi_resources (ab->next);
return 0;
}
int pciehprm_print_pirt(void)
{
dbg("PCIEHPRM ACPI Slots\n");
if (acpi_bridges_head)
print_acpi_resources (acpi_bridges_head);
return 0;
}
static struct acpi_php_slot * get_acpi_slot (
struct acpi_bridge *ab,
u32 sun
@ -1349,288 +791,6 @@ void * pciehprm_get_slot(struct slot *slot)
}
#endif
static void pciehprm_dump_func_res( struct pci_func *fun)
{
struct pci_func *func = fun;
if (func->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (func->bus_head);
}
if (func->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (func->io_head);
}
if (func->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (func->mem_head);
}
if (func->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (func->p_mem_head);
}
}
static void pciehprm_dump_ctrl_res( struct controller *ctlr)
{
struct controller *ctrl = ctlr;
if (ctrl->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (ctrl->bus_head);
}
if (ctrl->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (ctrl->io_head);
}
if (ctrl->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (ctrl->mem_head);
}
if (ctrl->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (ctrl->p_mem_head);
}
}
static int pciehprm_get_used_resources (
struct controller *ctrl,
struct pci_func *func
)
{
return pciehp_save_used_resources (ctrl, func, !DISABLE_CARD);
}
static int configure_existing_function(
struct controller *ctrl,
struct pci_func *func
)
{
int rc;
/* see how much resources the func has used. */
rc = pciehprm_get_used_resources (ctrl, func);
if (!rc) {
/* subtract the resources used by the func from ctrl resources */
rc = pciehprm_delete_resources (&ctrl->bus_head, func->bus_head);
rc |= pciehprm_delete_resources (&ctrl->io_head, func->io_head);
rc |= pciehprm_delete_resources (&ctrl->mem_head, func->mem_head);
rc |= pciehprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
if (rc)
warn("aCEF: cannot del used resources\n");
} else
err("aCEF: cannot get used resources\n");
return rc;
}
static int bind_pci_resources_to_slots ( struct controller *ctrl)
{
struct pci_func *func, new_func;
int busn = ctrl->slot_bus;
int devn, funn;
u32 vid;
for (devn = 0; devn < 32; devn++) {
for (funn = 0; funn < 8; funn++) {
/*
if (devn == ctrl->device && funn == ctrl->function)
continue;
*/
/* find out if this entry is for an occupied slot */
vid = 0xFFFFFFFF;
pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
if (vid != 0xFFFFFFFF) {
dbg("%s: vid = %x\n", __FUNCTION__, vid);
func = pciehp_slot_find(busn, devn, funn);
if (!func) {
memset(&new_func, 0, sizeof(struct pci_func));
new_func.bus = busn;
new_func.device = devn;
new_func.function = funn;
new_func.is_a_board = 1;
configure_existing_function(ctrl, &new_func);
pciehprm_dump_func_res(&new_func);
} else {
configure_existing_function(ctrl, func);
pciehprm_dump_func_res(func);
}
dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
}
}
}
return 0;
}
static int bind_pci_resources(
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int status = 0;
if (ab->bus_head) {
dbg("bapr: BUS Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->bus_head, ab->bus_head);
if (pciehprm_delete_resources (&ab->bus_head, ctrl->bus_head))
warn("bapr: cannot sub BUS Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: BUS Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No BUS Resource on PCI 0x%x.\n", ab->bus);
if (ab->io_head) {
dbg("bapr: IO Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->io_head, ab->io_head);
if (pciehprm_delete_resources (&ab->io_head, ctrl->io_head))
warn("bapr: cannot sub IO Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: IO Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No IO Resource on PCI 0x%x.\n", ab->bus);
if (ab->mem_head) {
dbg("bapr: MEM Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->mem_head, ab->mem_head);
if (pciehprm_delete_resources (&ab->mem_head, ctrl->mem_head))
warn("bapr: cannot sub MEM Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: MEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No MEM Resource on PCI 0x%x.\n", ab->bus);
if (ab->p_mem_head) {
dbg("bapr: PMEM Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->p_mem_head, ab->p_mem_head);
if (pciehprm_delete_resources (&ab->p_mem_head, ctrl->p_mem_head))
warn("bapr: cannot sub PMEM Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: PMEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No PMEM Resource on PCI 0x%x.\n", ab->bus);
return status;
}
static int no_pci_resources( struct acpi_bridge *ab)
{
return !(ab->p_mem_head || ab->mem_head || ab->io_head || ab->bus_head);
}
static int find_pci_bridge_resources (
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int rc = 0;
struct pci_func func;
memset(&func, 0, sizeof(struct pci_func));
func.bus = ab->pbus;
func.device = ab->pdevice;
func.function = ab->pfunction;
func.is_a_board = 1;
/* Get used resources for this PCI bridge */
rc = pciehp_save_used_resources (ctrl, &func, !DISABLE_CARD);
ab->io_head = func.io_head;
ab->mem_head = func.mem_head;
ab->p_mem_head = func.p_mem_head;
ab->bus_head = func.bus_head;
if (ab->bus_head)
pciehprm_delete_resource(&ab->bus_head, ctrl->pci_dev->subordinate->number, 1);
return rc;
}
static int get_pci_resources_from_bridge(
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int rc = 0;
dbg("grfb: Get Resources for PCI 0x%x from actual PCI bridge 0x%x.\n", ctrl->bus, ab->bus);
rc = find_pci_bridge_resources (ctrl, ab);
pciehp_resource_sort_and_combine(&ab->bus_head);
pciehp_resource_sort_and_combine(&ab->io_head);
pciehp_resource_sort_and_combine(&ab->mem_head);
pciehp_resource_sort_and_combine(&ab->p_mem_head);
pciehprm_add_resources (&ab->tbus_head, ab->bus_head);
pciehprm_add_resources (&ab->tio_head, ab->io_head);
pciehprm_add_resources (&ab->tmem_head, ab->mem_head);
pciehprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
return rc;
}
static int get_pci_resources(
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int rc = 0;
if (no_pci_resources(ab)) {
dbg("spbr:PCI 0x%x has no resources. Get parent resources.\n", ab->bus);
rc = get_pci_resources_from_bridge(ctrl, ab);
}
return rc;
}
/*
* Get resources for this ctrl.
* 1. get total resources from ACPI _CRS or bridge (this ctrl)
* 2. find used resources of existing adapters
* 3. subtract used resources from total resources
*/
int pciehprm_find_available_resources( struct controller *ctrl)
{
int rc = 0;
struct acpi_bridge *ab;
ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->pci_dev->subordinate->number);
if (!ab) {
err("pfar:cannot locate acpi bridge of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number);
return -1;
}
if (no_pci_resources(ab)) {
rc = get_pci_resources(ctrl, ab);
if (rc) {
err("pfar:cannot get pci resources of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number);
return -1;
}
}
rc = bind_pci_resources(ctrl, ab);
dbg("pfar:pre-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
pciehprm_dump_ctrl_res(ctrl);
bind_pci_resources_to_slots (ctrl);
dbg("pfar:post-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
pciehprm_dump_ctrl_res(ctrl);
return rc;
}
int pciehprm_set_hpp(
struct controller *ctrl,
struct pci_func *func,

347
drivers/pci/hotplug/pciehprm_nonacpi.c
View File

@ -35,12 +35,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <asm/uaccess.h>
#ifdef CONFIG_IA64
#include <asm/iosapic.h>
#endif
#include "pciehp.h"
#include "pciehprm.h"
#include "pciehprm_nonacpi.h"
@ -51,11 +46,6 @@ void pciehprm_cleanup(void)
return;
}
int pciehprm_print_pirt(void)
{
return 0;
}
int pciehprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
{
@ -63,343 +53,6 @@ int pciehprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
return 0;
}
static void print_pci_resource ( struct pci_resource *aprh)
{
struct pci_resource *res;
for (res = aprh; res; res = res->next)
dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
}
static void phprm_dump_func_res( struct pci_func *fun)
{
struct pci_func *func = fun;
if (func->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (func->bus_head);
}
if (func->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (func->io_head);
}
if (func->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (func->mem_head);
}
if (func->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (func->p_mem_head);
}
}
static int phprm_get_used_resources (
struct controller *ctrl,
struct pci_func *func
)
{
return pciehp_save_used_resources (ctrl, func, !DISABLE_CARD);
}
static int phprm_delete_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
struct pci_resource *prevnode;
struct pci_resource *split_node;
ulong tbase;
pciehp_resource_sort_and_combine(aprh);
for (res = *aprh; res; res = res->next) {
if (res->base > base)
continue;
if ((res->base + res->length) < (base + size))
continue;
if (res->base < base) {
tbase = base;
if ((res->length - (tbase - res->base)) < size)
continue;
split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base;
split_node->length = tbase - res->base;
res->base = tbase;
res->length -= split_node->length;
split_node->next = res->next;
res->next = split_node;
}
if (res->length >= size) {
split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base + size;
split_node->length = res->length - size;
res->length = size;
split_node->next = res->next;
res->next = split_node;
}
if (*aprh == res) {
*aprh = res->next;
} else {
prevnode = *aprh;
while (prevnode->next != res)
prevnode = prevnode->next;
prevnode->next = res->next;
}
res->next = NULL;
kfree(res);
break;
}
return 0;
}
static int phprm_delete_resources(
struct pci_resource **aprh,
struct pci_resource *this
)
{
struct pci_resource *res;
for (res = this; res; res = res->next)
phprm_delete_resource(aprh, res->base, res->length);
return 0;
}
static int configure_existing_function(
struct controller *ctrl,
struct pci_func *func
)
{
int rc;
/* see how much resources the func has used. */
rc = phprm_get_used_resources (ctrl, func);
if (!rc) {
/* subtract the resources used by the func from ctrl resources */
rc = phprm_delete_resources (&ctrl->bus_head, func->bus_head);
rc |= phprm_delete_resources (&ctrl->io_head, func->io_head);
rc |= phprm_delete_resources (&ctrl->mem_head, func->mem_head);
rc |= phprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
if (rc)
warn("aCEF: cannot del used resources\n");
} else
err("aCEF: cannot get used resources\n");
return rc;
}
static int pciehprm_delete_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
struct pci_resource *prevnode;
struct pci_resource *split_node;
ulong tbase;
pciehp_resource_sort_and_combine(aprh);
for (res = *aprh; res; res = res->next) {
if (res->base > base)
continue;
if ((res->base + res->length) < (base + size))
continue;
if (res->base < base) {
tbase = base;
if ((res->length - (tbase - res->base)) < size)
continue;
split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base;
split_node->length = tbase - res->base;
res->base = tbase;
res->length -= split_node->length;
split_node->next = res->next;
res->next = split_node;
}
if (res->length >= size) {
split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base + size;
split_node->length = res->length - size;
res->length = size;
split_node->next = res->next;
res->next = split_node;
}
if (*aprh == res) {
*aprh = res->next;
} else {
prevnode = *aprh;
while (prevnode->next != res)
prevnode = prevnode->next;
prevnode->next = res->next;
}
res->next = NULL;
kfree(res);
break;
}
return 0;
}
static int bind_pci_resources_to_slots ( struct controller *ctrl)
{
struct pci_func *func, new_func;
int busn = ctrl->slot_bus;
int devn, funn;
u32 vid;
for (devn = 0; devn < 32; devn++) {
for (funn = 0; funn < 8; funn++) {
/*
if (devn == ctrl->device && funn == ctrl->function)
continue;
*/
/* find out if this entry is for an occupied slot */
vid = 0xFFFFFFFF;
pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
if (vid != 0xFFFFFFFF) {
dbg("%s: vid = %x bus %x dev %x fun %x\n", __FUNCTION__,
vid, busn, devn, funn);
func = pciehp_slot_find(busn, devn, funn);
dbg("%s: func = %p\n", __FUNCTION__,func);
if (!func) {
memset(&new_func, 0, sizeof(struct pci_func));
new_func.bus = busn;
new_func.device = devn;
new_func.function = funn;
new_func.is_a_board = 1;
configure_existing_function(ctrl, &new_func);
phprm_dump_func_res(&new_func);
} else {
configure_existing_function(ctrl, func);
phprm_dump_func_res(func);
}
dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
}
}
}
return 0;
}
static void phprm_dump_ctrl_res( struct controller *ctlr)
{
struct controller *ctrl = ctlr;
if (ctrl->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (ctrl->bus_head);
}
if (ctrl->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (ctrl->io_head);
}
if (ctrl->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (ctrl->mem_head);
}
if (ctrl->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (ctrl->p_mem_head);
}
}
/*
* phprm_find_available_resources
*
* Finds available memory, IO, and IRQ resources for programming
* devices which may be added to the system
* this function is for hot plug ADD!
*
* returns 0 if success
*/
int pciehprm_find_available_resources(struct controller *ctrl)
{
struct pci_func func;
u32 rc;
memset(&func, 0, sizeof(struct pci_func));
func.bus = ctrl->bus;
func.device = ctrl->device;
func.function = ctrl->function;
func.is_a_board = 1;
/* Get resources for this PCI bridge */
rc = pciehp_save_used_resources (ctrl, &func, !DISABLE_CARD);
dbg("%s: pciehp_save_used_resources rc = %d\n", __FUNCTION__, rc);
if (func.mem_head)
func.mem_head->next = ctrl->mem_head;
ctrl->mem_head = func.mem_head;
if (func.p_mem_head)
func.p_mem_head->next = ctrl->p_mem_head;
ctrl->p_mem_head = func.p_mem_head;
if (func.io_head)
func.io_head->next = ctrl->io_head;
ctrl->io_head = func.io_head;
if(func.bus_head)
func.bus_head->next = ctrl->bus_head;
ctrl->bus_head = func.bus_head;
if (ctrl->bus_head)
pciehprm_delete_resource(&ctrl->bus_head, ctrl->pci_dev->subordinate->number, 1);
dbg("%s:pre-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
phprm_dump_ctrl_res(ctrl);
dbg("%s: before bind_pci_resources_to slots\n", __FUNCTION__);
bind_pci_resources_to_slots (ctrl);
dbg("%s:post-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
phprm_dump_ctrl_res(ctrl);
return (rc);
}
int pciehprm_set_hpp(
struct controller *ctrl,
struct pci_func *func,