forked from luck/tmp_suning_uos_patched
ARM: uaccess: fix DACR mismatch with nested exceptions
Tomas Paukrt reports that his SAM9X60 based system (ARM926, ARMv5TJ) fails to fix up alignment faults, eventually resulting in a kernel oops. The problem occurs when using CONFIG_CPU_USE_DOMAINS with commite6978e4bf1
("ARM: save and reset the address limit when entering an exception"). This is because the address limit is set back to TASK_SIZE on exception entry, and, although it is restored on exception exit, the domain register is not. Hence, this sequence can occur: interrupt pt_regs->addr_limit = addr_limit // USER_DS addr_limit = USER_DS alignment exception __probe_kernel_read() old_fs = get_fs() // USER_DS set_fs(KERNEL_DS) addr_limit = KERNEL_DS dacr.kernel = DOMAIN_MANAGER interrupt pt_regs->addr_limit = addr_limit // KERNEL_DS addr_limit = USER_DS alignment exception __probe_kernel_read() old_fs = get_fs() // USER_DS set_fs(KERNEL_DS) addr_limit = KERNEL_DS dacr.kernel = DOMAIN_MANAGER ... set_fs(old_fs) addr_limit = USER_DS dacr.kernel = DOMAIN_CLIENT ... addr_limit = pt_regs->addr_limit // KERNEL_DS interrupt returns At this point, addr_limit is correctly restored to KERNEL_DS for __probe_kernel_read() to continue execution, but dacr.kernel is not, it has been reset by the set_fs(old_fs) to DOMAIN_CLIENT. This would not have happened prior to the mentioned commit, because addr_limit would remain KERNEL_DS, so get_fs() would have returned KERNEL_DS, and so would correctly nest. This commit fixes the problem by also saving the DACR on exception entry if either CONFIG_CPU_SW_DOMAIN_PAN or CONFIG_CPU_USE_DOMAINS are enabled, and resetting the DACR appropriately on exception entry to match addr_limit and PAN settings. Fixes:e6978e4bf1
("ARM: save and reset the address limit when entering an exception") Reported-by: Tomas Paukrt <tomas.paukrt@advantech.cz> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -67,15 +67,21 @@
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#endif
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.endm
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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#if defined(CONFIG_CPU_SW_DOMAIN_PAN) || defined(CONFIG_CPU_USE_DOMAINS)
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#define DACR(x...) x
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#else
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#define DACR(x...)
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#endif
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/*
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* Save the address limit on entry to a privileged exception and
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* if using PAN, save and disable usermode access.
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* Save the address limit on entry to a privileged exception.
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*
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* If we are using the DACR for kernel access by the user accessors
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* (CONFIG_CPU_USE_DOMAINS=y), always reset the DACR kernel domain
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* back to client mode, whether or not \disable is set.
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*
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* If we are using SW PAN, set the DACR user domain to no access
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* if \disable is set.
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*/
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.macro uaccess_entry, tsk, tmp0, tmp1, tmp2, disable
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ldr \tmp1, [\tsk, #TI_ADDR_LIMIT]
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@ -84,8 +90,17 @@
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DACR( mrc p15, 0, \tmp0, c3, c0, 0)
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DACR( str \tmp0, [sp, #SVC_DACR])
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str \tmp1, [sp, #SVC_ADDR_LIMIT]
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.if \disable
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uaccess_disable \tmp0
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.if \disable && IS_ENABLED(CONFIG_CPU_SW_DOMAIN_PAN)
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/* kernel=client, user=no access */
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mov \tmp2, #DACR_UACCESS_DISABLE
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mcr p15, 0, \tmp2, c3, c0, 0
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instr_sync
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.elseif IS_ENABLED(CONFIG_CPU_USE_DOMAINS)
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/* kernel=client */
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bic \tmp2, \tmp0, #domain_mask(DOMAIN_KERNEL)
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orr \tmp2, \tmp2, #domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT)
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mcr p15, 0, \tmp2, c3, c0, 0
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instr_sync
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.endif
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.endm
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