forked from luck/tmp_suning_uos_patched
omap: dma: Support for prefetch in destination synchronizedtransfer
Omap DMA controller can prefetch data in advance in case of destination synchronized data transfer. This may increase performance when target HW block doesn't have fifo. Data is waiting for transfer request in DMA fifo instead of read from memory. Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
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val = dma_read(CCR(lch));
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/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
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val &= ~((3 << 19) | 0x1f);
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val &= ~((1 << 23) | (3 << 19) | 0x1f);
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val |= (dma_trigger & ~0x1f) << 14;
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val |= dma_trigger & 0x1f;
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@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
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else
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val &= ~(1 << 18);
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if (src_or_dst_synch)
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val |= 1 << 24; /* source synch */
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else
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if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
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val &= ~(1 << 24); /* dest synch */
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val |= (1 << 23); /* Prefetch */
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} else if (src_or_dst_synch) {
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val |= 1 << 24; /* source synch */
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} else {
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val &= ~(1 << 24); /* dest synch */
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}
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dma_write(val, CCR(lch));
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}
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@ -345,6 +345,7 @@
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#define OMAP_DMA_SYNC_BLOCK 0x02
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#define OMAP_DMA_SYNC_PACKET 0x03
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#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
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#define OMAP_DMA_SRC_SYNC 0x01
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#define OMAP_DMA_DST_SYNC 0x00
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