forked from luck/tmp_suning_uos_patched
mfd: Convert WM8350 to genirq
This gives us use of the diagnostic facilities genirq provides and will allow implementation of interrupt support for the WM8350 GPIOs. Stub functions are provided to ease the transition of the individual drivers, probably after additional work to pass the IRQ numbers via the struct devices. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Mark Brown
Samuel Ortiz
parent
29c71b138c
commit
760e451878
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@ -18,7 +18,7 @@
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#include <linux/bug.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#include <linux/irq.h>
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#include <linux/mfd/wm8350/core.h>
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#include <linux/mfd/wm8350/audio.h>
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@ -29,8 +29,6 @@
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#include <linux/mfd/wm8350/supply.h>
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#include <linux/mfd/wm8350/wdt.h>
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#define WM8350_NUM_IRQ_REGS 7
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#define WM8350_INT_OFFSET_1 0
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#define WM8350_INT_OFFSET_2 1
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#define WM8350_POWER_UP_INT_OFFSET 2
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@ -366,19 +364,10 @@ static struct wm8350_irq_data wm8350_irqs[] = {
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},
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};
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static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq)
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static inline struct wm8350_irq_data *irq_to_wm8350_irq(struct wm8350 *wm8350,
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int irq)
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{
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mutex_lock(&wm8350->irq_mutex);
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if (wm8350->irq[irq].handler)
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wm8350->irq[irq].handler(irq, wm8350->irq[irq].data);
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else {
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dev_err(wm8350->dev, "irq %d nobody cared. now masked.\n",
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irq);
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wm8350_mask_irq(wm8350, irq);
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}
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mutex_unlock(&wm8350->irq_mutex);
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return &wm8350_irqs[irq - wm8350->irq_base];
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}
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/*
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@ -386,7 +375,9 @@ static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq)
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* interrupts are clear on read the IRQ line will be reasserted and
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* the physical IRQ will be handled again if another interrupt is
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* asserted while we run - in the normal course of events this is a
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* rare occurrence so we save I2C/SPI reads.
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* rare occurrence so we save I2C/SPI reads. We're also assuming that
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* it's rare to get lots of interrupts firing simultaneously so try to
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* minimise I/O.
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*/
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static irqreturn_t wm8350_irq(int irq, void *irq_data)
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{
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@ -397,7 +388,6 @@ static irqreturn_t wm8350_irq(int irq, void *irq_data)
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struct wm8350_irq_data *data;
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int i;
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/* TODO: Use block reads to improve performance? */
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level_one = wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS)
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& ~wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK);
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@ -416,93 +406,101 @@ static irqreturn_t wm8350_irq(int irq, void *irq_data)
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sub_reg[data->reg] =
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wm8350_reg_read(wm8350, WM8350_INT_STATUS_1 +
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data->reg);
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sub_reg[data->reg] &=
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~wm8350_reg_read(wm8350,
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WM8350_INT_STATUS_1_MASK +
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data->reg);
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sub_reg[data->reg] &= ~wm8350->irq_masks[data->reg];
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read_done[data->reg] = 1;
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}
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if (sub_reg[data->reg] & data->mask)
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wm8350_irq_call_handler(wm8350, i);
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handle_nested_irq(wm8350->irq_base + i);
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}
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return IRQ_HANDLED;
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}
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int wm8350_register_irq(struct wm8350 *wm8350, int irq,
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irq_handler_t handler, unsigned long flags,
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const char *name, void *data)
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static void wm8350_irq_lock(unsigned int irq)
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{
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if (irq < 0 || irq >= WM8350_NUM_IRQ || !handler)
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return -EINVAL;
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struct wm8350 *wm8350 = get_irq_chip_data(irq);
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if (wm8350->irq[irq].handler)
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return -EBUSY;
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mutex_lock(&wm8350->irq_mutex);
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wm8350->irq[irq].handler = handler;
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wm8350->irq[irq].data = data;
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mutex_unlock(&wm8350->irq_mutex);
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wm8350_unmask_irq(wm8350, irq);
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return 0;
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mutex_lock(&wm8350->irq_lock);
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}
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EXPORT_SYMBOL_GPL(wm8350_register_irq);
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int wm8350_free_irq(struct wm8350 *wm8350, int irq, void *data)
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static void wm8350_irq_sync_unlock(unsigned int irq)
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{
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if (irq < 0 || irq >= WM8350_NUM_IRQ)
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return -EINVAL;
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struct wm8350 *wm8350 = get_irq_chip_data(irq);
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int i;
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wm8350_mask_irq(wm8350, irq);
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for (i = 0; i < ARRAY_SIZE(wm8350->irq_masks); i++) {
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/* If there's been a change in the mask write it back
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* to the hardware. */
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if (wm8350->irq_masks[i] !=
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wm8350->reg_cache[WM8350_INT_STATUS_1_MASK + i])
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WARN_ON(wm8350_reg_write(wm8350,
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WM8350_INT_STATUS_1_MASK + i,
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wm8350->irq_masks[i]));
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}
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mutex_lock(&wm8350->irq_mutex);
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wm8350->irq[irq].handler = NULL;
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mutex_unlock(&wm8350->irq_mutex);
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return 0;
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mutex_unlock(&wm8350->irq_lock);
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}
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EXPORT_SYMBOL_GPL(wm8350_free_irq);
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int wm8350_mask_irq(struct wm8350 *wm8350, int irq)
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static void wm8350_irq_enable(unsigned int irq)
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{
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK +
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wm8350_irqs[irq].reg,
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wm8350_irqs[irq].mask);
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}
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EXPORT_SYMBOL_GPL(wm8350_mask_irq);
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struct wm8350 *wm8350 = get_irq_chip_data(irq);
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struct wm8350_irq_data *irq_data = irq_to_wm8350_irq(wm8350, irq);
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int wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
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{
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return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK +
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wm8350_irqs[irq].reg,
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wm8350_irqs[irq].mask);
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wm8350->irq_masks[irq_data->reg] &= ~irq_data->mask;
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}
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EXPORT_SYMBOL_GPL(wm8350_unmask_irq);
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static void wm8350_irq_disable(unsigned int irq)
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{
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struct wm8350 *wm8350 = get_irq_chip_data(irq);
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struct wm8350_irq_data *irq_data = irq_to_wm8350_irq(wm8350, irq);
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wm8350->irq_masks[irq_data->reg] |= irq_data->mask;
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}
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static struct irq_chip wm8350_irq_chip = {
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.name = "wm8350",
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.bus_lock = wm8350_irq_lock,
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.bus_sync_unlock = wm8350_irq_sync_unlock,
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.disable = wm8350_irq_disable,
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.enable = wm8350_irq_enable,
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};
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int wm8350_irq_init(struct wm8350 *wm8350, int irq,
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struct wm8350_platform_data *pdata)
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{
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int ret;
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int ret, cur_irq, i;
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int flags = IRQF_ONESHOT;
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if (!irq) {
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dev_err(wm8350->dev, "No IRQ configured\n");
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return -EINVAL;
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dev_warn(wm8350->dev, "No interrupt support, no core IRQ\n");
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return 0;
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}
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if (!pdata || !pdata->irq_base) {
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dev_warn(wm8350->dev, "No interrupt support, no IRQ base\n");
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return 0;
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}
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/* Mask top level interrupts */
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wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF);
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wm8350_reg_write(wm8350, WM8350_INT_STATUS_1_MASK, 0xFFFF);
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wm8350_reg_write(wm8350, WM8350_INT_STATUS_2_MASK, 0xFFFF);
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wm8350_reg_write(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, 0xFFFF);
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wm8350_reg_write(wm8350, WM8350_GPIO_INT_STATUS_MASK, 0xFFFF);
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wm8350_reg_write(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK, 0xFFFF);
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mutex_init(&wm8350->irq_mutex);
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/* Mask all individual interrupts by default and cache the
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* masks. We read the masks back since there are unwritable
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* bits in the mask registers. */
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for (i = 0; i < ARRAY_SIZE(wm8350->irq_masks); i++) {
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wm8350_reg_write(wm8350, WM8350_INT_STATUS_1_MASK + i,
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0xFFFF);
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wm8350->irq_masks[i] =
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wm8350_reg_read(wm8350,
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WM8350_INT_STATUS_1_MASK + i);
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}
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mutex_init(&wm8350->irq_lock);
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wm8350->chip_irq = irq;
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wm8350->irq_base = pdata->irq_base;
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if (pdata && pdata->irq_high) {
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if (pdata->irq_high) {
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flags |= IRQF_TRIGGER_HIGH;
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wm8350_set_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
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@ -514,11 +512,32 @@ int wm8350_irq_init(struct wm8350 *wm8350, int irq,
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WM8350_IRQ_POL);
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}
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/* Register with genirq */
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for (cur_irq = wm8350->irq_base;
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cur_irq < ARRAY_SIZE(wm8350_irqs) + wm8350->irq_base;
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cur_irq++) {
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set_irq_chip_data(cur_irq, wm8350);
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set_irq_chip_and_handler(cur_irq, &wm8350_irq_chip,
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handle_edge_irq);
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set_irq_nested_thread(cur_irq, 1);
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/* ARM needs us to explicitly flag the IRQ as valid
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* and will set them noprobe when we do so. */
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#ifdef CONFIG_ARM
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set_irq_flags(cur_irq, IRQF_VALID);
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#else
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set_irq_noprobe(cur_irq);
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#endif
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}
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ret = request_threaded_irq(irq, NULL, wm8350_irq, flags,
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"wm8350", wm8350);
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if (ret != 0)
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dev_err(wm8350->dev, "Failed to request IRQ: %d\n", ret);
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/* Allow interrupts to fire */
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wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0);
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return ret;
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}
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@ -579,6 +579,8 @@
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#define WM8350_NUM_IRQ 63
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#define WM8350_NUM_IRQ_REGS 7
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struct wm8350_reg_access {
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u16 readable; /* Mask of readable bits */
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u16 writable; /* Mask of writable bits */
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@ -600,11 +602,6 @@ extern const u16 wm8352_mode3_defaults[];
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struct wm8350;
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struct wm8350_irq {
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irq_handler_t handler;
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void *data;
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};
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struct wm8350_hwmon {
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struct platform_device *pdev;
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struct device *classdev;
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@ -626,9 +623,10 @@ struct wm8350 {
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struct mutex auxadc_mutex;
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/* Interrupt handling */
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struct mutex irq_mutex; /* IRQ table mutex */
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struct wm8350_irq irq[WM8350_NUM_IRQ];
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struct mutex irq_lock;
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int chip_irq;
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int irq_base;
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u16 irq_masks[WM8350_NUM_IRQ_REGS];
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/* Client devices */
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struct wm8350_codec codec;
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@ -677,13 +675,33 @@ int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
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/*
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* WM8350 internal interrupts
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*/
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int wm8350_register_irq(struct wm8350 *wm8350, int irq,
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irq_handler_t handler, unsigned long flags,
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const char *name, void *data);
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int wm8350_free_irq(struct wm8350 *wm8350, int irq, void *data);
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static inline int wm8350_register_irq(struct wm8350 *wm8350, int irq,
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irq_handler_t handler,
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unsigned long flags,
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const char *name, void *data)
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{
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if (!wm8350->irq_base)
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return -ENODEV;
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return request_threaded_irq(irq + wm8350->irq_base, NULL,
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handler, flags, name, data);
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}
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static inline void wm8350_free_irq(struct wm8350 *wm8350, int irq, void *data)
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{
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free_irq(irq + wm8350->irq_base, data);
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}
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static inline void wm8350_mask_irq(struct wm8350 *wm8350, int irq)
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{
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disable_irq(irq + wm8350->irq_base);
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}
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static inline void wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
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{
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enable_irq(irq + wm8350->irq_base);
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}
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int wm8350_mask_irq(struct wm8350 *wm8350, int irq);
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int wm8350_unmask_irq(struct wm8350 *wm8350, int irq);
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int wm8350_irq_init(struct wm8350 *wm8350, int irq,
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struct wm8350_platform_data *pdata);
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int wm8350_irq_exit(struct wm8350 *wm8350);
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