forked from luck/tmp_suning_uos_patched
drm/dp: Add helper to get post-cursor adjustments
If the transmitter supports pre-emphasis post cursor2 the sink will request adjustments in a similar way to how it requests adjustments to the voltage swing and pre-emphasis settings. Add a helper to extract these adjustments on a per-lane basis from the DPCD link status. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191021143437.1477719-8-thierry.reding@gmail.com
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@ -120,6 +120,16 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
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u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
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unsigned int lane)
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{
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unsigned int offset = DP_ADJUST_REQUEST_POST_CURSOR2;
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u8 value = dp_link_status(link_status, offset);
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return (value >> (lane << 1)) & 0x3;
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}
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EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
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void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
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{
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unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
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@ -605,6 +605,14 @@
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# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6
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#define DP_ADJUST_REQUEST_POST_CURSOR2 0x20c
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# define DP_ADJUST_POST_CURSOR2_LANE0_MASK 0x03
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# define DP_ADJUST_POST_CURSOR2_LANE0_SHIFT 0
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# define DP_ADJUST_POST_CURSOR2_LANE1_MASK 0x0c
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# define DP_ADJUST_POST_CURSOR2_LANE1_SHIFT 2
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# define DP_ADJUST_POST_CURSOR2_LANE2_MASK 0x30
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# define DP_ADJUST_POST_CURSOR2_LANE2_SHIFT 4
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# define DP_ADJUST_POST_CURSOR2_LANE3_MASK 0xc0
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# define DP_ADJUST_POST_CURSOR2_LANE3_SHIFT 6
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#define DP_TEST_REQUEST 0x218
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# define DP_TEST_LINK_TRAINING (1 << 0)
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@ -1122,6 +1130,8 @@ u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane);
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u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane);
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u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
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unsigned int lane);
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#define DP_BRANCH_OUI_HEADER_SIZE 0xc
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#define DP_RECEIVER_CAP_SIZE 0xf
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