forked from luck/tmp_suning_uos_patched
dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
Tegra210 uses PLLD out internally for CSI TPG. This patch adds a clock ID for this CSI TPG clock from PLLD. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -358,7 +358,7 @@
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#define TEGRA210_CLK_PLL_A_OUT0_OUT_ADSP 324
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#define TEGRA210_CLK_PLL_A_OUT0_OUT_ADSP 324
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/* 325 */
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/* 325 */
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#define TEGRA210_CLK_OSC 326
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#define TEGRA210_CLK_OSC 326
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/* 327 */
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#define TEGRA210_CLK_CSI_TPG 327
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/* 328 */
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/* 328 */
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/* 329 */
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/* 329 */
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/* 330 */
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/* 330 */
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