forked from luck/tmp_suning_uos_patched
drm/i915: reuse i915_gem_object_put_fence_reg for fence stealing code
This has a few functional changes against the old code: * a few more unnecessary loads and stores to the drm_i915_fence_reg objects. Also an unnecessary store to the hw fence register. * zaps any userspace mappings before doing other flushes. Only changes anything when userspace does racy stuff against itself. * also flush GTT domain. This is a noop, but still try to keep the bookkeeping correct. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
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1f7a6e372e
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798750e30d
@ -2460,39 +2460,16 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
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*/
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drm_gem_object_reference(old_obj);
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/* i915 uses fences for GPU access to tiled buffers */
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if (IS_I965G(dev) || !old_obj_priv->active)
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break;
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/* This brings the object to the head of the LRU if it
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* had been written to. The only way this should
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* result in us waiting longer than the expected
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* optimal amount of time is if there was a
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* fence-using buffer later that was read-only.
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*/
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i915_gem_object_flush_gpu_write_domain(old_obj);
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ret = i915_gem_object_wait_rendering(old_obj);
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if (ret != 0) {
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drm_gem_object_unreference(old_obj);
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return ret;
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}
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break;
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}
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/*
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* Zap this virtual mapping so we can set up a fence again
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* for this object next time we need it.
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*/
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i915_gem_release_mmap(old_obj);
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i = old_obj_priv->fence_reg;
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reg = &dev_priv->fence_regs[i];
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old_obj_priv->fence_reg = I915_FENCE_REG_NONE;
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list_del_init(&old_obj_priv->fence_list);
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ret = i915_gem_object_put_fence_reg(old_obj);
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drm_gem_object_unreference(old_obj);
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if (ret != 0)
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return ret;
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}
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obj_priv->fence_reg = i;
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