forked from luck/tmp_suning_uos_patched
[POWERPC] iSeries: DeCamelCase pci.c
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Stephen Rothwell
Paul Mackerras
parent
b9b1812cad
commit
7a73bd7f06
@ -138,19 +138,19 @@ static void __init allocate_device_bars(struct pci_dev *dev)
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* PCI: Read Vendor Failed 0x18.58.10 Rc: 0x00xx
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* PCI: Connect Bus Unit Failed 0x18.58.10 Rc: 0x00xx
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*/
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static void pci_Log_Error(char *Error_Text, int Bus, int SubBus,
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int AgentId, int HvRc)
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static void pci_log_error(char *error, int bus, int subbus,
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int agent, int hv_res)
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{
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if (HvRc == 0x0302)
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if (hv_res == 0x0302)
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return;
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printk(KERN_ERR "PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
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Error_Text, Bus, SubBus, AgentId, HvRc);
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error, bus, subbus, agent, hv_res);
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}
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/*
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* Look down the chain to find the matching Device Device
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*/
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static struct device_node *find_Device_Node(int bus, int devfn)
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static struct device_node *find_device_node(int bus, int devfn)
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{
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struct device_node *node;
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@ -170,14 +170,14 @@ void __init iSeries_pci_final_fixup(void)
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{
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struct pci_dev *pdev = NULL;
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struct device_node *node;
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int DeviceCount = 0;
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int num_dev = 0;
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/* Fix up at the device node and pci_dev relationship */
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mf_display_src(0xC9000100);
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printk("pcibios_final_fixup\n");
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for_each_pci_dev(pdev) {
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node = find_Device_Node(pdev->bus->number, pdev->devfn);
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node = find_device_node(pdev->bus->number, pdev->devfn);
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printk("pci dev %p (%x.%x), node %p\n", pdev,
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pdev->bus->number, pdev->devfn, node);
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@ -194,7 +194,7 @@ void __init iSeries_pci_final_fixup(void)
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err = HvCallXm_connectBusUnit(pdn->busno, pdn->bussubno,
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*agent, irq);
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if (err)
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pci_Log_Error("Connect Bus Unit",
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pci_log_error("Connect Bus Unit",
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pdn->busno, pdn->bussubno, *agent, err);
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else {
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err = HvCallPci_configStore8(pdn->busno, pdn->bussubno,
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@ -202,18 +202,18 @@ void __init iSeries_pci_final_fixup(void)
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PCI_INTERRUPT_LINE,
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irq);
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if (err)
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pci_Log_Error("PciCfgStore Irq Failed!",
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pci_log_error("PciCfgStore Irq Failed!",
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pdn->busno, pdn->bussubno, *agent, err);
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}
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if (!err)
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pdev->irq = irq;
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}
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++DeviceCount;
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++num_dev;
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pdev->sysdata = (void *)node;
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PCI_DN(node)->pcidev = pdev;
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allocate_device_bars(pdev);
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iSeries_Device_Information(pdev, DeviceCount);
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iSeries_Device_Information(pdev, num_dev);
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iommu_devnode_init_iSeries(pdev, node);
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} else
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printk("PCI: Device Tree not found for 0x%016lX\n",
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@ -229,13 +229,13 @@ void __init iSeries_pci_final_fixup(void)
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* Sanity Check Node PciDev to passed pci_dev
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* If none is found, returns a NULL which the client must handle.
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*/
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static struct device_node *get_Device_Node(struct pci_dev *pdev)
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static struct device_node *get_device_node(struct pci_dev *pdev)
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{
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struct device_node *node;
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node = pdev->sysdata;
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if (node == NULL || PCI_DN(node)->pcidev != pdev)
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node = find_Device_Node(pdev->bus->number, pdev->devfn);
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node = find_device_node(pdev->bus->number, pdev->devfn);
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return node;
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}
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#endif
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@ -262,7 +262,7 @@ static u64 hv_cfg_write_func[4] = {
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static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int size, u32 *val)
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{
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struct device_node *node = find_Device_Node(bus->number, devfn);
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struct device_node *node = find_device_node(bus->number, devfn);
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u64 fn;
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struct HvCallPci_LoadReturn ret;
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@ -292,7 +292,7 @@ static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int size, u32 val)
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{
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struct device_node *node = find_Device_Node(bus->number, devfn);
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struct device_node *node = find_device_node(bus->number, devfn);
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u64 fn;
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u64 ret;
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@ -324,15 +324,15 @@ static struct pci_ops iSeries_pci_ops = {
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* PCI: Device 23.90 ReadL Retry( 1)
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* PCI: Device 23.90 ReadL Retry Successful(1)
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*/
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static int CheckReturnCode(char *TextHdr, struct device_node *DevNode,
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static int check_return_code(char *type, struct device_node *dn,
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int *retry, u64 ret)
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{
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if (ret != 0) {
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struct pci_dn *pdn = PCI_DN(DevNode);
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struct pci_dn *pdn = PCI_DN(dn);
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(*retry)++;
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printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
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TextHdr, pdn->busno, pdn->devfn,
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type, pdn->busno, pdn->devfn,
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*retry, (int)ret);
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/*
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* Bump the retry and check for retry count exceeded.
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@ -356,28 +356,28 @@ static int CheckReturnCode(char *TextHdr, struct device_node *DevNode,
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* the exposure of being device global.
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*/
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static inline struct device_node *xlate_iomm_address(
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const volatile void __iomem *IoAddress,
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u64 *dsaptr, u64 *BarOffsetPtr)
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const volatile void __iomem *addr,
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u64 *dsaptr, u64 *bar_offset)
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{
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unsigned long OrigIoAddr;
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unsigned long BaseIoAddr;
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unsigned long TableIndex;
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struct device_node *DevNode;
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unsigned long orig_addr;
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unsigned long base_addr;
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unsigned long ind;
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struct device_node *dn;
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OrigIoAddr = (unsigned long __force)IoAddress;
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if ((OrigIoAddr < BASE_IO_MEMORY) || (OrigIoAddr >= max_io_memory))
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orig_addr = (unsigned long __force)addr;
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if ((orig_addr < BASE_IO_MEMORY) || (orig_addr >= max_io_memory))
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return NULL;
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BaseIoAddr = OrigIoAddr - BASE_IO_MEMORY;
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TableIndex = BaseIoAddr / IOMM_TABLE_ENTRY_SIZE;
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DevNode = iomm_table[TableIndex];
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base_addr = orig_addr - BASE_IO_MEMORY;
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ind = base_addr / IOMM_TABLE_ENTRY_SIZE;
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dn = iomm_table[ind];
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if (DevNode != NULL) {
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int barnum = iobar_table[TableIndex];
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*dsaptr = iseries_ds_addr(DevNode) | (barnum << 24);
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*BarOffsetPtr = BaseIoAddr % IOMM_TABLE_ENTRY_SIZE;
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if (dn != NULL) {
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int barnum = iobar_table[ind];
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*dsaptr = iseries_ds_addr(dn) | (barnum << 24);
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*bar_offset = base_addr % IOMM_TABLE_ENTRY_SIZE;
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} else
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panic("PCI: Invalid PCI IoAddress detected!\n");
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return DevNode;
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panic("PCI: Invalid PCI IO address detected!\n");
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return dn;
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}
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/*
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@ -385,16 +385,16 @@ static inline struct device_node *xlate_iomm_address(
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* On MM I/O error, all ones are returned and iSeries_pci_IoError is cal
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* else, data is returned in Big Endian format.
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*/
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static u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
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static u8 iSeries_read_byte(const volatile void __iomem *addr)
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{
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u64 BarOffset;
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u64 bar_offset;
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u64 dsa;
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int retry = 0;
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struct HvCallPci_LoadReturn ret;
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struct device_node *DevNode =
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xlate_iomm_address(IoAddress, &dsa, &BarOffset);
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struct device_node *dn =
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xlate_iomm_address(addr, &dsa, &bar_offset);
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if (DevNode == NULL) {
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if (dn == NULL) {
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static unsigned long last_jiffies;
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static int num_printed;
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@ -403,27 +403,27 @@ static u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
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num_printed = 0;
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}
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if (num_printed++ < 10)
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printk(KERN_ERR "iSeries_Read_Byte: invalid access at IO address %p\n",
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IoAddress);
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printk(KERN_ERR "iSeries_read_byte: invalid access at IO address %p\n",
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addr);
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return 0xff;
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}
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do {
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HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, BarOffset, 0);
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} while (CheckReturnCode("RDB", DevNode, &retry, ret.rc) != 0);
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HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, bar_offset, 0);
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} while (check_return_code("RDB", dn, &retry, ret.rc) != 0);
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return ret.value;
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}
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static u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
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static u16 iSeries_read_word(const volatile void __iomem *addr)
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{
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u64 BarOffset;
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u64 bar_offset;
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u64 dsa;
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int retry = 0;
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struct HvCallPci_LoadReturn ret;
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struct device_node *DevNode =
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xlate_iomm_address(IoAddress, &dsa, &BarOffset);
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struct device_node *dn =
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xlate_iomm_address(addr, &dsa, &bar_offset);
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if (DevNode == NULL) {
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if (dn == NULL) {
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static unsigned long last_jiffies;
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static int num_printed;
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@ -432,28 +432,28 @@ static u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
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num_printed = 0;
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}
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if (num_printed++ < 10)
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printk(KERN_ERR "iSeries_Read_Word: invalid access at IO address %p\n",
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IoAddress);
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printk(KERN_ERR "iSeries_read_word: invalid access at IO address %p\n",
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addr);
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return 0xffff;
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}
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do {
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HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
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BarOffset, 0);
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} while (CheckReturnCode("RDW", DevNode, &retry, ret.rc) != 0);
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bar_offset, 0);
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} while (check_return_code("RDW", dn, &retry, ret.rc) != 0);
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return ret.value;
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}
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static u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
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static u32 iSeries_read_long(const volatile void __iomem *addr)
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{
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u64 BarOffset;
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u64 bar_offset;
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u64 dsa;
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int retry = 0;
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struct HvCallPci_LoadReturn ret;
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struct device_node *DevNode =
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xlate_iomm_address(IoAddress, &dsa, &BarOffset);
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struct device_node *dn =
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xlate_iomm_address(addr, &dsa, &bar_offset);
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if (DevNode == NULL) {
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if (dn == NULL) {
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static unsigned long last_jiffies;
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static int num_printed;
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@ -462,14 +462,14 @@ static u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
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num_printed = 0;
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}
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if (num_printed++ < 10)
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printk(KERN_ERR "iSeries_Read_Long: invalid access at IO address %p\n",
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IoAddress);
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printk(KERN_ERR "iSeries_read_long: invalid access at IO address %p\n",
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addr);
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return 0xffffffff;
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}
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do {
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HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
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BarOffset, 0);
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} while (CheckReturnCode("RDL", DevNode, &retry, ret.rc) != 0);
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bar_offset, 0);
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} while (check_return_code("RDL", dn, &retry, ret.rc) != 0);
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return ret.value;
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}
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@ -478,16 +478,16 @@ static u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
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* Write MM I/O Instructions for the iSeries
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*
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*/
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static void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
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static void iSeries_write_byte(u8 data, volatile void __iomem *addr)
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{
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u64 BarOffset;
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u64 bar_offset;
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u64 dsa;
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int retry = 0;
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u64 rc;
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struct device_node *DevNode =
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xlate_iomm_address(IoAddress, &dsa, &BarOffset);
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struct device_node *dn =
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xlate_iomm_address(addr, &dsa, &bar_offset);
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if (DevNode == NULL) {
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if (dn == NULL) {
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static unsigned long last_jiffies;
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static int num_printed;
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@ -496,24 +496,24 @@ static void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
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num_printed = 0;
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}
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if (num_printed++ < 10)
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printk(KERN_ERR "iSeries_Write_Byte: invalid access at IO address %p\n", IoAddress);
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printk(KERN_ERR "iSeries_write_byte: invalid access at IO address %p\n", addr);
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return;
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}
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do {
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rc = HvCall4(HvCallPciBarStore8, dsa, BarOffset, data, 0);
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} while (CheckReturnCode("WWB", DevNode, &retry, rc) != 0);
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rc = HvCall4(HvCallPciBarStore8, dsa, bar_offset, data, 0);
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} while (check_return_code("WWB", dn, &retry, rc) != 0);
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}
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static void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
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static void iSeries_write_word(u16 data, volatile void __iomem *addr)
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{
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u64 BarOffset;
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u64 bar_offset;
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u64 dsa;
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int retry = 0;
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u64 rc;
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struct device_node *DevNode =
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xlate_iomm_address(IoAddress, &dsa, &BarOffset);
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struct device_node *dn =
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xlate_iomm_address(addr, &dsa, &bar_offset);
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if (DevNode == NULL) {
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if (dn == NULL) {
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static unsigned long last_jiffies;
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static int num_printed;
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@ -522,25 +522,25 @@ static void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
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num_printed = 0;
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}
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if (num_printed++ < 10)
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printk(KERN_ERR "iSeries_Write_Word: invalid access at IO address %p\n",
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IoAddress);
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printk(KERN_ERR "iSeries_write_word: invalid access at IO address %p\n",
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addr);
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return;
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}
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do {
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rc = HvCall4(HvCallPciBarStore16, dsa, BarOffset, data, 0);
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} while (CheckReturnCode("WWW", DevNode, &retry, rc) != 0);
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rc = HvCall4(HvCallPciBarStore16, dsa, bar_offset, data, 0);
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} while (check_return_code("WWW", dn, &retry, rc) != 0);
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}
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static void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
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static void iSeries_write_long(u32 data, volatile void __iomem *addr)
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{
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u64 BarOffset;
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u64 bar_offset;
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u64 dsa;
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int retry = 0;
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u64 rc;
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struct device_node *DevNode =
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xlate_iomm_address(IoAddress, &dsa, &BarOffset);
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struct device_node *dn =
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xlate_iomm_address(addr, &dsa, &bar_offset);
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if (DevNode == NULL) {
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if (dn == NULL) {
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static unsigned long last_jiffies;
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static int num_printed;
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@ -549,63 +549,63 @@ static void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
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num_printed = 0;
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}
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if (num_printed++ < 10)
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printk(KERN_ERR "iSeries_Write_Long: invalid access at IO address %p\n",
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IoAddress);
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printk(KERN_ERR "iSeries_write_long: invalid access at IO address %p\n",
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addr);
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return;
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}
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do {
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rc = HvCall4(HvCallPciBarStore32, dsa, BarOffset, data, 0);
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} while (CheckReturnCode("WWL", DevNode, &retry, rc) != 0);
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rc = HvCall4(HvCallPciBarStore32, dsa, bar_offset, data, 0);
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} while (check_return_code("WWL", dn, &retry, rc) != 0);
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}
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static u8 iseries_readb(const volatile void __iomem *addr)
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{
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return iSeries_Read_Byte(addr);
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return iSeries_read_byte(addr);
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}
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static u16 iseries_readw(const volatile void __iomem *addr)
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{
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return le16_to_cpu(iSeries_Read_Word(addr));
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return le16_to_cpu(iSeries_read_word(addr));
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}
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static u32 iseries_readl(const volatile void __iomem *addr)
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{
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return le32_to_cpu(iSeries_Read_Long(addr));
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return le32_to_cpu(iSeries_read_long(addr));
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}
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static u16 iseries_readw_be(const volatile void __iomem *addr)
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{
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return iSeries_Read_Word(addr);
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return iSeries_read_word(addr);
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}
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static u32 iseries_readl_be(const volatile void __iomem *addr)
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{
|
||||
return iSeries_Read_Long(addr);
|
||||
return iSeries_read_long(addr);
|
||||
}
|
||||
|
||||
static void iseries_writeb(u8 data, volatile void __iomem *addr)
|
||||
{
|
||||
iSeries_Write_Byte(data, addr);
|
||||
iSeries_write_byte(data, addr);
|
||||
}
|
||||
|
||||
static void iseries_writew(u16 data, volatile void __iomem *addr)
|
||||
{
|
||||
iSeries_Write_Word(cpu_to_le16(data), addr);
|
||||
iSeries_write_word(cpu_to_le16(data), addr);
|
||||
}
|
||||
|
||||
static void iseries_writel(u32 data, volatile void __iomem *addr)
|
||||
{
|
||||
iSeries_Write_Long(cpu_to_le32(data), addr);
|
||||
iSeries_write_long(cpu_to_le32(data), addr);
|
||||
}
|
||||
|
||||
static void iseries_writew_be(u16 data, volatile void __iomem *addr)
|
||||
{
|
||||
iSeries_Write_Word(data, addr);
|
||||
iSeries_write_word(data, addr);
|
||||
}
|
||||
|
||||
static void iseries_writel_be(u32 data, volatile void __iomem *addr)
|
||||
{
|
||||
iSeries_Write_Long(data, addr);
|
||||
iSeries_write_long(data, addr);
|
||||
}
|
||||
|
||||
static void iseries_readsb(const volatile void __iomem *addr, void *buf,
|
||||
@ -613,7 +613,7 @@ static void iseries_readsb(const volatile void __iomem *addr, void *buf,
|
||||
{
|
||||
u8 *dst = buf;
|
||||
while(count-- > 0)
|
||||
*(dst++) = iSeries_Read_Byte(addr);
|
||||
*(dst++) = iSeries_read_byte(addr);
|
||||
}
|
||||
|
||||
static void iseries_readsw(const volatile void __iomem *addr, void *buf,
|
||||
@ -621,7 +621,7 @@ static void iseries_readsw(const volatile void __iomem *addr, void *buf,
|
||||
{
|
||||
u16 *dst = buf;
|
||||
while(count-- > 0)
|
||||
*(dst++) = iSeries_Read_Word(addr);
|
||||
*(dst++) = iSeries_read_word(addr);
|
||||
}
|
||||
|
||||
static void iseries_readsl(const volatile void __iomem *addr, void *buf,
|
||||
@ -629,7 +629,7 @@ static void iseries_readsl(const volatile void __iomem *addr, void *buf,
|
||||
{
|
||||
u32 *dst = buf;
|
||||
while(count-- > 0)
|
||||
*(dst++) = iSeries_Read_Long(addr);
|
||||
*(dst++) = iSeries_read_long(addr);
|
||||
}
|
||||
|
||||
static void iseries_writesb(volatile void __iomem *addr, const void *buf,
|
||||
@ -637,7 +637,7 @@ static void iseries_writesb(volatile void __iomem *addr, const void *buf,
|
||||
{
|
||||
const u8 *src = buf;
|
||||
while(count-- > 0)
|
||||
iSeries_Write_Byte(*(src++), addr);
|
||||
iSeries_write_byte(*(src++), addr);
|
||||
}
|
||||
|
||||
static void iseries_writesw(volatile void __iomem *addr, const void *buf,
|
||||
@ -645,7 +645,7 @@ static void iseries_writesw(volatile void __iomem *addr, const void *buf,
|
||||
{
|
||||
const u16 *src = buf;
|
||||
while(count-- > 0)
|
||||
iSeries_Write_Word(*(src++), addr);
|
||||
iSeries_write_word(*(src++), addr);
|
||||
}
|
||||
|
||||
static void iseries_writesl(volatile void __iomem *addr, const void *buf,
|
||||
@ -653,7 +653,7 @@ static void iseries_writesl(volatile void __iomem *addr, const void *buf,
|
||||
{
|
||||
const u32 *src = buf;
|
||||
while(count-- > 0)
|
||||
iSeries_Write_Long(*(src++), addr);
|
||||
iSeries_write_long(*(src++), addr);
|
||||
}
|
||||
|
||||
static void iseries_memset_io(volatile void __iomem *addr, int c,
|
||||
@ -662,7 +662,7 @@ static void iseries_memset_io(volatile void __iomem *addr, int c,
|
||||
volatile char __iomem *d = addr;
|
||||
|
||||
while (n-- > 0)
|
||||
iSeries_Write_Byte(c, d++);
|
||||
iSeries_write_byte(c, d++);
|
||||
}
|
||||
|
||||
static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
|
||||
@ -672,7 +672,7 @@ static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
|
||||
const volatile char __iomem *s = src;
|
||||
|
||||
while (n-- > 0)
|
||||
*d++ = iSeries_Read_Byte(s++);
|
||||
*d++ = iSeries_read_byte(s++);
|
||||
}
|
||||
|
||||
static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
|
||||
@ -682,7 +682,7 @@ static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
|
||||
volatile char __iomem *d = dest;
|
||||
|
||||
while (n-- > 0)
|
||||
iSeries_Write_Byte(*s++, d++);
|
||||
iSeries_write_byte(*s++, d++);
|
||||
}
|
||||
|
||||
/* We only set MMIO ops. The default PIO ops will be default
|
||||
|
||||
Loading…
Reference in New Issue
Block a user