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lib/mpi/longlong.h: fix building with 32-bit x86

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The mpi library contains some rather old inline assembly statements that
produce a lot of warnings for 32-bit x86, such as:

  lib/mpi/mpih-div.c:76:16: error: invalid use of a cast in a inline asm context requiring an l-value: remove the cast or build with -fheinous-gnu-extensions
                                  udiv_qrnnd(qp[i], n1, n1, np[i], d);
                                  ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~
  lib/mpi/longlong.h:423:20: note: expanded from macro 'udiv_qrnnd'
          : "=a" ((USItype)(q)), \
                  ~~~~~~~~~~^~

There is no point in doing a type cast for the output of an inline
assembler statement, so just remove the cast here, as we have done for
other architectures in the past.

See also dea632cadd ("lib/mpi: fix build with clang").

Link: http://lkml.kernel.org/r/20190712090740.340186-1-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Dmitry Kasatkin <dmitry.kasatkin@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Arnd Bergmann 2019-07-16 16:25:54 -07:00 committed by Linus Torvalds
parent e5f2249ab8
commit 7b7c1df288
1 changed files with 8 additions and 8 deletions
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16
lib/mpi/longlong.h
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@ -397,8 +397,8 @@ do { \
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addl %5,%1\n" \ __asm__ ("addl %5,%1\n" \
"adcl %3,%0" \ "adcl %3,%0" \
: "=r" ((USItype)(sh)), \ : "=r" (sh), \
"=&r" ((USItype)(sl)) \ "=&r" (sl) \
: "%0" ((USItype)(ah)), \ : "%0" ((USItype)(ah)), \
"g" ((USItype)(bh)), \ "g" ((USItype)(bh)), \
"%1" ((USItype)(al)), \ "%1" ((USItype)(al)), \
@ -406,22 +406,22 @@ do { \
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subl %5,%1\n" \ __asm__ ("subl %5,%1\n" \
"sbbl %3,%0" \ "sbbl %3,%0" \
: "=r" ((USItype)(sh)), \ : "=r" (sh), \
"=&r" ((USItype)(sl)) \ "=&r" (sl) \
: "0" ((USItype)(ah)), \ : "0" ((USItype)(ah)), \
"g" ((USItype)(bh)), \ "g" ((USItype)(bh)), \
"1" ((USItype)(al)), \ "1" ((USItype)(al)), \
"g" ((USItype)(bl))) "g" ((USItype)(bl)))
#define umul_ppmm(w1, w0, u, v) \ #define umul_ppmm(w1, w0, u, v) \
__asm__ ("mull %3" \ __asm__ ("mull %3" \
: "=a" ((USItype)(w0)), \ : "=a" (w0), \
"=d" ((USItype)(w1)) \ "=d" (w1) \
: "%0" ((USItype)(u)), \ : "%0" ((USItype)(u)), \
"rm" ((USItype)(v))) "rm" ((USItype)(v)))
#define udiv_qrnnd(q, r, n1, n0, d) \ #define udiv_qrnnd(q, r, n1, n0, d) \
__asm__ ("divl %4" \ __asm__ ("divl %4" \
: "=a" ((USItype)(q)), \ : "=a" (q), \
"=d" ((USItype)(r)) \ "=d" (r) \
: "0" ((USItype)(n0)), \ : "0" ((USItype)(n0)), \
"1" ((USItype)(n1)), \ "1" ((USItype)(n1)), \
"rm" ((USItype)(d))) "rm" ((USItype)(d)))