forked from luck/tmp_suning_uos_patched
KVM: nSVM: inject exceptions via svm_check_nested_events
This allows exceptions injected by the emulator to be properly delivered as vmexits. The code also becomes simpler, because we can just let all L0-intercepted exceptions go through the usual path. In particular, our emulation of the VMX #DB exit qualification is very much simplified, because the vmexit injection path can use kvm_deliver_exception_payload to update DR6. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
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c9d40913ac
commit
7c86663b68
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@ -1495,6 +1495,8 @@ void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
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void kvm_inject_nmi(struct kvm_vcpu *vcpu);
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void kvm_update_dr7(struct kvm_vcpu *vcpu);
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int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
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int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
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void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
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@ -111,6 +111,8 @@ void recalc_intercepts(struct vcpu_svm *svm)
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h = &svm->nested.hsave->control;
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g = &svm->nested;
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svm->nested.host_intercept_exceptions = h->intercept_exceptions;
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c->intercept_cr = h->intercept_cr;
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c->intercept_dr = h->intercept_dr;
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c->intercept_exceptions = h->intercept_exceptions;
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@ -616,50 +618,6 @@ static int nested_svm_exit_handled_msr(struct vcpu_svm *svm)
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return (value & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
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}
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/* DB exceptions for our internal use must not cause vmexit */
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static int nested_svm_intercept_db(struct vcpu_svm *svm)
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{
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unsigned long dr6 = svm->vmcb->save.dr6;
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/* Always catch it and pass it to userspace if debugging. */
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if (svm->vcpu.guest_debug &
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(KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
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return NESTED_EXIT_HOST;
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/* if we're not singlestepping, it's not ours */
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if (!svm->nmi_singlestep)
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goto reflected_db;
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/* if it's not a singlestep exception, it's not ours */
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if (!(dr6 & DR6_BS))
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goto reflected_db;
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/* if the guest is singlestepping, it should get the vmexit */
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if (svm->nmi_singlestep_guest_rflags & X86_EFLAGS_TF) {
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disable_nmi_singlestep(svm);
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goto reflected_db;
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}
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/* it's ours, the nested hypervisor must not see this one */
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return NESTED_EXIT_HOST;
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reflected_db:
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/*
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* Synchronize guest DR6 here just like in kvm_deliver_exception_payload;
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* it will be moved into the nested VMCB by nested_svm_vmexit. Once
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* exceptions will be moved to svm_check_nested_events, all this stuff
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* will just go away and we could just return NESTED_EXIT_HOST
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* unconditionally. db_interception will queue the exception, which
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* will be processed by svm_check_nested_events if a nested vmexit is
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* required, and we will just use kvm_deliver_exception_payload to copy
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* the payload to DR6 before vmexit.
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*/
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WARN_ON(svm->vcpu.arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT);
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svm->vcpu.arch.dr6 &= ~(DR_TRAP_BITS | DR6_RTM);
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svm->vcpu.arch.dr6 |= dr6 & ~DR6_FIXED_1;
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return NESTED_EXIT_DONE;
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}
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static int nested_svm_intercept_ioio(struct vcpu_svm *svm)
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{
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unsigned port, size, iopm_len;
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@ -710,20 +668,12 @@ static int nested_svm_intercept(struct vcpu_svm *svm)
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break;
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}
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case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
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u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
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if (svm->nested.intercept_exceptions & excp_bits) {
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if (exit_code == SVM_EXIT_EXCP_BASE + DB_VECTOR)
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vmexit = nested_svm_intercept_db(svm);
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else if (exit_code == SVM_EXIT_EXCP_BASE + BP_VECTOR &&
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svm->vcpu.guest_debug & KVM_GUESTDBG_USE_SW_BP)
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vmexit = NESTED_EXIT_HOST;
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else
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vmexit = NESTED_EXIT_DONE;
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}
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/* async page fault always cause vmexit */
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else if ((exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR) &&
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svm->vcpu.arch.exception.nested_apf != 0)
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vmexit = NESTED_EXIT_DONE;
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/*
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* Host-intercepted exceptions have been checked already in
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* nested_svm_exit_special. There is nothing to do here,
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* the vmexit is injected by svm_check_nested_events.
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*/
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vmexit = NESTED_EXIT_DONE;
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break;
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}
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case SVM_EXIT_ERR: {
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@ -768,35 +718,45 @@ int nested_svm_check_permissions(struct vcpu_svm *svm)
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return 0;
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}
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int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
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bool has_error_code, u32 error_code)
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static bool nested_exit_on_exception(struct vcpu_svm *svm)
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{
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int vmexit;
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unsigned int nr = svm->vcpu.arch.exception.nr;
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if (!is_guest_mode(&svm->vcpu))
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return 0;
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return (svm->nested.intercept_exceptions & (1 << nr));
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}
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vmexit = nested_svm_intercept(svm);
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if (vmexit != NESTED_EXIT_DONE)
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return 0;
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static void nested_svm_inject_exception_vmexit(struct vcpu_svm *svm)
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{
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unsigned int nr = svm->vcpu.arch.exception.nr;
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svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
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svm->vmcb->control.exit_code_hi = 0;
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svm->vmcb->control.exit_info_1 = error_code;
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if (svm->vcpu.arch.exception.has_error_code)
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svm->vmcb->control.exit_info_1 = svm->vcpu.arch.exception.error_code;
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/*
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* EXITINFO2 is undefined for all exception intercepts other
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* than #PF.
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*/
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if (svm->vcpu.arch.exception.nested_apf)
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token;
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else if (svm->vcpu.arch.exception.has_payload)
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.exception.payload;
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else
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
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if (nr == PF_VECTOR) {
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if (svm->vcpu.arch.exception.nested_apf)
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token;
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else if (svm->vcpu.arch.exception.has_payload)
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.exception.payload;
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else
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
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} else if (nr == DB_VECTOR) {
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/* See inject_pending_event. */
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kvm_deliver_exception_payload(&svm->vcpu);
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if (svm->vcpu.arch.dr7 & DR7_GD) {
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svm->vcpu.arch.dr7 &= ~DR7_GD;
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kvm_update_dr7(&svm->vcpu);
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}
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} else
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WARN_ON(svm->vcpu.arch.exception.has_payload);
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svm->nested.exit_required = true;
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return vmexit;
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nested_svm_vmexit(svm);
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}
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static void nested_svm_smi(struct vcpu_svm *svm)
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@ -835,6 +795,15 @@ static int svm_check_nested_events(struct kvm_vcpu *vcpu)
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kvm_event_needs_reinjection(vcpu) || svm->nested.exit_required ||
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svm->nested.nested_run_pending;
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if (vcpu->arch.exception.pending) {
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if (block_nested_events)
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return -EBUSY;
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if (!nested_exit_on_exception(svm))
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return 0;
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nested_svm_inject_exception_vmexit(svm);
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return 0;
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}
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if (vcpu->arch.smi_pending && !svm_smi_blocked(vcpu)) {
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if (block_nested_events)
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return -EBUSY;
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@ -872,18 +841,19 @@ int nested_svm_exit_special(struct vcpu_svm *svm)
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switch (exit_code) {
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case SVM_EXIT_INTR:
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case SVM_EXIT_NMI:
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case SVM_EXIT_EXCP_BASE + MC_VECTOR:
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return NESTED_EXIT_HOST;
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case SVM_EXIT_NPF:
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/* For now we are always handling NPFs when using them */
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if (npt_enabled)
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return NESTED_EXIT_HOST;
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break;
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case SVM_EXIT_EXCP_BASE + PF_VECTOR:
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/* Trap async PF even if not shadowing */
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if (!npt_enabled || svm->vcpu.arch.apf.host_apf_reason)
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return NESTED_EXIT_HOST;
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case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
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u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
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if (get_host_vmcb(svm)->control.intercept_exceptions & excp_bits)
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return NESTED_EXIT_HOST;
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else if (exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR &&
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svm->vcpu.arch.apf.host_apf_reason)
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/* Trap async PF even if not shadowing */
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return NESTED_EXIT_HOST;
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break;
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}
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default:
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break;
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}
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@ -331,17 +331,8 @@ static void svm_queue_exception(struct kvm_vcpu *vcpu)
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struct vcpu_svm *svm = to_svm(vcpu);
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unsigned nr = vcpu->arch.exception.nr;
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bool has_error_code = vcpu->arch.exception.has_error_code;
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bool reinject = vcpu->arch.exception.injected;
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u32 error_code = vcpu->arch.exception.error_code;
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/*
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* If we are within a nested VM we'd better #VMEXIT and let the guest
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* handle the exception
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*/
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if (!reinject &&
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nested_svm_check_exception(svm, nr, has_error_code, error_code))
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return;
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kvm_deliver_exception_payload(&svm->vcpu);
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if (nr == BP_VECTOR && !nrips) {
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@ -86,6 +86,7 @@ struct nested_state {
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u64 hsave_msr;
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u64 vm_cr_msr;
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u64 vmcb;
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u32 host_intercept_exceptions;
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/* These are the merged vectors */
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u32 *msrpm;
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@ -1072,7 +1072,7 @@ static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
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}
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}
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static void kvm_update_dr7(struct kvm_vcpu *vcpu)
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void kvm_update_dr7(struct kvm_vcpu *vcpu)
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{
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unsigned long dr7;
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if (dr7 & DR7_BP_EN_MASK)
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vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
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}
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EXPORT_SYMBOL_GPL(kvm_update_dr7);
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static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
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{
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X86_EFLAGS_RF);
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if (vcpu->arch.exception.nr == DB_VECTOR) {
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/*
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* This code assumes that nSVM doesn't use
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* check_nested_events(). If it does, the
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* DR6/DR7 changes should happen before L1
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* gets a #VMEXIT for an intercepted #DB in
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* L2. (Under VMX, on the other hand, the
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* DR6/DR7 changes should not happen in the
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* event of a VM-exit to L1 for an intercepted
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* #DB in L2.)
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*/
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kvm_deliver_exception_payload(vcpu);
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if (vcpu->arch.dr7 & DR7_GD) {
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vcpu->arch.dr7 &= ~DR7_GD;
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