forked from luck/tmp_suning_uos_patched
arm64: KVM: Only force FPEXC32_EL2.EN if trapping FPSIMD
If trapping FPSIMD in the context of an AArch32 guest, it is critical
to set FPEXC32_EL2.EN to 1 so that the trapping is taken to EL2 and
not EL1.
Conversely, it is just as critical *not* to set FPEXC32_EL2.EN to 1
if we're not going to trap FPSIMD, as we then corrupt the existing
VFP state.
Moving the call to __activate_traps_fpsimd32 to the point where we
know for sure that we are going to trap ensures that we don't set that
bit spuriously.
Fixes: e6b673b741
("KVM: arm64: Optimise FPSIMD handling to reduce guest/host thrashing")
Cc: stable@vger.kernel.org # v4.18
Cc: Dave Martin <dave.martin@arm.com>
Reported-by: Alexander Graf <agraf@suse.de>
Tested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
This commit is contained in:
parent
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@ -98,8 +98,10 @@ static void activate_traps_vhe(struct kvm_vcpu *vcpu)
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val = read_sysreg(cpacr_el1);
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val |= CPACR_EL1_TTA;
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val &= ~CPACR_EL1_ZEN;
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if (!update_fp_enabled(vcpu))
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if (!update_fp_enabled(vcpu)) {
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val &= ~CPACR_EL1_FPEN;
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__activate_traps_fpsimd32(vcpu);
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}
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write_sysreg(val, cpacr_el1);
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@ -114,8 +116,10 @@ static void __hyp_text __activate_traps_nvhe(struct kvm_vcpu *vcpu)
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val = CPTR_EL2_DEFAULT;
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val |= CPTR_EL2_TTA | CPTR_EL2_TZ;
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if (!update_fp_enabled(vcpu))
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if (!update_fp_enabled(vcpu)) {
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val |= CPTR_EL2_TFP;
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__activate_traps_fpsimd32(vcpu);
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}
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write_sysreg(val, cptr_el2);
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}
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@ -129,7 +133,6 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu)
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if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE))
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write_sysreg_s(vcpu->arch.vsesr_el2, SYS_VSESR_EL2);
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__activate_traps_fpsimd32(vcpu);
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if (has_vhe())
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activate_traps_vhe(vcpu);
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else
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