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[AGPGART] Fix PCI-posting flush typo.

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Unfortunately there was a typo in one of the patches I sent,
(The one now committed to the agpgart tree).
It may cause a bus error on i810 type hardware.

Signed-off-by: Thomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: Dave Jones <davej@redhat.com>
This commit is contained in:
Thomas Hellstrom 2006-12-27 13:16:49 +01:00 committed by Dave Jones
parent c41e0deb50
commit 7f02d687b4
1 changed files with 1 additions and 1 deletions
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drivers/char/agp/intel-agp.c
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@ -253,7 +253,7 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
mem->memory[i], mem->type),
intel_i810_private.registers+I810_PTE_BASE+(j*4));
}
readl(intel_i810_private.registers+I810_PTE_BASE+(j-1*4)); /* PCI Posting. */
readl(intel_i810_private.registers+I810_PTE_BASE+((j-1)*4)); /* PCI Posting. */
agp_bridge->driver->tlb_flush(mem);
return 0;