forked from luck/tmp_suning_uos_patched
r8169: add helpers for per-device hw_start handler
They aim to limit the amount of moved code when the hw_start handler gets more specialized. No functional change. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Edward Hsu <edward_hsu@realtek.com.tw>
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07ce406467
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7f796d83ff
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@ -1813,7 +1813,7 @@ static void rtl8169_hw_reset(void __iomem *ioaddr)
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RTL_R8(ChipCmd);
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}
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static void rtl8169_set_rx_tx_config_registers(struct rtl8169_private *tp)
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static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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u32 cfg = rtl8169_rx_config;
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@ -1851,6 +1851,35 @@ static void rtl_hw_start(struct net_device *dev)
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}
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static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp,
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void __iomem *ioaddr)
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{
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/*
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* Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
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* register to be written before TxDescAddrLow to work.
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* Switching from MMIO to I/O access fixes the issue as well.
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*/
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RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32);
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RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_32BIT_MASK);
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RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32);
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RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_32BIT_MASK);
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}
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static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
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{
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u16 cmd;
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cmd = RTL_R16(CPlusCmd);
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RTL_W16(CPlusCmd, cmd);
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return cmd;
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}
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static void rtl_set_rx_max_size(void __iomem *ioaddr)
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{
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/* Low hurts. Let's disable the filtering. */
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RTL_W16(RxMaxSize, 16383);
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}
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static void rtl_hw_start_8169(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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@ -1890,19 +1919,15 @@ static void rtl_hw_start_8169(struct net_device *dev)
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RTL_W8(EarlyTxThres, EarlyTxThld);
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/* Low hurts. Let's disable the filtering. */
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RTL_W16(RxMaxSize, 16383);
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rtl_set_rx_max_size(ioaddr);
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if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_02) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_03) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_04))
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rtl8169_set_rx_tx_config_registers(tp);
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rtl_set_rx_tx_config_registers(tp);
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cmd = RTL_R16(CPlusCmd);
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RTL_W16(CPlusCmd, cmd);
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tp->cp_cmd |= cmd | PCIMulRW;
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tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
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if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_03)) {
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@ -1919,22 +1944,14 @@ static void rtl_hw_start_8169(struct net_device *dev)
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*/
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RTL_W16(IntrMitigate, 0x0000);
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/*
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* Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
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* register to be written before TxDescAddrLow to work.
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* Switching from MMIO to I/O access fixes the issue as well.
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*/
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RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
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RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
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RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
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RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
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rtl_set_rx_tx_desc_registers(tp, ioaddr);
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if ((tp->mac_version != RTL_GIGA_MAC_VER_01) &&
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(tp->mac_version != RTL_GIGA_MAC_VER_02) &&
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(tp->mac_version != RTL_GIGA_MAC_VER_03) &&
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(tp->mac_version != RTL_GIGA_MAC_VER_04)) {
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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rtl8169_set_rx_tx_config_registers(tp);
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rtl_set_rx_tx_config_registers(tp);
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}
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RTL_W8(Cfg9346, Cfg9346_Lock);
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