forked from luck/tmp_suning_uos_patched
x86 setup: fix asm constraints in vesa_store_edid
Impact: fix potential miscompile (currently believed non-manifest) As the comment explains, the VBE DDC call can clobber any register. Tell the compiler about that fact. Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -269,9 +269,8 @@ void vesa_store_edid(void)
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we genuinely have to assume all registers are destroyed here. */
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asm("pushw %%es; movw %2,%%es; "INT10"; popw %%es"
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: "+a" (ax), "+b" (bx)
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: "c" (cx), "D" (di)
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: "esi");
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: "+a" (ax), "+b" (bx), "+c" (cx), "+D" (di)
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: : "esi", "edx");
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if (ax != 0x004f)
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return; /* No EDID */
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@ -285,9 +284,9 @@ void vesa_store_edid(void)
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dx = 0; /* EDID block number */
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di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */
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asm(INT10
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: "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info)
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: "c" (cx), "D" (di)
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: "esi");
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: "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info),
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"+c" (cx), "+D" (di)
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: : "esi");
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#endif /* CONFIG_FIRMWARE_EDID */
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}
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