forked from luck/tmp_suning_uos_patched
ARM: S5P6440: Move common memory map definitions for S5P
1. Moved common memory map definitions for S5P such as S5P_VA_XXX into plat-s5p/include/mach/map-s5p.h from mach-s5p6440/include/mach. 2. Removed unnecessary definitions in the map.h and irq.c 3. Removed the unnecessary support for unaligned UART address 4. Renamed S5P_VA_VICx definitions as VA_VICx 5. Moved the definitons of VIC_BASE to plat-s5p/include/plat/irqs.h Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Kukjin Kim
Ben Dooks
parent
e96b234b7e
commit
8131796046
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@ -22,8 +22,8 @@
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.macro addruart, rx
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1
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ldreq \rx, = S5P_PA_UART
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ldrne \rx, = (S5P_VA_UART + S5P_PA_UART & 0xfffff)
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ldreq \rx, = S3C_PA_UART
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ldrne \rx, = S3C_VA_UART
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#if CONFIG_DEBUG_S3C_UART != 0
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add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
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#endif
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@ -14,94 +14,55 @@
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#define __ASM_ARCH_MAP_H __FILE__
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#include <plat/map-base.h>
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#include <plat/map-s5p.h>
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/* Chip ID */
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#define S5P6440_PA_CHIPID (0xE0000000)
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#define S5P_PA_CHIPID S5P6440_PA_CHIPID
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#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
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/* SYSCON */
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#define S5P6440_PA_SYSCON (0xE0100000)
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#define S5P_PA_SYSCON S5P6440_PA_SYSCON
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#define S5P_VA_SYSCON S3C_VA_SYS
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#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0)
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#define S5P_PA_CLK S5P6440_PA_CLK
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#define S5P_VA_CLK (S5P_VA_SYSCON + 0x0)
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#define S5P_PA_SYSCON S5P6440_PA_SYSCON
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/* GPIO */
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#define S5P6440_PA_GPIO (0xE0308000)
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#define S5P_PA_GPIO S5P6440_PA_GPIO
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#define S5P_VA_GPIO S3C_ADDR(0x00500000)
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/* VIC0 */
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#define S5P6440_PA_VIC0 (0xE4000000)
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#define S5P_PA_VIC0 S5P6440_PA_VIC0
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#define S5P_VA_VIC0 (S3C_VA_IRQ + 0x0)
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#define VA_VIC0 S5P_VA_VIC0
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/* VIC1 */
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#define S5P6440_PA_VIC1 (0xE4100000)
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#define S5P_PA_VIC1 S5P6440_PA_VIC1
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#define S5P_VA_VIC1 (S3C_VA_IRQ + 0x10000)
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#define VA_VIC1 S5P_VA_VIC1
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/* Timer */
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#define S5P6440_PA_TIMER (0xEA000000)
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#define S5P_PA_TIMER S5P6440_PA_TIMER
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#define S5P_VA_TIMER S3C_VA_TIMER
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/* RTC */
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#define S5P6440_PA_RTC (0xEA100000)
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#define S5P_PA_RTC S5P6440_PA_RTC
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#define S5P_VA_RTC S3C_ADDR(0x00600000)
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/* WDT */
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#define S5P6440_PA_WDT (0xEA200000)
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#define S5P_PA_WDT S5P6440_PA_WDT
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#define S5p_VA_WDT S3C_VA_WATCHDOG
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/* UART */
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#define S5P6440_PA_UART (0xEC000000)
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#define S5P_PA_UART S5P6440_PA_UART
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#define S5P_VA_UART S3C_VA_UART
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/* HS USB OtG */
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#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0)
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#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400)
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#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800)
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#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00)
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#define S5P_SZ_UART SZ_256
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#define S5P6440_PA_IIC0 (0xEC104000)
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#define S5P6440_PA_HSOTG (0xED100000)
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/* HSMMC */
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#define S5P6440_PA_HSMMC0 (0xED800000)
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#define S5P6440_PA_HSMMC1 (0xED900000)
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#define S5P6440_PA_HSMMC2 (0xEDA00000)
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#define S5P_PA_UART0 (S5P_PA_UART + 0x0)
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#define S5P_PA_UART1 (S5P_PA_UART + 0x400)
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#define S5P_PA_UART2 (S5P_PA_UART + 0x800)
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#define S5P_PA_UART3 (S5P_PA_UART + 0xC00)
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#define S5P_UART_OFFSET (0x400)
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#define S5P_VA_UARTx(x) (S5P_VA_UART + (S5P_PA_UART & 0xfffff) \
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+ ((x) * S5P_UART_OFFSET))
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#define S5P_VA_UART0 S5P_VA_UARTx(0)
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#define S5P_VA_UART1 S5P_VA_UARTx(1)
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#define S5P_VA_UART2 S5P_VA_UARTx(2)
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#define S5P_VA_UART3 S5P_VA_UARTx(3)
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#define S5P_SZ_UART SZ_256
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/* I2C */
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#define S5P6440_PA_IIC0 (0xEC104000)
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#define S5P_PA_IIC0 S5P6440_PA_IIC0
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#define S5p_VA_IIC0 S3C_ADDR(0x00700000)
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/* SDRAM */
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#define S5P6440_PA_SDRAM (0x20000000)
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#define S5P_PA_SDRAM S5P6440_PA_SDRAM
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/* compatibiltiy defines. */
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#define S3C_PA_UART S5P_PA_UART
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#define S3C_UART_OFFSET S5P_UART_OFFSET
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#define S3C_PA_TIMER S5P_PA_TIMER
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#define S3C_PA_IIC S5P_PA_IIC0
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#define S3C_PA_UART S5P6440_PA_UART
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#define S3C_PA_IIC S5P6440_PA_IIC0
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#endif /* __ASM_ARCH_MAP_H */
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@ -15,7 +15,7 @@
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#include <mach/map.h>
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#define S5P_CLKREG(x) (S5P_VA_CLK + (x))
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#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
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#define S5P_APLL_LOCK S5P_CLKREG(0x00)
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#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
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@ -15,7 +15,7 @@
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static inline u32 s3c24xx_ostimer_pending(void)
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{
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u32 pend = __raw_readl(S5P_VA_VIC0 + VIC_RAW_STATUS);
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u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
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return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
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}
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@ -100,8 +100,8 @@ static void __init smdk6440_machine_init(void)
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MACHINE_START(SMDK6440, "SMDK6440")
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/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
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.phys_io = S5P_PA_UART & 0xfff00000,
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.io_pg_offst = (((u32)S5P_VA_UART) >> 18) & 0xfffc,
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.phys_io = S3C_PA_UART & 0xfff00000,
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.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
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.boot_params = S5P_PA_SDRAM + 0x100,
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.init_irq = s5p6440_init_irq,
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@ -37,31 +37,34 @@ static struct cpu_table cpu_ids[] __initdata = {
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/* minimal IO mapping */
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#define UART_OFFS (S5P_PA_UART & 0xfffff)
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static struct map_desc s5p_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSCON,
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.virtual = (unsigned long)S5P_VA_CHIPID,
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.pfn = __phys_to_pfn(S5P_PA_CHIPID),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_SYS,
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.pfn = __phys_to_pfn(S5P_PA_SYSCON),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)(S5P_VA_UART + UART_OFFS),
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.pfn = __phys_to_pfn(S5P_PA_UART),
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_VIC0,
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5P_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_VIC1,
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5P_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_TIMER,
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.virtual = (unsigned long)S3C_VA_TIMER,
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.pfn = __phys_to_pfn(S5P_PA_TIMER),
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.length = SZ_16K,
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.type = MT_DEVICE,
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@ -29,6 +29,8 @@
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#define S5P_VIC0_BASE S5P_IRQ(0)
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#define S5P_VIC1_BASE S5P_IRQ(32)
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#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
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#define IRQ_VIC0_BASE S5P_VIC0_BASE
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#define IRQ_VIC1_BASE S5P_VIC1_BASE
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32
arch/arm/plat-s5p/include/plat/map-s5p.h
Normal file
32
arch/arm/plat-s5p/include/plat/map-s5p.h
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@ -0,0 +1,32 @@
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/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5P - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_PLAT_MAP_S5P_H
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#define __ASM_PLAT_MAP_S5P_H __FILE__
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#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
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#define S5P_VA_GPIO S3C_ADDR(0x00500000)
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#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
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#define S5P_VA_SROMC S3C_ADDR(0x01100000)
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#define S5P_VA_UART0 (S3C_VA_UART + 0x0)
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#define S5P_VA_UART1 (S3C_VA_UART + 0x400)
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#define S5P_VA_UART2 (S3C_VA_UART + 0x800)
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#define S5P_VA_UART3 (S3C_VA_UART + 0xC00)
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#define S3C_UART_OFFSET (0x400)
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#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
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#define VA_VIC0 VA_VIC(0)
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#define VA_VIC1 VA_VIC(1)
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#endif /* __ASM_PLAT_MAP_S5P_H */
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@ -25,9 +25,6 @@
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#include <plat/irq-vic-timer.h>
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#include <plat/irq-uart.h>
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#define VIC_VAADDR(no) (S5P_VA_VIC0 + ((no)*0x10000))
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#define VIC_BASE(no) (S5P_VIC0_BASE + ((no)*32))
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/*
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* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
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* are consecutive when looking up the interrupt in the demux routines.
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@ -61,7 +58,7 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
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/* initialize the VICs */
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for (irq = 0; irq < num_vic; irq++)
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vic_init(VIC_VAADDR(irq), VIC_BASE(irq), vic[irq], 0);
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vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
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s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
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s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
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