forked from luck/tmp_suning_uos_patched
ASoC: SOF: Intel: byt: Refactor fw ready / mem windows creation
There is a lot of duplicate code when processing IPC firmware ready notification and creating memory windows. First step in reducing the code duplication is to introduce generic functions: * sof_get_windows * sof_fw_ready that will replace, in the first step, the specific implementation related to baytrail related platforms: * byt_get_windows * byt_fw_ready So we are basically moving code from intel/byt.c to loader.c keeping in mind that mbox_offset is a per platform constant so we need to use newly introduced snd_sof_dsp_get_mailbox_offset / snd_sof_dsp_get_window_offset in order to get the correct mbox offset / window offset value. Also, bar is a per platform constant so we use snd_sof_dsp_get_bar_index instead of the hardcoded BYT_DSP_BAR. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20190807150203.26359-5-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Daniel Baluta
Mark Brown
parent
e17422cda9
commit
83ee7ab162
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@ -109,148 +109,6 @@ static void byt_host_done(struct snd_sof_dev *sdev);
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static void byt_dsp_done(struct snd_sof_dev *sdev);
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static void byt_get_reply(struct snd_sof_dev *sdev);
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/*
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* IPC Firmware ready.
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*/
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static void byt_get_windows(struct snd_sof_dev *sdev)
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{
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struct sof_ipc_window_elem *elem;
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u32 outbox_offset = 0;
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u32 stream_offset = 0;
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u32 inbox_offset = 0;
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u32 outbox_size = 0;
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u32 stream_size = 0;
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u32 inbox_size = 0;
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int i;
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if (!sdev->info_window) {
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dev_err(sdev->dev, "error: have no window info\n");
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return;
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}
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for (i = 0; i < sdev->info_window->num_windows; i++) {
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elem = &sdev->info_window->window[i];
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switch (elem->type) {
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case SOF_IPC_REGION_UPBOX:
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inbox_offset = elem->offset + MBOX_OFFSET;
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inbox_size = elem->size;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[BYT_DSP_BAR] +
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inbox_offset,
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elem->size, "inbox",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_DOWNBOX:
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outbox_offset = elem->offset + MBOX_OFFSET;
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outbox_size = elem->size;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[BYT_DSP_BAR] +
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outbox_offset,
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elem->size, "outbox",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_TRACE:
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[BYT_DSP_BAR] +
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elem->offset +
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MBOX_OFFSET,
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elem->size, "etrace",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_DEBUG:
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[BYT_DSP_BAR] +
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elem->offset +
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MBOX_OFFSET,
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elem->size, "debug",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_STREAM:
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stream_offset = elem->offset + MBOX_OFFSET;
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stream_size = elem->size;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[BYT_DSP_BAR] +
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stream_offset,
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elem->size, "stream",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_REGS:
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[BYT_DSP_BAR] +
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elem->offset +
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MBOX_OFFSET,
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elem->size, "regs",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_EXCEPTION:
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sdev->dsp_oops_offset = elem->offset + MBOX_OFFSET;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[BYT_DSP_BAR] +
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elem->offset +
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MBOX_OFFSET,
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elem->size, "exception",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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default:
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dev_err(sdev->dev, "error: get illegal window info\n");
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return;
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}
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}
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if (outbox_size == 0 || inbox_size == 0) {
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dev_err(sdev->dev, "error: get illegal mailbox window\n");
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return;
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}
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snd_sof_dsp_mailbox_init(sdev, inbox_offset, inbox_size,
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outbox_offset, outbox_size);
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sdev->stream_box.offset = stream_offset;
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sdev->stream_box.size = stream_size;
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dev_dbg(sdev->dev, " mailbox upstream 0x%x - size 0x%x\n",
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inbox_offset, inbox_size);
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dev_dbg(sdev->dev, " mailbox downstream 0x%x - size 0x%x\n",
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outbox_offset, outbox_size);
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dev_dbg(sdev->dev, " stream region 0x%x - size 0x%x\n",
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stream_offset, stream_size);
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}
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/* check for ABI compatibility and create memory windows on first boot */
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static int byt_fw_ready(struct snd_sof_dev *sdev, u32 msg_id)
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{
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struct sof_ipc_fw_ready *fw_ready = &sdev->fw_ready;
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u32 offset;
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int ret;
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/* mailbox must be on 4k boundary */
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offset = MBOX_OFFSET;
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dev_dbg(sdev->dev, "ipc: DSP is ready 0x%8.8x offset 0x%x\n",
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msg_id, offset);
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/* no need to re-check version/ABI for subsequent boots */
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if (!sdev->first_boot)
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return 0;
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/* copy data from the DSP FW ready offset */
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sof_block_read(sdev, sdev->mmio_bar, offset, fw_ready,
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sizeof(*fw_ready));
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/* make sure ABI version is compatible */
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ret = snd_sof_ipc_valid(sdev);
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if (ret < 0)
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return ret;
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/* now check for extended data */
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snd_sof_fw_parse_ext_data(sdev, sdev->mmio_bar, MBOX_OFFSET +
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sizeof(struct sof_ipc_fw_ready));
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byt_get_windows(sdev);
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return 0;
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}
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/*
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* Debug
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*/
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@ -418,6 +276,16 @@ static void byt_get_reply(struct snd_sof_dev *sdev)
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msg->reply_error = ret;
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}
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static int byt_get_mailbox_offset(struct snd_sof_dev *sdev)
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{
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return MBOX_OFFSET;
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}
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static int byt_get_window_offset(struct snd_sof_dev *sdev, u32 id)
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{
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return MBOX_OFFSET;
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}
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static void byt_host_done(struct snd_sof_dev *sdev)
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{
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/* clear BUSY bit and set DONE bit - accept new messages */
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@ -612,7 +480,9 @@ const struct snd_sof_dsp_ops sof_tng_ops = {
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/* ipc */
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.send_msg = byt_send_msg,
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.fw_ready = byt_fw_ready,
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.fw_ready = sof_fw_ready,
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.get_mailbox_offset = byt_get_mailbox_offset,
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.get_window_offset = byt_get_window_offset,
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.ipc_msg_data = intel_ipc_msg_data,
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.ipc_pcm_params = intel_ipc_pcm_params,
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@ -771,7 +641,9 @@ const struct snd_sof_dsp_ops sof_byt_ops = {
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/* ipc */
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.send_msg = byt_send_msg,
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.fw_ready = byt_fw_ready,
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.fw_ready = sof_fw_ready,
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.get_mailbox_offset = byt_get_mailbox_offset,
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.get_window_offset = byt_get_window_offset,
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.ipc_msg_data = intel_ipc_msg_data,
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.ipc_pcm_params = intel_ipc_pcm_params,
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@ -828,7 +700,9 @@ const struct snd_sof_dsp_ops sof_cht_ops = {
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/* ipc */
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.send_msg = byt_send_msg,
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.fw_ready = byt_fw_ready,
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.fw_ready = sof_fw_ready,
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.get_mailbox_offset = byt_get_mailbox_offset,
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.get_window_offset = byt_get_window_offset,
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.ipc_msg_data = intel_ipc_msg_data,
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.ipc_pcm_params = intel_ipc_pcm_params,
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@ -87,6 +87,174 @@ int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset)
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}
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EXPORT_SYMBOL(snd_sof_fw_parse_ext_data);
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/*
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* IPC Firmware ready.
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*/
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static void sof_get_windows(struct snd_sof_dev *sdev)
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{
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struct sof_ipc_window_elem *elem;
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u32 outbox_offset = 0;
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u32 stream_offset = 0;
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u32 inbox_offset = 0;
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u32 outbox_size = 0;
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u32 stream_size = 0;
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u32 inbox_size = 0;
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int window_offset;
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int bar;
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int i;
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if (!sdev->info_window) {
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dev_err(sdev->dev, "error: have no window info\n");
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return;
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}
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bar = snd_sof_dsp_get_bar_index(sdev, SOF_FW_BLK_TYPE_SRAM);
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if (bar < 0) {
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dev_err(sdev->dev, "error: have no bar mapping\n");
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return;
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}
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for (i = 0; i < sdev->info_window->num_windows; i++) {
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elem = &sdev->info_window->window[i];
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window_offset = snd_sof_dsp_get_window_offset(sdev, elem->id);
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if (window_offset < 0) {
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dev_warn(sdev->dev, "warn: no offset for window %d\n",
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elem->id);
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continue;
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}
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switch (elem->type) {
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case SOF_IPC_REGION_UPBOX:
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inbox_offset = window_offset + elem->offset;
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inbox_size = elem->size;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[bar] +
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inbox_offset,
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elem->size, "inbox",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_DOWNBOX:
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outbox_offset = window_offset + elem->offset;
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outbox_size = elem->size;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[bar] +
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outbox_offset,
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elem->size, "outbox",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_TRACE:
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[bar] +
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window_offset +
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elem->offset,
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elem->size, "etrace",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_DEBUG:
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[bar] +
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window_offset +
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elem->offset,
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elem->size, "debug",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_STREAM:
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stream_offset = window_offset + elem->offset;
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stream_size = elem->size;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[bar] +
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stream_offset,
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elem->size, "stream",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_REGS:
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[bar] +
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window_offset +
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elem->offset,
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elem->size, "regs",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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case SOF_IPC_REGION_EXCEPTION:
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sdev->dsp_oops_offset = window_offset + elem->offset;
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snd_sof_debugfs_io_item(sdev,
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sdev->bar[bar] +
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window_offset +
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elem->offset,
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elem->size, "exception",
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SOF_DEBUGFS_ACCESS_D0_ONLY);
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break;
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default:
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dev_err(sdev->dev, "error: get illegal window info\n");
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return;
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}
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}
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if (outbox_size == 0 || inbox_size == 0) {
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dev_err(sdev->dev, "error: get illegal mailbox window\n");
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return;
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}
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snd_sof_dsp_mailbox_init(sdev, inbox_offset, inbox_size,
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outbox_offset, outbox_size);
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sdev->stream_box.offset = stream_offset;
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sdev->stream_box.size = stream_size;
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dev_dbg(sdev->dev, " mailbox upstream 0x%x - size 0x%x\n",
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inbox_offset, inbox_size);
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dev_dbg(sdev->dev, " mailbox downstream 0x%x - size 0x%x\n",
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outbox_offset, outbox_size);
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dev_dbg(sdev->dev, " stream region 0x%x - size 0x%x\n",
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stream_offset, stream_size);
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}
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/* check for ABI compatibility and create memory windows on first boot */
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int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id)
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{
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struct sof_ipc_fw_ready *fw_ready = &sdev->fw_ready;
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int offset;
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int bar;
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int ret;
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/* mailbox must be on 4k boundary */
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offset = snd_sof_dsp_get_mailbox_offset(sdev);
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if (offset < 0) {
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dev_err(sdev->dev, "error: have no mailbox offset\n");
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return offset;
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}
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bar = snd_sof_dsp_get_bar_index(sdev, SOF_FW_BLK_TYPE_SRAM);
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if (bar < 0) {
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dev_err(sdev->dev, "error: have no bar mapping\n");
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return -EINVAL;
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}
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dev_dbg(sdev->dev, "ipc: DSP is ready 0x%8.8x offset 0x%x\n",
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msg_id, offset);
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/* no need to re-check version/ABI for subsequent boots */
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if (!sdev->first_boot)
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return 0;
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/* copy data from the DSP FW ready offset */
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sof_block_read(sdev, bar, offset, fw_ready, sizeof(*fw_ready));
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/* make sure ABI version is compatible */
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ret = snd_sof_ipc_valid(sdev);
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if (ret < 0)
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return ret;
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/* now check for extended data */
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snd_sof_fw_parse_ext_data(sdev, bar, offset +
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sizeof(struct sof_ipc_fw_ready));
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sof_get_windows(sdev);
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return 0;
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}
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EXPORT_SYMBOL(sof_fw_ready);
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/* generic module parser for mmaped DSPs */
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int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev,
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struct snd_sof_mod_hdr *module)
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@ -642,6 +642,8 @@ void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src,
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void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest,
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size_t size);
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int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id);
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void intel_ipc_msg_data(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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void *p, size_t sz);
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