forked from luck/tmp_suning_uos_patched
ARM: shmobile: Consolidate SCU mapping code
Currently the SCU registers are mapped in SoC-specific code, using different methods, all involving the static mapping set up from machine_desc.map_io(): - On emev2, a static (non-identity) mapping is used, with ioremap(). As the static mapping uses the MT_DEVICE type, ioremap() reuses it, and the returned virtual address is suitable for passing to shmobile_smp_hook(), - On sh73a0 and r8a7779, a static identity mapping is used, with the legacy IOMEM() macro. As the static mapping uses the MT_DEVICE_NONSHARED type, replacing IOMEM() by ioremap() would create a new mapping, whose virtual address cannot be passed to shmobile_smp_hook(). Move the mapping of the SCU registers from SoC-specific code to common code, always using ioremap(). To work in the absence of a static mapping, this requires passing the physical SCU base address to shmobile_smp_hook(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -11,7 +11,8 @@ extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
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unsigned long arg);
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extern bool shmobile_smp_cpu_can_disable(unsigned int cpu);
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extern void shmobile_boot_scu(void);
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extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
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extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
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unsigned int max_cpus);
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extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
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extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
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extern struct platform_suspend_ops shmobile_suspend_ops;
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@ -30,8 +31,6 @@ int shmobile_cpufreq_init(void);
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static inline int shmobile_cpufreq_init(void) { return 0; }
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#endif
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extern void __iomem *shmobile_scu_base;
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static inline void __init shmobile_init_late(void)
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{
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shmobile_suspend_init();
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@ -18,7 +18,8 @@
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#include "common.h"
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void __iomem *shmobile_scu_base;
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static phys_addr_t shmobile_scu_base_phys;
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static void __iomem *shmobile_scu_base;
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static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
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unsigned long action, void *hcpu)
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@ -29,7 +30,7 @@ static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
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case CPU_UP_PREPARE:
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/* For this particular CPU register SCU SMP boot vector */
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shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
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(unsigned long)shmobile_scu_base);
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shmobile_scu_base_phys);
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break;
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};
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@ -40,12 +41,15 @@ static struct notifier_block shmobile_smp_scu_notifier = {
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.notifier_call = shmobile_smp_scu_notifier_call,
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};
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void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
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void __init shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
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unsigned int max_cpus)
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{
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/* install boot code shared by all CPUs */
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shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
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/* enable SCU and cache coherency on booting CPU */
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shmobile_scu_base_phys = scu_base_phys;
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shmobile_scu_base = ioremap(scu_base_phys, PAGE_SIZE);
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scu_enable(shmobile_scu_base);
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scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
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@ -45,8 +45,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
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}
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/* setup EMEV2 specific SCU bits */
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shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
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shmobile_smp_scu_prepare_cpus(max_cpus);
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shmobile_smp_scu_prepare_cpus(EMEV2_SCU_BASE, max_cpus);
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}
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const struct smp_operations emev2_smp_ops __initconst = {
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@ -94,8 +94,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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__raw_writel(__pa(shmobile_boot_vector), AVECR);
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/* setup r8a7779 specific SCU bits */
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shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
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shmobile_smp_scu_prepare_cpus(max_cpus);
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shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus);
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r8a7779_pm_init();
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@ -52,8 +52,7 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
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__raw_writel(__pa(shmobile_boot_vector), SBAR);
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/* setup sh73a0 specific SCU bits */
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shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
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shmobile_smp_scu_prepare_cpus(max_cpus);
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shmobile_smp_scu_prepare_cpus(SH73A0_SCU_BASE, max_cpus);
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}
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const struct smp_operations sh73a0_smp_ops __initconst = {
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