forked from luck/tmp_suning_uos_patched
[SCSI] ipr: add endian swap enablement for 64 bit adapters
A change in the hardware design of the chip for the new adapters changes the default endianness of MMIO operations. This patch adds a register definition which when written to with a predefined value will change the endianness back to what the driver expects. This patch also fixes two problems found during testing. First, the first reserved field in the ipr_hostrcb64_fabirc_desc structure only reserved one byte. The correct amount to reserve is 2 bytes. Second, the reserved field of the ipr_hostrcb64_error structure only reserved 2 bytes. The correct amount to reserve is 16 bytes. Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com> Acked-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
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@ -167,7 +167,8 @@ static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
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.clr_uproc_interrupt_reg32 = 0x0002C,
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.init_feedback_reg = 0x0005C,
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.dump_addr_reg = 0x00064,
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.dump_data_reg = 0x00068
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.dump_data_reg = 0x00068,
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.endian_swap_reg = 0x00084
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}
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},
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};
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@ -7208,6 +7209,12 @@ static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
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ipr_init_ioa_mem(ioa_cfg);
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ioa_cfg->allow_interrupts = 1;
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if (ioa_cfg->sis64) {
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/* Set the adapter to the correct endian mode. */
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writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
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int_reg = readl(ioa_cfg->regs.endian_swap_reg);
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}
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int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
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if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
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@ -7365,6 +7372,7 @@ static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
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static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
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{
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struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
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volatile u32 int_reg;
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int rc;
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ENTER;
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@ -7383,6 +7391,12 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
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ipr_fail_all_ops(ioa_cfg);
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if (ioa_cfg->sis64) {
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/* Set the adapter to the correct endian mode. */
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writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
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int_reg = readl(ioa_cfg->regs.endian_swap_reg);
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}
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if (ioa_cfg->ioa_unit_checked) {
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ioa_cfg->ioa_unit_checked = 0;
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ipr_get_unit_check_buffer(ioa_cfg);
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@ -7547,7 +7561,7 @@ static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
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}
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/**
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* ipr_reset_alert_part2 - Alert the adapter of a pending reset
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* ipr_reset_alert - Alert the adapter of a pending reset
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* @ipr_cmd: ipr command struct
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*
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* Description: This function alerts the adapter that it will be reset.
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@ -8318,6 +8332,7 @@ static void __devinit ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
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t->init_feedback_reg = base + p->init_feedback_reg;
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t->dump_addr_reg = base + p->dump_addr_reg;
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t->dump_data_reg = base + p->dump_data_reg;
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t->endian_swap_reg = base + p->endian_swap_reg;
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}
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}
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@ -996,7 +996,7 @@ struct ipr_hostrcb64_fabric_desc {
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__be16 length;
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u8 descriptor_id;
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u8 reserved;
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u8 reserved[2];
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u8 path_state;
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u8 reserved2[2];
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@ -1054,7 +1054,7 @@ struct ipr_hostrcb64_error {
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__be64 fd_lun;
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u8 fd_res_path[8];
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__be64 time_stamp;
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u8 reserved[2];
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u8 reserved[16];
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union {
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struct ipr_hostrcb_type_ff_error type_ff_error;
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struct ipr_hostrcb_type_12_error type_12_error;
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@ -1254,6 +1254,9 @@ struct ipr_interrupt_offsets {
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unsigned long dump_addr_reg;
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unsigned long dump_data_reg;
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#define IPR_ENDIAN_SWAP_KEY 0x000C0C00
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unsigned long endian_swap_reg;
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};
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struct ipr_interrupts {
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@ -1279,6 +1282,8 @@ struct ipr_interrupts {
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void __iomem *dump_addr_reg;
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void __iomem *dump_data_reg;
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void __iomem *endian_swap_reg;
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};
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struct ipr_chip_cfg_t {
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