forked from luck/tmp_suning_uos_patched
watchdog: add Intel MID watchdog driver support
Add initial Intel MID watchdog driver support. This driver is an initial implementation of generic Intel MID watchdog driver. Currently it supports Intel Merrifield platform. Signed-off-by: Eric Ernst <eric.ernst@intel.com> Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -665,6 +665,19 @@ config INTEL_SCU_WATCHDOG
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To compile this driver as a module, choose M here.
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config INTEL_MID_WATCHDOG
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tristate "Intel MID Watchdog Timer"
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depends on X86_INTEL_MID
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select WATCHDOG_CORE
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---help---
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Watchdog timer driver built into the Intel SCU for Intel MID
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Platforms.
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This driver currently supports only the watchdog evolution
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implementation in SCU, available for Merrifield generation.
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To compile this driver as a module, choose M here.
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config ITCO_WDT
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tristate "Intel TCO Timer/Watchdog"
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depends on (X86 || IA64) && PCI
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@ -112,6 +112,7 @@ obj-$(CONFIG_W83977F_WDT) += w83977f_wdt.o
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obj-$(CONFIG_MACHZ_WDT) += machzwd.o
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obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o
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obj-$(CONFIG_INTEL_SCU_WATCHDOG) += intel_scu_watchdog.o
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obj-$(CONFIG_INTEL_MID_WATCHDOG) += intel-mid_wdt.o
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# M32R Architecture
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184
drivers/watchdog/intel-mid_wdt.c
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184
drivers/watchdog/intel-mid_wdt.c
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@ -0,0 +1,184 @@
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/*
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* intel-mid_wdt: generic Intel MID SCU watchdog driver
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*
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* Platforms supported so far:
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* - Merrifield only
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*
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* Copyright (C) 2014 Intel Corporation. All rights reserved.
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* Contact: David Cohen <david.a.cohen@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of version 2 of the GNU General
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* Public License as published by the Free Software Foundation.
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*/
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/nmi.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#include <linux/platform_data/intel-mid_wdt.h>
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#include <asm/intel_scu_ipc.h>
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#include <asm/intel-mid.h>
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#define IPC_WATCHDOG 0xf8
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#define MID_WDT_PRETIMEOUT 15
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#define MID_WDT_TIMEOUT_MIN (1 + MID_WDT_PRETIMEOUT)
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#define MID_WDT_TIMEOUT_MAX 170
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#define MID_WDT_DEFAULT_TIMEOUT 90
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/* SCU watchdog messages */
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enum {
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SCU_WATCHDOG_START = 0,
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SCU_WATCHDOG_STOP,
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SCU_WATCHDOG_KEEPALIVE,
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};
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static inline int wdt_command(int sub, u32 *in, int inlen)
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{
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return intel_scu_ipc_command(IPC_WATCHDOG, sub, in, inlen, NULL, 0);
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}
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static int wdt_start(struct watchdog_device *wd)
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{
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int ret, in_size;
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int timeout = wd->timeout;
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struct ipc_wd_start {
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u32 pretimeout;
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u32 timeout;
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} ipc_wd_start = { timeout - MID_WDT_PRETIMEOUT, timeout };
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/*
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* SCU expects the input size for watchdog IPC to
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* be based on 4 bytes
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*/
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in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
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ret = wdt_command(SCU_WATCHDOG_START, (u32 *)&ipc_wd_start, in_size);
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if (ret) {
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struct device *dev = watchdog_get_drvdata(wd);
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dev_crit(dev, "error starting watchdog: %d\n", ret);
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}
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return ret;
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}
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static int wdt_ping(struct watchdog_device *wd)
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{
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int ret;
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ret = wdt_command(SCU_WATCHDOG_KEEPALIVE, NULL, 0);
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if (ret) {
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struct device *dev = watchdog_get_drvdata(wd);
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dev_crit(dev, "Error executing keepalive: 0x%x\n", ret);
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}
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return ret;
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}
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static int wdt_stop(struct watchdog_device *wd)
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{
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int ret;
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ret = wdt_command(SCU_WATCHDOG_STOP, NULL, 0);
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if (ret) {
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struct device *dev = watchdog_get_drvdata(wd);
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dev_crit(dev, "Error stopping watchdog: 0x%x\n", ret);
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}
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return ret;
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}
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static irqreturn_t mid_wdt_irq(int irq, void *dev_id)
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{
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panic("Kernel Watchdog");
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/* This code should not be reached */
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return IRQ_HANDLED;
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}
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static const struct watchdog_info mid_wdt_info = {
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.identity = "Intel MID SCU watchdog",
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.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
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};
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static const struct watchdog_ops mid_wdt_ops = {
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.owner = THIS_MODULE,
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.start = wdt_start,
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.stop = wdt_stop,
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.ping = wdt_ping,
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};
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static int mid_wdt_probe(struct platform_device *pdev)
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{
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struct watchdog_device *wdt_dev;
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struct intel_mid_wdt_pdata *pdata = pdev->dev.platform_data;
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int ret;
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if (!pdata) {
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dev_err(&pdev->dev, "missing platform data\n");
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return -EINVAL;
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}
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if (pdata->probe) {
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ret = pdata->probe(pdev);
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if (ret)
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return ret;
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}
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wdt_dev = devm_kzalloc(&pdev->dev, sizeof(*wdt_dev), GFP_KERNEL);
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if (!wdt_dev)
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return -ENOMEM;
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wdt_dev->info = &mid_wdt_info;
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wdt_dev->ops = &mid_wdt_ops;
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wdt_dev->min_timeout = MID_WDT_TIMEOUT_MIN;
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wdt_dev->max_timeout = MID_WDT_TIMEOUT_MAX;
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wdt_dev->timeout = MID_WDT_DEFAULT_TIMEOUT;
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watchdog_set_drvdata(wdt_dev, &pdev->dev);
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platform_set_drvdata(pdev, wdt_dev);
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ret = devm_request_irq(&pdev->dev, pdata->irq, mid_wdt_irq,
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IRQF_SHARED | IRQF_NO_SUSPEND, "watchdog",
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wdt_dev);
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if (ret) {
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dev_err(&pdev->dev, "error requesting warning irq %d\n",
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pdata->irq);
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return ret;
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}
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ret = watchdog_register_device(wdt_dev);
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if (ret) {
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dev_err(&pdev->dev, "error registering watchdog device\n");
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return ret;
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}
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dev_info(&pdev->dev, "Intel MID watchdog device probed\n");
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return 0;
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}
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static int mid_wdt_remove(struct platform_device *pdev)
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{
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struct watchdog_device *wd = platform_get_drvdata(pdev);
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watchdog_unregister_device(wd);
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return 0;
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}
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static struct platform_driver mid_wdt_driver = {
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.probe = mid_wdt_probe,
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.remove = mid_wdt_remove,
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.driver = {
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.owner = THIS_MODULE,
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.name = "intel_mid_wdt",
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},
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};
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module_platform_driver(mid_wdt_driver);
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MODULE_AUTHOR("David Cohen <david.a.cohen@linux.intel.com>");
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MODULE_DESCRIPTION("Watchdog Driver for Intel MID platform");
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MODULE_LICENSE("GPL");
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22
include/linux/platform_data/intel-mid_wdt.h
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22
include/linux/platform_data/intel-mid_wdt.h
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/*
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* intel-mid_wdt: generic Intel MID SCU watchdog driver
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*
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* Copyright (C) 2014 Intel Corporation. All rights reserved.
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* Contact: David Cohen <david.a.cohen@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of version 2 of the GNU General
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* Public License as published by the Free Software Foundation.
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*/
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#ifndef __INTEL_MID_WDT_H__
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#define __INTEL_MID_WDT_H__
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#include <linux/platform_device.h>
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struct intel_mid_wdt_pdata {
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int irq;
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int (*probe)(struct platform_device *pdev);
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};
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#endif /*__INTEL_MID_WDT_H__*/
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