forked from luck/tmp_suning_uos_patched
tools/power turbostat: calculate TSC frequency from CPUID(0x15) on SKL
turbostat --debug ... CPUID(0x15): eax_crystal: 2 ebx_tsc: 100 ecx_crystal_hz: 0 TSC: 1200 MHz (24000000 Hz * 100 / 2 / 1000000) Signed-off-by: Len Brown <len.brown@intel.com>
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@ -89,6 +89,8 @@ double rapl_joule_counter_range;
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unsigned int do_core_perf_limit_reasons;
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unsigned int do_gfx_perf_limit_reasons;
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unsigned int do_ring_perf_limit_reasons;
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unsigned int crystal_hz;
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unsigned long long tsc_hz;
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#define RAPL_PKG (1 << 0)
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/* 0x610 MSR_PKG_POWER_LIMIT */
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@ -2496,6 +2498,41 @@ void process_cpuid()
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do_ptm ? "" : "No ",
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has_epb ? "" : "No ");
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if (max_level > 0x15) {
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unsigned int eax_crystal;
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unsigned int ebx_tsc;
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/*
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* CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
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*/
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eax_crystal = ebx_tsc = crystal_hz = edx = 0;
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__get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
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if (ebx_tsc != 0) {
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if (debug && (ebx != 0))
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fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
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eax_crystal, ebx_tsc, crystal_hz);
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if (crystal_hz == 0)
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switch(model) {
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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crystal_hz = 24000000; /* 24 MHz */
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break;
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default:
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crystal_hz = 0;
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}
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if (crystal_hz) {
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tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
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if (debug)
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fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
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tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
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}
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}
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}
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do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
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do_snb_cstates = has_snb_msrs(family, model);
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do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
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@ -2834,7 +2871,7 @@ int get_and_dump_counters(void)
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}
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void print_version() {
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fprintf(stderr, "turbostat version 4.3 24 Mar, 2015"
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fprintf(stderr, "turbostat version 4.4 2 Apr, 2015"
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" - Len Brown <lenb@kernel.org>\n");
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}
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