forked from luck/tmp_suning_uos_patched
Merge tag 'misc-habanalabs-fixes-2019-05-24' of git://people.freedesktop.org/~gabbayo/linux into char-misc-linus
Oded writes: This tag contains the following fixes: - Halt debug engines when user process closes the FD. We can't allow the device to issue transactions for a user which doesn't exists anymore. - Fix various security holes in debugfs API. - Add a new opcode to the DEBUG IOCTL API. The opcode is designed for setting the device into and out of debug mode. Although not a fix per-se, because this is a new IOCTL which is upstreamed in kernel 5.2, I think this is justified at this point because we won't be able to change the API later. - Fix a bug where the code used an uninitialized mutex * tag 'misc-habanalabs-fixes-2019-05-24' of git://people.freedesktop.org/~gabbayo/linux: habanalabs: Avoid using a non-initialized MMU cache mutex habanalabs: fix debugfs code uapi/habanalabs: add opcode for enable/disable device debug mode habanalabs: halt debug engines on user process close
This commit is contained in:
commit
8aa75b72e3
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@ -26,6 +26,12 @@ static void hl_ctx_fini(struct hl_ctx *ctx)
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dma_fence_put(ctx->cs_pending[i]);
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if (ctx->asid != HL_KERNEL_ASID_ID) {
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/*
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* The engines are stopped as there is no executing CS, but the
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* Coresight might be still working by accessing addresses
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* related to the stopped engines. Hence stop it explicitly.
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*/
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hdev->asic_funcs->halt_coresight(hdev);
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hl_vm_ctx_fini(ctx);
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hl_asid_free(hdev, ctx->asid);
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}
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@ -459,41 +459,31 @@ static ssize_t mmu_write(struct file *file, const char __user *buf,
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struct hl_debugfs_entry *entry = s->private;
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struct hl_dbg_device_entry *dev_entry = entry->dev_entry;
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struct hl_device *hdev = dev_entry->hdev;
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char kbuf[MMU_KBUF_SIZE], asid_kbuf[MMU_ASID_BUF_SIZE],
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addr_kbuf[MMU_ADDR_BUF_SIZE];
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char kbuf[MMU_KBUF_SIZE];
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char *c;
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ssize_t rc;
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if (!hdev->mmu_enable)
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return count;
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memset(kbuf, 0, sizeof(kbuf));
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memset(asid_kbuf, 0, sizeof(asid_kbuf));
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memset(addr_kbuf, 0, sizeof(addr_kbuf));
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if (count > sizeof(kbuf) - 1)
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goto err;
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if (copy_from_user(kbuf, buf, count))
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goto err;
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kbuf[MMU_KBUF_SIZE - 1] = 0;
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kbuf[count] = 0;
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c = strchr(kbuf, ' ');
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if (!c)
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goto err;
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*c = '\0';
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memcpy(asid_kbuf, kbuf, c - kbuf);
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rc = kstrtouint(asid_kbuf, 10, &dev_entry->mmu_asid);
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rc = kstrtouint(kbuf, 10, &dev_entry->mmu_asid);
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if (rc)
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goto err;
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c = strstr(kbuf, " 0x");
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if (!c)
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if (strncmp(c+1, "0x", 2))
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goto err;
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c += 3;
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memcpy(addr_kbuf, c, (kbuf + count) - c);
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rc = kstrtoull(addr_kbuf, 16, &dev_entry->mmu_addr);
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rc = kstrtoull(c+3, 16, &dev_entry->mmu_addr);
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if (rc)
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goto err;
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@ -600,10 +590,8 @@ static ssize_t hl_data_read32(struct file *f, char __user *buf,
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}
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sprintf(tmp_buf, "0x%08x\n", val);
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rc = simple_read_from_buffer(buf, strlen(tmp_buf) + 1, ppos, tmp_buf,
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strlen(tmp_buf) + 1);
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return rc;
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return simple_read_from_buffer(buf, count, ppos, tmp_buf,
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strlen(tmp_buf));
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}
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static ssize_t hl_data_write32(struct file *f, const char __user *buf,
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@ -645,7 +633,6 @@ static ssize_t hl_get_power_state(struct file *f, char __user *buf,
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struct hl_dbg_device_entry *entry = file_inode(f)->i_private;
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struct hl_device *hdev = entry->hdev;
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char tmp_buf[200];
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ssize_t rc;
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int i;
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if (*ppos)
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@ -660,10 +647,8 @@ static ssize_t hl_get_power_state(struct file *f, char __user *buf,
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sprintf(tmp_buf,
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"current power state: %d\n1 - D0\n2 - D3hot\n3 - Unknown\n", i);
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rc = simple_read_from_buffer(buf, strlen(tmp_buf) + 1, ppos, tmp_buf,
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strlen(tmp_buf) + 1);
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return rc;
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return simple_read_from_buffer(buf, count, ppos, tmp_buf,
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strlen(tmp_buf));
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}
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static ssize_t hl_set_power_state(struct file *f, const char __user *buf,
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@ -716,8 +701,8 @@ static ssize_t hl_i2c_data_read(struct file *f, char __user *buf,
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}
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sprintf(tmp_buf, "0x%02x\n", val);
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rc = simple_read_from_buffer(buf, strlen(tmp_buf) + 1, ppos, tmp_buf,
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strlen(tmp_buf) + 1);
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rc = simple_read_from_buffer(buf, count, ppos, tmp_buf,
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strlen(tmp_buf));
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return rc;
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}
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@ -806,18 +791,9 @@ static ssize_t hl_led2_write(struct file *f, const char __user *buf,
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static ssize_t hl_device_read(struct file *f, char __user *buf,
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size_t count, loff_t *ppos)
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{
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char tmp_buf[200];
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ssize_t rc;
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if (*ppos)
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return 0;
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sprintf(tmp_buf,
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"Valid values: disable, enable, suspend, resume, cpu_timeout\n");
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rc = simple_read_from_buffer(buf, strlen(tmp_buf) + 1, ppos, tmp_buf,
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strlen(tmp_buf) + 1);
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return rc;
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static const char *help =
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"Valid values: disable, enable, suspend, resume, cpu_timeout\n";
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return simple_read_from_buffer(buf, count, ppos, help, strlen(help));
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}
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static ssize_t hl_device_write(struct file *f, const char __user *buf,
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@ -825,7 +801,7 @@ static ssize_t hl_device_write(struct file *f, const char __user *buf,
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{
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struct hl_dbg_device_entry *entry = file_inode(f)->i_private;
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struct hl_device *hdev = entry->hdev;
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char data[30];
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char data[30] = {0};
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/* don't allow partial writes */
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if (*ppos != 0)
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@ -231,6 +231,7 @@ static int device_early_init(struct hl_device *hdev)
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mutex_init(&hdev->fd_open_cnt_lock);
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mutex_init(&hdev->send_cpu_message_lock);
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mutex_init(&hdev->mmu_cache_lock);
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INIT_LIST_HEAD(&hdev->hw_queues_mirror_list);
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spin_lock_init(&hdev->hw_queues_mirror_lock);
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atomic_set(&hdev->in_reset, 0);
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@ -260,6 +261,7 @@ static int device_early_init(struct hl_device *hdev)
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*/
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static void device_early_fini(struct hl_device *hdev)
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{
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mutex_destroy(&hdev->mmu_cache_lock);
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mutex_destroy(&hdev->send_cpu_message_lock);
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hl_cb_mgr_fini(hdev, &hdev->kernel_cb_mgr);
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@ -4819,7 +4819,8 @@ static const struct hl_asic_funcs goya_funcs = {
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.set_dram_bar_base = goya_set_ddr_bar_base,
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.init_iatu = goya_init_iatu,
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.rreg = hl_rreg,
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.wreg = hl_wreg
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.wreg = hl_wreg,
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.halt_coresight = goya_halt_coresight
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};
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/*
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@ -202,6 +202,7 @@ void goya_add_device_attr(struct hl_device *hdev,
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struct attribute_group *dev_attr_grp);
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int goya_armcp_info_get(struct hl_device *hdev);
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int goya_debug_coresight(struct hl_device *hdev, void *data);
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void goya_halt_coresight(struct hl_device *hdev);
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void goya_mmu_prepare(struct hl_device *hdev, u32 asid);
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int goya_mmu_clear_pgt_range(struct hl_device *hdev);
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@ -626,3 +626,20 @@ int goya_debug_coresight(struct hl_device *hdev, void *data)
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return rc;
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}
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void goya_halt_coresight(struct hl_device *hdev)
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{
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struct hl_debug_params params = {};
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int i, rc;
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for (i = GOYA_ETF_FIRST ; i <= GOYA_ETF_LAST ; i++) {
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params.reg_idx = i;
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rc = goya_config_etf(hdev, ¶ms);
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if (rc)
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dev_err(hdev->dev, "halt ETF failed, %d/%d\n", rc, i);
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}
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rc = goya_config_etr(hdev, ¶ms);
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if (rc)
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dev_err(hdev->dev, "halt ETR failed, %d\n", rc);
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}
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@ -501,6 +501,7 @@ enum hl_pll_frequency {
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* @init_iatu: Initialize the iATU unit inside the PCI controller.
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* @rreg: Read a register. Needed for simulator support.
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* @wreg: Write a register. Needed for simulator support.
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* @halt_coresight: stop the ETF and ETR traces.
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*/
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struct hl_asic_funcs {
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int (*early_init)(struct hl_device *hdev);
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int (*init_iatu)(struct hl_device *hdev);
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u32 (*rreg)(struct hl_device *hdev, u32 reg);
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void (*wreg)(struct hl_device *hdev, u32 reg, u32 val);
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void (*halt_coresight)(struct hl_device *hdev);
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};
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@ -404,15 +404,12 @@ int hl_mmu_init(struct hl_device *hdev)
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/* MMU H/W init was already done in device hw_init() */
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mutex_init(&hdev->mmu_cache_lock);
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hdev->mmu_pgt_pool =
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gen_pool_create(__ffs(prop->mmu_hop_table_size), -1);
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if (!hdev->mmu_pgt_pool) {
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dev_err(hdev->dev, "Failed to create page gen pool\n");
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rc = -ENOMEM;
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goto err_pool_create;
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return -ENOMEM;
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}
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rc = gen_pool_add(hdev->mmu_pgt_pool, prop->mmu_pgt_addr +
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@ -436,8 +433,6 @@ int hl_mmu_init(struct hl_device *hdev)
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err_pool_add:
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gen_pool_destroy(hdev->mmu_pgt_pool);
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err_pool_create:
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mutex_destroy(&hdev->mmu_cache_lock);
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return rc;
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}
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@ -459,7 +454,6 @@ void hl_mmu_fini(struct hl_device *hdev)
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kvfree(hdev->mmu_shadow_hop0);
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gen_pool_destroy(hdev->mmu_pgt_pool);
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mutex_destroy(&hdev->mmu_cache_lock);
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/* MMU H/W fini will be done in device hw_fini() */
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}
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@ -413,6 +413,10 @@ struct hl_debug_params_spmu {
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#define HL_DEBUG_OP_SPMU 5
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/* Opcode for timestamp */
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#define HL_DEBUG_OP_TIMESTAMP 6
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/* Opcode for setting the device into or out of debug mode. The enable
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* variable should be 1 for enabling debug mode and 0 for disabling it
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*/
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#define HL_DEBUG_OP_SET_MODE 7
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struct hl_debug_args {
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/*
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@ -574,8 +578,22 @@ struct hl_debug_args {
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*
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* This IOCTL allows the user to get debug traces from the chip.
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*
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* The user needs to provide the register index and essential data such as
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* buffer address and size.
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* Before the user can send configuration requests of the various
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* debug/profile engines, it needs to set the device into debug mode.
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* This is because the debug/profile infrastructure is shared component in the
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* device and we can't allow multiple users to access it at the same time.
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*
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* Once a user set the device into debug mode, the driver won't allow other
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* users to "work" with the device, i.e. open a FD. If there are multiple users
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* opened on the device, the driver won't allow any user to debug the device.
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*
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* For each configuration request, the user needs to provide the register index
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* and essential data such as buffer address and size.
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*
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* Once the user has finished using the debug/profile engines, he should
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* set the device into non-debug mode, i.e. disable debug mode.
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*
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* The driver can decide to "kick out" the user if he abuses this interface.
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*
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*/
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#define HL_IOCTL_DEBUG \
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