forked from luck/tmp_suning_uos_patched
[libata] minor fixes
* sata_mv: remove pci_intx(), now that the same function is in PCI core * sata_sis: fix variable initialization bug, trim trailing whitespace
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parent
03981f2427
commit
8add788574
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@ -699,22 +699,6 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
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return rc;
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}
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/* move to PCI layer, integrate w/ MSI stuff */
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static void pci_intx(struct pci_dev *pdev, int enable)
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{
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u16 pci_command, new;
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pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
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if (enable)
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new = pci_command & ~PCI_COMMAND_INTX_DISABLE;
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else
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new = pci_command | PCI_COMMAND_INTX_DISABLE;
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if (new != pci_command)
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pci_write_config_word(pdev, PCI_COMMAND, pci_command);
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}
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static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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static int printed_version = 0;
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@ -55,7 +55,7 @@ enum {
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SIS180_SATA1_OFS = 0x10, /* offset from sata0->sata1 phy regs */
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SIS182_SATA1_OFS = 0x20, /* offset from sata0->sata1 phy regs */
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SIS_PMR = 0x90, /* port mapping register */
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SIS_PMR_COMBINED = 0x30,
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SIS_PMR_COMBINED = 0x30,
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/* random bits */
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SIS_FLAG_CFGSCR = (1 << 30), /* host flag: SCRs via PCI cfg */
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@ -147,11 +147,13 @@ static unsigned int get_scr_cfg_addr(unsigned int port_no, unsigned int sc_reg,
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{
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unsigned int addr = SIS_SCR_BASE + (4 * sc_reg);
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if (port_no)
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if (port_no) {
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if (device == 0x182)
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addr += SIS182_SATA1_OFS;
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else
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addr += SIS180_SATA1_OFS;
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}
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return addr;
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}
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@ -166,10 +168,10 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
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return 0xffffffff;
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pci_read_config_byte(pdev, SIS_PMR, &pmr);
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pci_read_config_dword(pdev, cfg_addr, &val);
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if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED))
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if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED))
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pci_read_config_dword(pdev, cfg_addr+0x10, &val2);
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return val|val2;
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@ -185,7 +187,7 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
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return;
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pci_read_config_byte(pdev, SIS_PMR, &pmr);
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pci_write_config_dword(pdev, cfg_addr, val);
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if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED))
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@ -195,7 +197,7 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
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static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
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u32 val,val2;
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u32 val, val2 = 0;
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u8 pmr;
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if (sc_reg > SCR_CONTROL)
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@ -209,9 +211,9 @@ static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
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val = inl(ap->ioaddr.scr_addr + (sc_reg * 4));
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if ((pdev->device == 0x182) || (pmr & SIS_PMR_COMBINED))
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val2 = inl(ap->ioaddr.scr_addr + (sc_reg * 4)+0x10);
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val2 = inl(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
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return val|val2;
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return val | val2;
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}
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static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
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@ -223,7 +225,7 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
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return;
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pci_read_config_byte(pdev, SIS_PMR, &pmr);
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if (ap->flags & SIS_FLAG_CFGSCR)
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sis_scr_cfg_write(ap, sc_reg, val);
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else {
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