Merge branch 'fixes' into for-next

* fixes:
  ARM64: dts: meson-gx: fix UART pclk clock name
  ARM: dts: Fix dm814x missing phy-cells property
  ARM: dts: Fix elm interrupt compiler warning
  bus: arm-ccn: fix module unloading Error: Removing state 147 which has instances left.
  bus: arm-cci: Fix use of smp_processor_id() in preemptible context
  bus: arm-ccn: Fix use of smp_processor_id() in preemptible context
  bus: arm-ccn: Simplify code
  bus: arm-ccn: Check memory allocation failure
  bus: arm-ccn: constify attribute_group structures.
  meson-gx-socinfo: Fix package id parsing
  ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't"
  ARM: dts: meson: fix the memory region of the GPIO interrupt controller
  ARM: dts: meson: correct the sort order for the the gpio_intc node
This commit is contained in:
Olof Johansson 2017-12-09 20:23:58 -08:00
commit 8be0b9886b
9 changed files with 39 additions and 30 deletions

View File

@ -386,6 +386,7 @@ usb1_phy: usb-phy@1b00 {
reg = <0x1b00 0x100>; reg = <0x1b00 0x100>;
reg-names = "phy"; reg-names = "phy";
ti,ctrl_mod = <&usb_ctrl_mod>; ti,ctrl_mod = <&usb_ctrl_mod>;
#phy-cells = <0>;
}; };
}; };

View File

@ -85,15 +85,6 @@ assist: assist@7c00 {
reg = <0x7c00 0x200>; reg = <0x7c00 0x200>;
}; };
gpio_intc: interrupt-controller@9880 {
compatible = "amlogic,meson-gpio-intc";
reg = <0xc1109880 0x10>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
status = "disabled";
};
hwrng: rng@8100 { hwrng: rng@8100 {
compatible = "amlogic,meson-rng"; compatible = "amlogic,meson-rng";
reg = <0x8100 0x8>; reg = <0x8100 0x8>;
@ -191,6 +182,15 @@ spifc: spi@8c80 {
status = "disabled"; status = "disabled";
}; };
gpio_intc: interrupt-controller@9880 {
compatible = "amlogic,meson-gpio-intc";
reg = <0x9880 0x10>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
status = "disabled";
};
wdt: watchdog@9900 { wdt: watchdog@9900 {
compatible = "amlogic,meson6-wdt"; compatible = "amlogic,meson6-wdt";
reg = <0x9900 0x8>; reg = <0x9900 0x8>;

View File

@ -398,7 +398,7 @@ target-module@48076000 {
elm: elm@48078000 { elm: elm@48078000 {
compatible = "ti,am3352-elm"; compatible = "ti,am3352-elm";
reg = <0x48078000 0x2000>; reg = <0x48078000 0x2000>;
interrupts = <4>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "elm"; ti,hwmods = "elm";
status = "disabled"; status = "disabled";
}; };

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@ -102,7 +102,7 @@ static void __init meson_smp_prepare_cpus(const char *scu_compatible,
scu_base = of_iomap(node, 0); scu_base = of_iomap(node, 0);
if (!scu_base) { if (!scu_base) {
pr_err("Couln't map SCU registers\n"); pr_err("Couldn't map SCU registers\n");
return; return;
} }

View File

@ -753,12 +753,12 @@ &uart_AO_B {
&uart_B { &uart_B {
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&uart_C { &uart_C {
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&vpu { &vpu {

View File

@ -688,7 +688,7 @@ &spifc {
&uart_A { &uart_A {
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&uart_AO { &uart_AO {
@ -703,12 +703,12 @@ &uart_AO_B {
&uart_B { &uart_B {
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&uart_C { &uart_C {
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&vpu { &vpu {

View File

@ -1755,14 +1755,17 @@ static int cci_pmu_probe(struct platform_device *pdev)
raw_spin_lock_init(&cci_pmu->hw_events.pmu_lock); raw_spin_lock_init(&cci_pmu->hw_events.pmu_lock);
mutex_init(&cci_pmu->reserve_mutex); mutex_init(&cci_pmu->reserve_mutex);
atomic_set(&cci_pmu->active_events, 0); atomic_set(&cci_pmu->active_events, 0);
cpumask_set_cpu(smp_processor_id(), &cci_pmu->cpus); cpumask_set_cpu(get_cpu(), &cci_pmu->cpus);
ret = cci_pmu_init(cci_pmu, pdev); ret = cci_pmu_init(cci_pmu, pdev);
if (ret) if (ret) {
put_cpu();
return ret; return ret;
}
cpuhp_state_add_instance_nocalls(CPUHP_AP_PERF_ARM_CCI_ONLINE, cpuhp_state_add_instance_nocalls(CPUHP_AP_PERF_ARM_CCI_ONLINE,
&cci_pmu->node); &cci_pmu->node);
put_cpu();
pr_info("ARM %s PMU driver probed", cci_pmu->model->name); pr_info("ARM %s PMU driver probed", cci_pmu->model->name);
return 0; return 0;
} }

View File

@ -262,7 +262,7 @@ static struct attribute *arm_ccn_pmu_format_attrs[] = {
NULL NULL
}; };
static struct attribute_group arm_ccn_pmu_format_attr_group = { static const struct attribute_group arm_ccn_pmu_format_attr_group = {
.name = "format", .name = "format",
.attrs = arm_ccn_pmu_format_attrs, .attrs = arm_ccn_pmu_format_attrs,
}; };
@ -451,7 +451,7 @@ static struct arm_ccn_pmu_event arm_ccn_pmu_events[] = {
static struct attribute static struct attribute
*arm_ccn_pmu_events_attrs[ARRAY_SIZE(arm_ccn_pmu_events) + 1]; *arm_ccn_pmu_events_attrs[ARRAY_SIZE(arm_ccn_pmu_events) + 1];
static struct attribute_group arm_ccn_pmu_events_attr_group = { static const struct attribute_group arm_ccn_pmu_events_attr_group = {
.name = "events", .name = "events",
.is_visible = arm_ccn_pmu_events_is_visible, .is_visible = arm_ccn_pmu_events_is_visible,
.attrs = arm_ccn_pmu_events_attrs, .attrs = arm_ccn_pmu_events_attrs,
@ -548,7 +548,7 @@ static struct attribute *arm_ccn_pmu_cmp_mask_attrs[] = {
NULL NULL
}; };
static struct attribute_group arm_ccn_pmu_cmp_mask_attr_group = { static const struct attribute_group arm_ccn_pmu_cmp_mask_attr_group = {
.name = "cmp_mask", .name = "cmp_mask",
.attrs = arm_ccn_pmu_cmp_mask_attrs, .attrs = arm_ccn_pmu_cmp_mask_attrs,
}; };
@ -569,7 +569,7 @@ static struct attribute *arm_ccn_pmu_cpumask_attrs[] = {
NULL, NULL,
}; };
static struct attribute_group arm_ccn_pmu_cpumask_attr_group = { static const struct attribute_group arm_ccn_pmu_cpumask_attr_group = {
.attrs = arm_ccn_pmu_cpumask_attrs, .attrs = arm_ccn_pmu_cpumask_attrs,
}; };
@ -1268,10 +1268,12 @@ static int arm_ccn_pmu_init(struct arm_ccn *ccn)
if (ccn->dt.id == 0) { if (ccn->dt.id == 0) {
name = "ccn"; name = "ccn";
} else { } else {
int len = snprintf(NULL, 0, "ccn_%d", ccn->dt.id); name = devm_kasprintf(ccn->dev, GFP_KERNEL, "ccn_%d",
ccn->dt.id);
name = devm_kzalloc(ccn->dev, len + 1, GFP_KERNEL); if (!name) {
snprintf(name, len + 1, "ccn_%d", ccn->dt.id); err = -ENOMEM;
goto error_choose_name;
}
} }
/* Perf driver registration */ /* Perf driver registration */
@ -1298,7 +1300,7 @@ static int arm_ccn_pmu_init(struct arm_ccn *ccn)
} }
/* Pick one CPU which we will use to collect data from CCN... */ /* Pick one CPU which we will use to collect data from CCN... */
cpumask_set_cpu(smp_processor_id(), &ccn->dt.cpu); cpumask_set_cpu(get_cpu(), &ccn->dt.cpu);
/* Also make sure that the overflow interrupt is handled by this CPU */ /* Also make sure that the overflow interrupt is handled by this CPU */
if (ccn->irq) { if (ccn->irq) {
@ -1315,10 +1317,13 @@ static int arm_ccn_pmu_init(struct arm_ccn *ccn)
cpuhp_state_add_instance_nocalls(CPUHP_AP_PERF_ARM_CCN_ONLINE, cpuhp_state_add_instance_nocalls(CPUHP_AP_PERF_ARM_CCN_ONLINE,
&ccn->dt.node); &ccn->dt.node);
put_cpu();
return 0; return 0;
error_pmu_register: error_pmu_register:
error_set_affinity: error_set_affinity:
put_cpu();
error_choose_name:
ida_simple_remove(&arm_ccn_pmu_ida, ccn->dt.id); ida_simple_remove(&arm_ccn_pmu_ida, ccn->dt.id);
for (i = 0; i < ccn->num_xps; i++) for (i = 0; i < ccn->num_xps; i++)
writel(0, ccn->xp[i].base + CCN_XP_DT_CONTROL); writel(0, ccn->xp[i].base + CCN_XP_DT_CONTROL);
@ -1581,8 +1586,8 @@ static int __init arm_ccn_init(void)
static void __exit arm_ccn_exit(void) static void __exit arm_ccn_exit(void)
{ {
cpuhp_remove_multi_state(CPUHP_AP_PERF_ARM_CCN_ONLINE);
platform_driver_unregister(&arm_ccn_driver); platform_driver_unregister(&arm_ccn_driver);
cpuhp_remove_multi_state(CPUHP_AP_PERF_ARM_CCN_ONLINE);
} }
module_init(arm_ccn_init); module_init(arm_ccn_init);

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@ -20,8 +20,8 @@
#define AO_SEC_SOCINFO_OFFSET AO_SEC_SD_CFG8 #define AO_SEC_SOCINFO_OFFSET AO_SEC_SD_CFG8
#define SOCINFO_MAJOR GENMASK(31, 24) #define SOCINFO_MAJOR GENMASK(31, 24)
#define SOCINFO_MINOR GENMASK(23, 16) #define SOCINFO_PACK GENMASK(23, 16)
#define SOCINFO_PACK GENMASK(15, 8) #define SOCINFO_MINOR GENMASK(15, 8)
#define SOCINFO_MISC GENMASK(7, 0) #define SOCINFO_MISC GENMASK(7, 0)
static const struct meson_gx_soc_id { static const struct meson_gx_soc_id {