forked from luck/tmp_suning_uos_patched
igc: Add ethtool support
This patch adds basic ethtool support to the device to allow for configuration. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Sasha Neftin
Jeff Kirsher
parent
a865d22d59
commit
8c5ad0dae9
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@ -7,4 +7,5 @@
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obj-$(CONFIG_IGC) += igc.o
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igc-objs := igc_main.o igc_mac.o igc_i225.o igc_base.o igc_nvm.o igc_phy.o
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igc-objs := igc_main.o igc_mac.o igc_i225.o igc_base.o igc_nvm.o igc_phy.o \
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igc_ethtool.o
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@ -13,19 +13,43 @@
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#include "igc_hw.h"
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/* main */
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/* forward declaration */
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void igc_set_ethtool_ops(struct net_device *);
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struct igc_adapter;
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struct igc_ring;
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void igc_up(struct igc_adapter *adapter);
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void igc_down(struct igc_adapter *adapter);
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int igc_setup_tx_resources(struct igc_ring *ring);
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int igc_setup_rx_resources(struct igc_ring *ring);
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void igc_free_tx_resources(struct igc_ring *ring);
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void igc_free_rx_resources(struct igc_ring *ring);
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unsigned int igc_get_max_rss_queues(struct igc_adapter *adapter);
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void igc_set_flag_queue_pairs(struct igc_adapter *adapter,
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const u32 max_rss_queues);
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int igc_reinit_queues(struct igc_adapter *adapter);
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bool igc_has_link(struct igc_adapter *adapter);
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void igc_reset(struct igc_adapter *adapter);
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int igc_set_spd_dplx(struct igc_adapter *adapter, u32 spd, u8 dplx);
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extern char igc_driver_name[];
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extern char igc_driver_version[];
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#define IGC_REGS_LEN 740
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#define IGC_RETA_SIZE 128
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/* Interrupt defines */
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#define IGC_START_ITR 648 /* ~6000 ints/sec */
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#define IGC_FLAG_HAS_MSI BIT(0)
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#define IGC_FLAG_QUEUE_PAIRS BIT(4)
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#define IGC_FLAG_QUEUE_PAIRS BIT(3)
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#define IGC_FLAG_DMAC BIT(4)
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#define IGC_FLAG_NEED_LINK_UPDATE BIT(9)
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#define IGC_FLAG_MEDIA_RESET BIT(10)
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#define IGC_FLAG_MAS_ENABLE BIT(12)
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#define IGC_FLAG_HAS_MSIX BIT(13)
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#define IGC_FLAG_VLAN_PROMISC BIT(15)
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#define IGC_FLAG_RX_LEGACY BIT(16)
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#define IGC_START_ITR 648 /* ~6000 ints/sec */
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#define IGC_4K_ITR 980
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@ -60,6 +84,7 @@ extern char igc_driver_version[];
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#define IGC_RXBUFFER_2048 2048
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#define IGC_RXBUFFER_3072 3072
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#define AUTO_ALL_MODES 0
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#define IGC_RX_HDR_LEN IGC_RXBUFFER_256
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/* RX and TX descriptor control thresholds.
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@ -340,6 +365,8 @@ struct igc_adapter {
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struct igc_mac_addr *mac_table;
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u8 rss_indir_tbl[IGC_RETA_SIZE];
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unsigned long link_check_timeout;
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struct igc_info ei;
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};
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@ -418,6 +445,9 @@ static inline s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data)
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return 0;
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}
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/* forward declaration */
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void igc_reinit_locked(struct igc_adapter *);
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#define igc_rx_pg_size(_ring) (PAGE_SIZE << igc_rx_pg_order(_ring))
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#define IGC_TXD_DCMD (IGC_ADVTXD_DCMD_EOP | IGC_ADVTXD_DCMD_RS)
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@ -131,6 +131,7 @@ static s32 igc_init_nvm_params_base(struct igc_hw *hw)
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if (size > 15)
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size = 15;
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nvm->type = igc_nvm_eeprom_spi;
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nvm->word_size = BIT(size);
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nvm->opcode_bits = 8;
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nvm->delay_usec = 1;
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@ -4,6 +4,10 @@
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#ifndef _IGC_DEFINES_H_
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#define _IGC_DEFINES_H_
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/* Number of Transmit and Receive Descriptors must be a multiple of 8 */
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#define REQ_TX_DESCRIPTOR_MULTIPLE 8
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#define REQ_RX_DESCRIPTOR_MULTIPLE 8
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#define IGC_CTRL_EXT_DRV_LOAD 0x10000000 /* Drv loaded bit for FW */
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/* PCI Bus Info */
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1032
drivers/net/ethernet/intel/igc/igc_ethtool.c
Normal file
1032
drivers/net/ethernet/intel/igc/igc_ethtool.c
Normal file
File diff suppressed because it is too large
Load Diff
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@ -55,6 +55,7 @@ enum igc_media_type {
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enum igc_nvm_type {
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igc_nvm_unknown = 0,
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igc_nvm_eeprom_spi,
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igc_nvm_flash_hw,
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igc_nvm_invm,
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};
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@ -12,6 +12,8 @@
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#define DRV_VERSION "0.0.1-k"
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#define DRV_SUMMARY "Intel(R) 2.5G Ethernet Linux Driver"
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#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
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static int debug = -1;
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MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
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@ -66,7 +68,7 @@ enum latency_range {
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latency_invalid = 255
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};
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static void igc_reset(struct igc_adapter *adapter)
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void igc_reset(struct igc_adapter *adapter)
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{
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struct pci_dev *pdev = adapter->pdev;
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struct igc_hw *hw = &adapter->hw;
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@ -150,7 +152,7 @@ static void igc_get_hw_control(struct igc_adapter *adapter)
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*
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* Free all transmit software resources
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*/
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static void igc_free_tx_resources(struct igc_ring *tx_ring)
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void igc_free_tx_resources(struct igc_ring *tx_ring)
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{
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igc_clean_tx_ring(tx_ring);
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@ -261,7 +263,7 @@ static void igc_clean_all_tx_rings(struct igc_adapter *adapter)
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*
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* Return 0 on success, negative on failure
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*/
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static int igc_setup_tx_resources(struct igc_ring *tx_ring)
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int igc_setup_tx_resources(struct igc_ring *tx_ring)
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{
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struct device *dev = tx_ring->dev;
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int size = 0;
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@ -381,7 +383,7 @@ static void igc_clean_all_rx_rings(struct igc_adapter *adapter)
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*
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* Free all receive software resources
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*/
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static void igc_free_rx_resources(struct igc_ring *rx_ring)
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void igc_free_rx_resources(struct igc_ring *rx_ring)
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{
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igc_clean_rx_ring(rx_ring);
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@ -418,7 +420,7 @@ static void igc_free_all_rx_resources(struct igc_adapter *adapter)
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*
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* Returns 0 on success, negative on failure
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*/
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static int igc_setup_rx_resources(struct igc_ring *rx_ring)
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int igc_setup_rx_resources(struct igc_ring *rx_ring)
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{
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struct device *dev = rx_ring->dev;
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int size, desc_len;
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@ -1703,7 +1705,7 @@ static bool igc_clean_tx_irq(struct igc_q_vector *q_vector, int napi_budget)
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* igc_up - Open the interface and prepare it to handle traffic
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* @adapter: board private structure
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*/
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static void igc_up(struct igc_adapter *adapter)
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void igc_up(struct igc_adapter *adapter)
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{
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struct igc_hw *hw = &adapter->hw;
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int i = 0;
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@ -1748,7 +1750,7 @@ static void igc_nfc_filter_exit(struct igc_adapter *adapter)
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* igc_down - Close the interface
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* @adapter: board private structure
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*/
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static void igc_down(struct igc_adapter *adapter)
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void igc_down(struct igc_adapter *adapter)
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{
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struct net_device *netdev = adapter->netdev;
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struct igc_hw *hw = &adapter->hw;
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@ -1810,7 +1812,7 @@ static void igc_down(struct igc_adapter *adapter)
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igc_clean_all_rx_rings(adapter);
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}
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static void igc_reinit_locked(struct igc_adapter *adapter)
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void igc_reinit_locked(struct igc_adapter *adapter)
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{
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WARN_ON(in_interrupt());
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while (test_and_set_bit(__IGC_RESETTING, &adapter->state))
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@ -1922,7 +1924,7 @@ static void igc_configure(struct igc_adapter *adapter)
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/**
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* igc_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
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* @adapter: Pointer to adapter structure
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* @adapter: address of board private structure
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* @index: Index of the RAR entry which need to be synced with MAC table
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*/
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static void igc_rar_set_index(struct igc_adapter *adapter, u32 index)
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@ -2298,7 +2300,7 @@ static void igc_update_phy_info(struct timer_list *t)
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* igc_has_link - check shared code for link and determine up/down
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* @adapter: pointer to driver private info
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*/
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static bool igc_has_link(struct igc_adapter *adapter)
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bool igc_has_link(struct igc_adapter *adapter)
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{
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struct igc_hw *hw = &adapter->hw;
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bool link_active = false;
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@ -3501,6 +3503,57 @@ u32 igc_rd32(struct igc_hw *hw, u32 reg)
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return value;
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}
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int igc_set_spd_dplx(struct igc_adapter *adapter, u32 spd, u8 dplx)
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{
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struct pci_dev *pdev = adapter->pdev;
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struct igc_mac_info *mac = &adapter->hw.mac;
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mac->autoneg = 0;
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/* Make sure dplx is at most 1 bit and lsb of speed is not set
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* for the switch() below to work
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*/
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if ((spd & 1) || (dplx & ~1))
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goto err_inval;
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switch (spd + dplx) {
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case SPEED_10 + DUPLEX_HALF:
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mac->forced_speed_duplex = ADVERTISE_10_HALF;
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break;
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case SPEED_10 + DUPLEX_FULL:
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mac->forced_speed_duplex = ADVERTISE_10_FULL;
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break;
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case SPEED_100 + DUPLEX_HALF:
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mac->forced_speed_duplex = ADVERTISE_100_HALF;
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break;
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case SPEED_100 + DUPLEX_FULL:
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mac->forced_speed_duplex = ADVERTISE_100_FULL;
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break;
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case SPEED_1000 + DUPLEX_FULL:
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mac->autoneg = 1;
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adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
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break;
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case SPEED_1000 + DUPLEX_HALF: /* not supported */
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goto err_inval;
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case SPEED_2500 + DUPLEX_FULL:
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mac->autoneg = 1;
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adapter->hw.phy.autoneg_advertised = ADVERTISE_2500_FULL;
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break;
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case SPEED_2500 + DUPLEX_HALF: /* not supported */
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default:
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goto err_inval;
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}
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/* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
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adapter->hw.phy.mdix = AUTO_ALL_MODES;
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return 0;
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err_inval:
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dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
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return -EINVAL;
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}
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/**
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* igc_probe - Device Initialization Routine
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* @pdev: PCI device information struct
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@ -3568,7 +3621,7 @@ static int igc_probe(struct pci_dev *pdev,
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hw = &adapter->hw;
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hw->back = adapter;
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adapter->port_num = hw->bus.func;
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adapter->msg_enable = GENMASK(debug - 1, 0);
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adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
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err = pci_save_state(pdev);
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if (err)
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@ -3584,7 +3637,7 @@ static int igc_probe(struct pci_dev *pdev,
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hw->hw_addr = adapter->io_addr;
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netdev->netdev_ops = &igc_netdev_ops;
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igc_set_ethtool_ops(netdev);
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netdev->watchdog_timeo = 5 * HZ;
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netdev->mem_start = pci_resource_start(pdev, 0);
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@ -3744,8 +3797,8 @@ static struct pci_driver igc_driver = {
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.remove = igc_remove,
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};
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static void igc_set_flag_queue_pairs(struct igc_adapter *adapter,
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const u32 max_rss_queues)
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void igc_set_flag_queue_pairs(struct igc_adapter *adapter,
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const u32 max_rss_queues)
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{
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/* Determine if we need to pair queues. */
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/* If rss_queues > half of max_rss_queues, pair the queues in
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@ -3757,7 +3810,7 @@ static void igc_set_flag_queue_pairs(struct igc_adapter *adapter,
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adapter->flags &= ~IGC_FLAG_QUEUE_PAIRS;
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}
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static unsigned int igc_get_max_rss_queues(struct igc_adapter *adapter)
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unsigned int igc_get_max_rss_queues(struct igc_adapter *adapter)
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{
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unsigned int max_rss_queues;
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@ -3836,6 +3889,32 @@ static int igc_sw_init(struct igc_adapter *adapter)
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return 0;
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}
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/**
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* igc_reinit_queues - return error
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* @adapter: pointer to adapter structure
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*/
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int igc_reinit_queues(struct igc_adapter *adapter)
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{
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struct net_device *netdev = adapter->netdev;
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struct pci_dev *pdev = adapter->pdev;
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int err = 0;
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if (netif_running(netdev))
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igc_close(netdev);
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igc_reset_interrupt_capability(adapter);
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if (igc_init_interrupt_scheme(adapter, true)) {
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dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
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return -ENOMEM;
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}
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if (netif_running(netdev))
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err = igc_open(netdev);
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return err;
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}
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/**
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* igc_get_hw_dev - return device
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* @hw: pointer to hardware structure
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@ -80,6 +80,9 @@
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/* MSI-X Table Register Descriptions */
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#define IGC_PBACL 0x05B68 /* MSIx PBA Clear - R/W 1 to clear */
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/* Redirection Table - RW Array */
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#define IGC_RETA(_i) (0x05C00 + ((_i) * 4))
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/* Receive Register Descriptions */
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#define IGC_RCTL 0x00100 /* Rx Control - RW */
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#define IGC_SRRCTL(_n) (0x0C00C + ((_n) * 0x40))
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