forked from luck/tmp_suning_uos_patched
Merge branches 'sh/urgent', 'sh/vsyscall' and 'common/serial-rework' into sh-latest
This commit is contained in:
Paul Mundt
commit
915ab1771b
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@ -34,6 +34,41 @@ __kernel_rt_sigreturn:
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|||
1: .short __NR_rt_sigreturn
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.LEND_rt_sigreturn:
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.size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
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.previous
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.section .eh_frame,"a",@progbits
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.LCIE1:
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.ualong .LCIE1_end - .LCIE1_start
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||||
.LCIE1_start:
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||||
.ualong 0 /* CIE ID */
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||||
.byte 0x1 /* Version number */
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.string "zRS" /* NUL-terminated augmentation string */
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.uleb128 0x1 /* Code alignment factor */
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.sleb128 -4 /* Data alignment factor */
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.byte 0x11 /* Return address register column */
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.uleb128 0x1 /* Augmentation length and data */
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.byte 0x1b /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
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.byte 0xc, 0xf, 0x0 /* DW_CFA_def_cfa: r15 ofs 0 */
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.align 2
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.LCIE1_end:
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.ualong .LFDE0_end-.LFDE0_start /* Length FDE0 */
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.LFDE0_start:
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.ualong .LFDE0_start-.LCIE1 /* CIE pointer */
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.ualong .LSTART_sigreturn-. /* PC-relative start address */
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.ualong .LEND_sigreturn-.LSTART_sigreturn
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.uleb128 0 /* Augmentation */
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.align 2
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.LFDE0_end:
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.ualong .LFDE1_end-.LFDE1_start /* Length FDE1 */
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.LFDE1_start:
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.ualong .LFDE1_start-.LCIE1 /* CIE pointer */
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.ualong .LSTART_rt_sigreturn-. /* PC-relative start address */
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.ualong .LEND_rt_sigreturn-.LSTART_rt_sigreturn
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.uleb128 0 /* Augmentation */
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.align 2
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.LFDE1_end:
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.previous
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@ -3,37 +3,34 @@
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.type __kernel_vsyscall,@function
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__kernel_vsyscall:
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.LSTART_vsyscall:
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/* XXX: We'll have to do something here once we opt to use the vDSO
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* page for something other than the signal trampoline.. as well as
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* fill out .eh_frame -- PFM. */
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trapa #0x10
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nop
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.LEND_vsyscall:
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.size __kernel_vsyscall,.-.LSTART_vsyscall
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.previous
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.section .eh_frame,"a",@progbits
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.previous
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.LCIE:
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.ualong .LCIE_end - .LCIE_start
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.LCIE_start:
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.ualong 0 /* CIE ID */
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.byte 0x1 /* Version number */
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.string "zRS" /* NUL-terminated augmentation string */
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.string "zR" /* NUL-terminated augmentation string */
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.uleb128 0x1 /* Code alignment factor */
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.sleb128 -4 /* Data alignment factor */
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.byte 0x11 /* Return address register column */
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/* Augmentation length and data (none) */
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.byte 0xc /* DW_CFA_def_cfa */
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.uleb128 0xf /* r15 */
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.uleb128 0x0 /* offset 0 */
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.uleb128 0x1 /* Augmentation length and data */
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.byte 0x1b /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
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.byte 0xc,0xf,0x0 /* DW_CFA_def_cfa: r15 ofs 0 */
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.align 2
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.LCIE_end:
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.ualong .LFDE_end-.LFDE_start /* Length FDE */
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.LFDE_start:
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.ualong .LCIE /* CIE pointer */
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.ualong .LSTART_vsyscall-. /* start address */
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.ualong .LFDE_start-.LCIE /* CIE pointer */
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.ualong .LSTART_vsyscall-. /* PC-relative start address */
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.ualong .LEND_vsyscall-.LSTART_vsyscall
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.uleb128 0
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.uleb128 0 /* Augmentation */
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.align 2
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.LFDE_end:
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.previous
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|
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@ -355,9 +355,6 @@ static void sci_serial_out(struct uart_port *p, int offset, int value)
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WARN(1, "Invalid register access\n");
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}
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#define sci_in(up, offset) (up->serial_in(up, offset))
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#define sci_out(up, offset, value) (up->serial_out(up, offset, value))
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static int sci_probe_regmap(struct plat_sci_port *cfg)
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{
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switch (cfg->type) {
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@ -422,9 +419,9 @@ static int sci_poll_get_char(struct uart_port *port)
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int c;
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do {
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status = sci_in(port, SCxSR);
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status = serial_port_in(port, SCxSR);
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if (status & SCxSR_ERRORS(port)) {
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sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
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serial_port_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
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continue;
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}
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break;
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@ -433,11 +430,11 @@ static int sci_poll_get_char(struct uart_port *port)
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if (!(status & SCxSR_RDxF(port)))
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return NO_POLL_CHAR;
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c = sci_in(port, SCxRDR);
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c = serial_port_in(port, SCxRDR);
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/* Dummy read */
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sci_in(port, SCxSR);
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sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
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serial_port_in(port, SCxSR);
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serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
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return c;
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}
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@ -448,11 +445,11 @@ static void sci_poll_put_char(struct uart_port *port, unsigned char c)
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unsigned short status;
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do {
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status = sci_in(port, SCxSR);
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status = serial_port_in(port, SCxSR);
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} while (!(status & SCxSR_TDxE(port)));
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sci_out(port, SCxTDR, c);
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sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
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serial_port_out(port, SCxTDR, c);
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serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
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}
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#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
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@ -480,10 +477,10 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
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((!(cflag & CRTSCTS)))) {
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unsigned short status;
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status = sci_in(port, SCSPTR);
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status = serial_port_in(port, SCSPTR);
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status &= ~SCSPTR_CTSIO;
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status |= SCSPTR_RTSIO;
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sci_out(port, SCSPTR, status); /* Set RTS = 1 */
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serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
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}
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}
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@ -493,13 +490,13 @@ static int sci_txfill(struct uart_port *port)
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reg = sci_getreg(port, SCTFDR);
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if (reg->size)
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return sci_in(port, SCTFDR) & 0xff;
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return serial_port_in(port, SCTFDR) & 0xff;
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reg = sci_getreg(port, SCFDR);
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if (reg->size)
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return sci_in(port, SCFDR) >> 8;
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return serial_port_in(port, SCFDR) >> 8;
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return !(sci_in(port, SCxSR) & SCI_TDRE);
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return !(serial_port_in(port, SCxSR) & SCI_TDRE);
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}
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static int sci_txroom(struct uart_port *port)
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@ -513,13 +510,13 @@ static int sci_rxfill(struct uart_port *port)
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reg = sci_getreg(port, SCRFDR);
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if (reg->size)
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return sci_in(port, SCRFDR) & 0xff;
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return serial_port_in(port, SCRFDR) & 0xff;
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reg = sci_getreg(port, SCFDR);
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if (reg->size)
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return sci_in(port, SCFDR) & ((port->fifosize << 1) - 1);
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return serial_port_in(port, SCFDR) & ((port->fifosize << 1) - 1);
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return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
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return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
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}
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/*
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@ -547,14 +544,14 @@ static void sci_transmit_chars(struct uart_port *port)
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unsigned short ctrl;
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int count;
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status = sci_in(port, SCxSR);
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status = serial_port_in(port, SCxSR);
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if (!(status & SCxSR_TDxE(port))) {
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ctrl = sci_in(port, SCSCR);
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ctrl = serial_port_in(port, SCSCR);
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if (uart_circ_empty(xmit))
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ctrl &= ~SCSCR_TIE;
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else
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ctrl |= SCSCR_TIE;
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sci_out(port, SCSCR, ctrl);
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serial_port_out(port, SCSCR, ctrl);
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return;
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}
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@ -573,27 +570,27 @@ static void sci_transmit_chars(struct uart_port *port)
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break;
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}
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sci_out(port, SCxTDR, c);
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serial_port_out(port, SCxTDR, c);
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port->icount.tx++;
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} while (--count > 0);
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sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
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serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit)) {
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sci_stop_tx(port);
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} else {
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ctrl = sci_in(port, SCSCR);
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ctrl = serial_port_in(port, SCSCR);
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if (port->type != PORT_SCI) {
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sci_in(port, SCxSR); /* Dummy read */
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sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
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serial_port_in(port, SCxSR); /* Dummy read */
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serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
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}
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ctrl |= SCSCR_TIE;
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sci_out(port, SCSCR, ctrl);
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serial_port_out(port, SCSCR, ctrl);
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}
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}
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@ -608,7 +605,7 @@ static void sci_receive_chars(struct uart_port *port)
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unsigned short status;
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unsigned char flag;
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status = sci_in(port, SCxSR);
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status = serial_port_in(port, SCxSR);
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if (!(status & SCxSR_RDxF(port)))
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return;
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@ -621,7 +618,7 @@ static void sci_receive_chars(struct uart_port *port)
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break;
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if (port->type == PORT_SCI) {
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char c = sci_in(port, SCxRDR);
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char c = serial_port_in(port, SCxRDR);
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if (uart_handle_sysrq_char(port, c) ||
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sci_port->break_flag)
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count = 0;
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@ -629,9 +626,9 @@ static void sci_receive_chars(struct uart_port *port)
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tty_insert_flip_char(tty, c, TTY_NORMAL);
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} else {
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for (i = 0; i < count; i++) {
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char c = sci_in(port, SCxRDR);
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char c = serial_port_in(port, SCxRDR);
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status = sci_in(port, SCxSR);
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status = serial_port_in(port, SCxSR);
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#if defined(CONFIG_CPU_SH3)
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/* Skip "chars" during break */
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if (sci_port->break_flag) {
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@ -672,8 +669,8 @@ static void sci_receive_chars(struct uart_port *port)
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}
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}
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sci_in(port, SCxSR); /* dummy read */
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sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
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serial_port_in(port, SCxSR); /* dummy read */
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serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
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copied += count;
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port->icount.rx += count;
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@ -683,8 +680,8 @@ static void sci_receive_chars(struct uart_port *port)
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/* Tell the rest of the system the news. New characters! */
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tty_flip_buffer_push(tty);
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} else {
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sci_in(port, SCxSR); /* dummy read */
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sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
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serial_port_in(port, SCxSR); /* dummy read */
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serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
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}
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}
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@ -726,7 +723,7 @@ static void sci_break_timer(unsigned long data)
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static int sci_handle_errors(struct uart_port *port)
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{
|
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int copied = 0;
|
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unsigned short status = sci_in(port, SCxSR);
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unsigned short status = serial_port_in(port, SCxSR);
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struct tty_struct *tty = port->state->port.tty;
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struct sci_port *s = to_sci_port(port);
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|
|
@ -804,8 +801,8 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
|
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if (!reg->size)
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return 0;
|
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|
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if ((sci_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
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sci_out(port, SCLSR, 0);
|
||||
if ((serial_port_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
|
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serial_port_out(port, SCLSR, 0);
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|
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port->icount.overrun++;
|
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|
||||
|
|
@ -822,7 +819,7 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
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static int sci_handle_breaks(struct uart_port *port)
|
||||
{
|
||||
int copied = 0;
|
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unsigned short status = sci_in(port, SCxSR);
|
||||
unsigned short status = serial_port_in(port, SCxSR);
|
||||
struct tty_struct *tty = port->state->port.tty;
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struct sci_port *s = to_sci_port(port);
|
||||
|
||||
|
|
@ -859,8 +856,8 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
|
|||
struct sci_port *s = to_sci_port(port);
|
||||
|
||||
if (s->chan_rx) {
|
||||
u16 scr = sci_in(port, SCSCR);
|
||||
u16 ssr = sci_in(port, SCxSR);
|
||||
u16 scr = serial_port_in(port, SCSCR);
|
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u16 ssr = serial_port_in(port, SCxSR);
|
||||
|
||||
/* Disable future Rx interrupts */
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
|
|
@ -869,9 +866,9 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
|
|||
} else {
|
||||
scr &= ~SCSCR_RIE;
|
||||
}
|
||||
sci_out(port, SCSCR, scr);
|
||||
serial_port_out(port, SCSCR, scr);
|
||||
/* Clear current interrupt */
|
||||
sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
|
||||
serial_port_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
|
||||
dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n",
|
||||
jiffies, s->rx_timeout);
|
||||
mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
|
||||
|
|
@ -909,15 +906,15 @@ static irqreturn_t sci_er_interrupt(int irq, void *ptr)
|
|||
if (port->type == PORT_SCI) {
|
||||
if (sci_handle_errors(port)) {
|
||||
/* discard character in rx buffer */
|
||||
sci_in(port, SCxSR);
|
||||
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
|
||||
serial_port_in(port, SCxSR);
|
||||
serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
|
||||
}
|
||||
} else {
|
||||
sci_handle_fifo_overrun(port);
|
||||
sci_rx_interrupt(irq, ptr);
|
||||
}
|
||||
|
||||
sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
|
||||
serial_port_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
|
||||
|
||||
/* Kick the transmission */
|
||||
sci_tx_interrupt(irq, ptr);
|
||||
|
|
@ -931,7 +928,7 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr)
|
|||
|
||||
/* Handle BREAKs */
|
||||
sci_handle_breaks(port);
|
||||
sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
|
||||
serial_port_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
@ -955,8 +952,8 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
|
|||
struct sci_port *s = to_sci_port(port);
|
||||
irqreturn_t ret = IRQ_NONE;
|
||||
|
||||
ssr_status = sci_in(port, SCxSR);
|
||||
scr_status = sci_in(port, SCSCR);
|
||||
ssr_status = serial_port_in(port, SCxSR);
|
||||
scr_status = serial_port_in(port, SCSCR);
|
||||
err_enabled = scr_status & port_rx_irq_mask(port);
|
||||
|
||||
/* Tx Interrupt */
|
||||
|
|
@ -1170,7 +1167,7 @@ static void sci_free_gpios(struct sci_port *port)
|
|||
|
||||
static unsigned int sci_tx_empty(struct uart_port *port)
|
||||
{
|
||||
unsigned short status = sci_in(port, SCxSR);
|
||||
unsigned short status = serial_port_in(port, SCxSR);
|
||||
unsigned short in_tx_fifo = sci_txfill(port);
|
||||
|
||||
return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
|
||||
|
|
@ -1198,7 +1195,7 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|||
*/
|
||||
reg = sci_getreg(port, SCFCR);
|
||||
if (reg->size)
|
||||
sci_out(port, SCFCR, sci_in(port, SCFCR) | 1);
|
||||
serial_port_out(port, SCFCR, serial_port_in(port, SCFCR) | 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1240,8 +1237,8 @@ static void sci_dma_tx_complete(void *arg)
|
|||
} else {
|
||||
s->cookie_tx = -EINVAL;
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
u16 ctrl = sci_in(port, SCSCR);
|
||||
sci_out(port, SCSCR, ctrl & ~SCSCR_TIE);
|
||||
u16 ctrl = serial_port_in(port, SCSCR);
|
||||
serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1494,13 +1491,13 @@ static void sci_start_tx(struct uart_port *port)
|
|||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_DMA
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
u16 new, scr = sci_in(port, SCSCR);
|
||||
u16 new, scr = serial_port_in(port, SCSCR);
|
||||
if (s->chan_tx)
|
||||
new = scr | 0x8000;
|
||||
else
|
||||
new = scr & ~0x8000;
|
||||
if (new != scr)
|
||||
sci_out(port, SCSCR, new);
|
||||
serial_port_out(port, SCSCR, new);
|
||||
}
|
||||
|
||||
if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
|
||||
|
|
@ -1512,8 +1509,8 @@ static void sci_start_tx(struct uart_port *port)
|
|||
|
||||
if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
|
||||
ctrl = sci_in(port, SCSCR);
|
||||
sci_out(port, SCSCR, ctrl | SCSCR_TIE);
|
||||
ctrl = serial_port_in(port, SCSCR);
|
||||
serial_port_out(port, SCSCR, ctrl | SCSCR_TIE);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1522,40 +1519,40 @@ static void sci_stop_tx(struct uart_port *port)
|
|||
unsigned short ctrl;
|
||||
|
||||
/* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
|
||||
ctrl = sci_in(port, SCSCR);
|
||||
ctrl = serial_port_in(port, SCSCR);
|
||||
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
|
||||
ctrl &= ~0x8000;
|
||||
|
||||
ctrl &= ~SCSCR_TIE;
|
||||
|
||||
sci_out(port, SCSCR, ctrl);
|
||||
serial_port_out(port, SCSCR, ctrl);
|
||||
}
|
||||
|
||||
static void sci_start_rx(struct uart_port *port)
|
||||
{
|
||||
unsigned short ctrl;
|
||||
|
||||
ctrl = sci_in(port, SCSCR) | port_rx_irq_mask(port);
|
||||
ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port);
|
||||
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
|
||||
ctrl &= ~0x4000;
|
||||
|
||||
sci_out(port, SCSCR, ctrl);
|
||||
serial_port_out(port, SCSCR, ctrl);
|
||||
}
|
||||
|
||||
static void sci_stop_rx(struct uart_port *port)
|
||||
{
|
||||
unsigned short ctrl;
|
||||
|
||||
ctrl = sci_in(port, SCSCR);
|
||||
ctrl = serial_port_in(port, SCSCR);
|
||||
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
|
||||
ctrl &= ~0x4000;
|
||||
|
||||
ctrl &= ~port_rx_irq_mask(port);
|
||||
|
||||
sci_out(port, SCSCR, ctrl);
|
||||
serial_port_out(port, SCSCR, ctrl);
|
||||
}
|
||||
|
||||
static void sci_enable_ms(struct uart_port *port)
|
||||
|
|
@ -1589,13 +1586,13 @@ static void rx_timer_fn(unsigned long arg)
|
|||
{
|
||||
struct sci_port *s = (struct sci_port *)arg;
|
||||
struct uart_port *port = &s->port;
|
||||
u16 scr = sci_in(port, SCSCR);
|
||||
u16 scr = serial_port_in(port, SCSCR);
|
||||
|
||||
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
|
||||
scr &= ~0x4000;
|
||||
enable_irq(s->cfg->irqs[1]);
|
||||
}
|
||||
sci_out(port, SCSCR, scr | SCSCR_RIE);
|
||||
serial_port_out(port, SCSCR, scr | SCSCR_RIE);
|
||||
dev_dbg(port->dev, "DMA Rx timed out\n");
|
||||
schedule_work(&s->work_rx);
|
||||
}
|
||||
|
|
@ -1776,14 +1773,14 @@ static void sci_reset(struct uart_port *port)
|
|||
unsigned int status;
|
||||
|
||||
do {
|
||||
status = sci_in(port, SCxSR);
|
||||
status = serial_port_in(port, SCxSR);
|
||||
} while (!(status & SCxSR_TEND(port)));
|
||||
|
||||
sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
|
||||
serial_port_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
|
||||
|
||||
reg = sci_getreg(port, SCFCR);
|
||||
if (reg->size)
|
||||
sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
|
||||
serial_port_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
|
||||
}
|
||||
|
||||
static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
|
|
@ -1812,7 +1809,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
|
||||
sci_reset(port);
|
||||
|
||||
smr_val = sci_in(port, SCSMR) & 3;
|
||||
smr_val = serial_port_in(port, SCSMR) & 3;
|
||||
|
||||
if ((termios->c_cflag & CSIZE) == CS7)
|
||||
smr_val |= 0x40;
|
||||
|
|
@ -1825,19 +1822,19 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
|
||||
uart_update_timeout(port, termios->c_cflag, baud);
|
||||
|
||||
sci_out(port, SCSMR, smr_val);
|
||||
serial_port_out(port, SCSMR, smr_val);
|
||||
|
||||
dev_dbg(port->dev, "%s: SMR %x, t %x, SCSCR %x\n", __func__, smr_val, t,
|
||||
s->cfg->scscr);
|
||||
|
||||
if (t > 0) {
|
||||
if (t >= 256) {
|
||||
sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
|
||||
serial_port_out(port, SCSMR, (serial_port_in(port, SCSMR) & ~3) | 1);
|
||||
t >>= 2;
|
||||
} else
|
||||
sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
|
||||
serial_port_out(port, SCSMR, serial_port_in(port, SCSMR) & ~3);
|
||||
|
||||
sci_out(port, SCBRR, t);
|
||||
serial_port_out(port, SCBRR, t);
|
||||
udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
|
||||
}
|
||||
|
||||
|
|
@ -1845,7 +1842,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
|
||||
reg = sci_getreg(port, SCFCR);
|
||||
if (reg->size) {
|
||||
unsigned short ctrl = sci_in(port, SCFCR);
|
||||
unsigned short ctrl = serial_port_in(port, SCFCR);
|
||||
|
||||
if (s->cfg->capabilities & SCIx_HAVE_RTSCTS) {
|
||||
if (termios->c_cflag & CRTSCTS)
|
||||
|
|
@ -1861,10 +1858,10 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
*/
|
||||
ctrl &= ~(SCFCR_RFRST | SCFCR_TFRST);
|
||||
|
||||
sci_out(port, SCFCR, ctrl);
|
||||
serial_port_out(port, SCFCR, ctrl);
|
||||
}
|
||||
|
||||
sci_out(port, SCSCR, s->cfg->scscr);
|
||||
serial_port_out(port, SCSCR, s->cfg->scscr);
|
||||
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_DMA
|
||||
/*
|
||||
|
|
@ -2166,7 +2163,7 @@ static void serial_console_write(struct console *co, const char *s,
|
|||
|
||||
/* wait until fifo is empty and last bit has been transmitted */
|
||||
bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
|
||||
while ((sci_in(port, SCxSR) & bits) != bits)
|
||||
while ((serial_port_in(port, SCxSR) & bits) != bits)
|
||||
cpu_relax();
|
||||
|
||||
sci_port_disable(sci_port);
|
||||
|
|
@ -2260,12 +2257,12 @@ static int sci_runtime_suspend(struct device *dev)
|
|||
if (uart_console(port)) {
|
||||
struct plat_sci_reg *reg;
|
||||
|
||||
sci_port->saved_smr = sci_in(port, SCSMR);
|
||||
sci_port->saved_brr = sci_in(port, SCBRR);
|
||||
sci_port->saved_smr = serial_port_in(port, SCSMR);
|
||||
sci_port->saved_brr = serial_port_in(port, SCBRR);
|
||||
|
||||
reg = sci_getreg(port, SCFCR);
|
||||
if (reg->size)
|
||||
sci_port->saved_fcr = sci_in(port, SCFCR);
|
||||
sci_port->saved_fcr = serial_port_in(port, SCFCR);
|
||||
else
|
||||
sci_port->saved_fcr = 0;
|
||||
}
|
||||
|
|
@ -2279,13 +2276,13 @@ static int sci_runtime_resume(struct device *dev)
|
|||
|
||||
if (uart_console(port)) {
|
||||
sci_reset(port);
|
||||
sci_out(port, SCSMR, sci_port->saved_smr);
|
||||
sci_out(port, SCBRR, sci_port->saved_brr);
|
||||
serial_port_out(port, SCSMR, sci_port->saved_smr);
|
||||
serial_port_out(port, SCBRR, sci_port->saved_brr);
|
||||
|
||||
if (sci_port->saved_fcr)
|
||||
sci_out(port, SCFCR, sci_port->saved_fcr);
|
||||
serial_port_out(port, SCFCR, sci_port->saved_fcr);
|
||||
|
||||
sci_out(port, SCSCR, sci_port->cfg->scscr);
|
||||
serial_port_out(port, SCSCR, sci_port->cfg->scscr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,10 +20,10 @@
|
|||
defined(CONFIG_ARCH_SH7372) || \
|
||||
defined(CONFIG_ARCH_R8A7740)
|
||||
|
||||
# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
|
||||
# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
|
||||
# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
|
||||
# define SCxSR_BREAK_CLEAR(port) (sci_in(port, SCxSR) & 0xffe3)
|
||||
# define SCxSR_RDxF_CLEAR(port) (serial_port_in(port, SCxSR) & 0xfffc)
|
||||
# define SCxSR_ERROR_CLEAR(port) (serial_port_in(port, SCxSR) & 0xfd73)
|
||||
# define SCxSR_TDxE_CLEAR(port) (serial_port_in(port, SCxSR) & 0xffdf)
|
||||
# define SCxSR_BREAK_CLEAR(port) (serial_port_in(port, SCxSR) & 0xffe3)
|
||||
#else
|
||||
# define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc)
|
||||
# define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user