forked from luck/tmp_suning_uos_patched
ARM: tegra: Use WFE for power-gating on Tegra30
Turned out that WFI doesn't work reliably on Tegra30 as a trigger for the power-gating, it causes CPU hang under some circumstances like having memory controller running of PLLP. The TRM doc states that WFI should be used for the Big-Little "Cluster Switch", while WFE for the power-gating. Hence let's use the WFE for CPU0 power-gating, like it is done for the power-gating of a secondary cores. This fixes CPU hang after entering LP2 with memory running off PLLP. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -682,10 +682,12 @@ tegra30_enter_sleep:
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dsb
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ldr r0, [r6, r2] /* memory barrier */
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cmp r10, #TEGRA30
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halted:
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isb
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dsb
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wfi /* CPU should be power gated here */
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wfine /* CPU should be power gated here */
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wfeeq
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/* !!!FIXME!!! Implement halt failure handler */
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b halted
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@ -91,8 +91,23 @@ void flowctrl_cpu_suspend_enter(unsigned int cpuid)
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reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP;
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/* clear wfi bitmap */
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reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP;
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/* pwr gating on wfi */
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reg |= TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid;
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if (tegra_get_chip_id() == TEGRA30) {
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/*
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* The wfi doesn't work well on Tegra30 because
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* CPU hangs under some odd circumstances after
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* power-gating (like memory running off PLLP),
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* hence use wfe that is working perfectly fine.
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* Note that Tegra30 TRM doc clearly stands that
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* wfi should be used for the "Cluster Switching",
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* while wfe for the power-gating, just like it
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* is done on Tegra20.
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*/
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reg |= TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid;
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} else {
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/* pwr gating on wfi */
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reg |= TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid;
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}
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break;
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}
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reg |= FLOW_CTRL_CSR_INTR_FLAG; /* clear intr flag */
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