forked from luck/tmp_suning_uos_patched
asm-generic/io.h: Reconcile I/O accessor overrides
Overriding I/O accessors and helpers is currently very inconsistent. This commit introduces a homogeneous way to override functions by checking for the existence of a macro with the same of the function. Architectures can provide their own implementations and communicate this to the generic header by defining the appropriate macro. Doing this will also help prevent the implementations from being subsequently overridden. While at it, also turn a lot of macros into static inline functions for better type checking and to provide a canonical signature for overriding architectures to copy. Also reorder functions by logical groups. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
parent
4707a341b4
commit
9216efafc5
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@ -12,6 +12,7 @@
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#define __ASM_GENERIC_IO_H
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#include <asm/page.h> /* I/O is all done through memory accesses */
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#include <linux/string.h> /* for memset() and memcpy() */
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#include <linux/types.h>
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#ifdef CONFIG_GENERIC_IOMAP
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@ -24,142 +25,154 @@
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#define mmiowb() do {} while (0)
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#endif
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/*****************************************************************************/
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/*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the simple architectures, we just read/write the
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* memory location directly.
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* __raw_{read,write}{b,w,l,q}() access memory in native endianness.
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*
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* On some architectures memory mapped IO needs to be accessed differently.
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* On the simple architectures, we just read/write the memory location
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* directly.
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*/
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#ifndef __raw_readb
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#define __raw_readb __raw_readb
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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return *(const volatile u8 __force *) addr;
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return *(const volatile u8 __force *)addr;
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}
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#endif
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#ifndef __raw_readw
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#define __raw_readw __raw_readw
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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return *(const volatile u16 __force *) addr;
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return *(const volatile u16 __force *)addr;
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}
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#endif
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#ifndef __raw_readl
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#define __raw_readl __raw_readl
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static inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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return *(const volatile u32 __force *) addr;
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return *(const volatile u32 __force *)addr;
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}
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#endif
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#define readb __raw_readb
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#ifdef CONFIG_64BIT
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#ifndef __raw_readq
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#define __raw_readq __raw_readq
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static inline u64 __raw_readq(const volatile void __iomem *addr)
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{
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return *(const volatile u64 __force *)addr;
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}
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#endif
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#endif /* CONFIG_64BIT */
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#ifndef __raw_writeb
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#define __raw_writeb __raw_writeb
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static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
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{
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*(volatile u8 __force *)addr = value;
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}
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#endif
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#ifndef __raw_writew
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#define __raw_writew __raw_writew
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static inline void __raw_writew(u16 value, volatile void __iomem *addr)
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{
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*(volatile u16 __force *)addr = value;
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}
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#endif
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#ifndef __raw_writel
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#define __raw_writel __raw_writel
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static inline void __raw_writel(u32 value, volatile void __iomem *addr)
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{
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*(volatile u32 __force *)addr = value;
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}
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#endif
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#ifdef CONFIG_64BIT
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#ifndef __raw_writeq
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#define __raw_writeq __raw_writeq
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static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
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{
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*(volatile u64 __force *)addr = value;
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}
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#endif
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#endif /* CONFIG_64BIT */
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/*
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* {read,write}{b,w,l,q}() access little endian memory and return result in
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* native endianness.
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*/
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#ifndef readb
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#define readb readb
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static inline u8 readb(const volatile void __iomem *addr)
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{
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return __raw_readb(addr);
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}
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#endif
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#ifndef readw
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#define readw readw
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static inline u16 readw(const volatile void __iomem *addr)
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{
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return __le16_to_cpu(__raw_readw(addr));
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}
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#endif
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#ifndef readl
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#define readl readl
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static inline u32 readl(const volatile void __iomem *addr)
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{
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return __le32_to_cpu(__raw_readl(addr));
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}
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#ifndef __raw_writeb
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static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
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{
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*(volatile u8 __force *) addr = b;
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}
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#endif
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#ifndef __raw_writew
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static inline void __raw_writew(u16 b, volatile void __iomem *addr)
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{
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*(volatile u16 __force *) addr = b;
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}
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#endif
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#ifndef __raw_writel
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static inline void __raw_writel(u32 b, volatile void __iomem *addr)
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{
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*(volatile u32 __force *) addr = b;
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}
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#endif
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#define writeb __raw_writeb
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#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
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#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
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#ifdef CONFIG_64BIT
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#ifndef __raw_readq
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static inline u64 __raw_readq(const volatile void __iomem *addr)
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{
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return *(const volatile u64 __force *) addr;
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}
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#endif
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#ifndef readq
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#define readq readq
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static inline u64 readq(const volatile void __iomem *addr)
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{
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return __le64_to_cpu(__raw_readq(addr));
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}
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#ifndef __raw_writeq
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static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
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{
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*(volatile u64 __force *) addr = b;
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}
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#endif
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#define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
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#endif /* CONFIG_64BIT */
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#ifndef PCI_IOBASE
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#define PCI_IOBASE ((void __iomem *) 0)
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#ifndef writeb
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#define writeb writeb
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static inline void writeb(u8 value, volatile void __iomem *addr)
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{
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__raw_writeb(value, addr);
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}
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#endif
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/*****************************************************************************/
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/*
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* traditional input/output functions
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*/
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static inline u8 inb(unsigned long addr)
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#ifndef writew
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#define writew writew
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static inline void writew(u16 value, volatile void __iomem *addr)
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{
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return readb(addr + PCI_IOBASE);
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__raw_writew(cpu_to_le16(value), addr);
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}
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#endif
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static inline u16 inw(unsigned long addr)
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#ifndef writel
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#define writel writel
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static inline void writel(u32 value, volatile void __iomem *addr)
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{
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return readw(addr + PCI_IOBASE);
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__raw_writel(__cpu_to_le32(value), addr);
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}
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#endif
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static inline u32 inl(unsigned long addr)
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#ifdef CONFIG_64BIT
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#ifndef writeq
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#define writeq writeq
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static inline void writeq(u64 value, volatile void __iomem *addr)
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{
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return readl(addr + PCI_IOBASE);
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__raw_writeq(__cpu_to_le64(value), addr);
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}
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static inline void outb(u8 b, unsigned long addr)
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{
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writeb(b, addr + PCI_IOBASE);
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}
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static inline void outw(u16 b, unsigned long addr)
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{
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writew(b, addr + PCI_IOBASE);
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}
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static inline void outl(u32 b, unsigned long addr)
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{
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writel(b, addr + PCI_IOBASE);
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}
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x, addr) outb((x), (addr))
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#define outw_p(x, addr) outw((x), (addr))
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#define outl_p(x, addr) outl((x), (addr))
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#endif
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#endif /* CONFIG_64BIT */
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#ifndef insb
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static inline void insb(unsigned long addr, void *buffer, int count)
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@ -237,18 +250,6 @@ static inline void outsl(unsigned long addr, const void *buffer, int count)
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#endif
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#ifndef CONFIG_GENERIC_IOMAP
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#define ioread8(addr) readb(addr)
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#define ioread16(addr) readw(addr)
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#define ioread16be(addr) __be16_to_cpu(__raw_readw(addr))
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#define ioread32(addr) readl(addr)
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#define ioread32be(addr) __be32_to_cpu(__raw_readl(addr))
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#define iowrite8(v, addr) writeb((v), (addr))
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#define iowrite16(v, addr) writew((v), (addr))
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#define iowrite16be(v, addr) __raw_writew(__cpu_to_be16(v), addr)
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#define iowrite32(v, addr) writel((v), (addr))
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#define iowrite32be(v, addr) __raw_writel(__cpu_to_be32(v), addr)
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#define ioread8_rep(p, dst, count) \
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insb((unsigned long) (p), (dst), (count))
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#define ioread16_rep(p, dst, count) \
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@ -264,20 +265,209 @@ static inline void outsl(unsigned long addr, const void *buffer, int count)
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outsl((unsigned long) (p), (src), (count))
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#endif /* CONFIG_GENERIC_IOMAP */
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#ifndef PCI_IOBASE
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#define PCI_IOBASE ((void __iomem *)0)
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#endif
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#ifndef IO_SPACE_LIMIT
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#define IO_SPACE_LIMIT 0xffff
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#endif
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/*
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* {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
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* implemented on hardware that needs an additional delay for I/O accesses to
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* take effect.
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*/
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#ifndef inb
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#define inb inb
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static inline u8 inb(unsigned long addr)
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{
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return readb(PCI_IOBASE + addr);
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}
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#endif
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#ifndef inw
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#define inw inw
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static inline u16 inw(unsigned long addr)
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{
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return readw(PCI_IOBASE + addr);
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}
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#endif
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#ifndef inl
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#define inl inl
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static inline u32 inl(unsigned long addr)
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{
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return readl(PCI_IOBASE + addr);
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}
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#endif
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#ifndef outb
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#define outb outb
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static inline void outb(u8 value, unsigned long addr)
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{
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writeb(value, PCI_IOBASE + addr);
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}
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#endif
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#ifndef outw
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#define outw outw
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static inline void outw(u16 value, unsigned long addr)
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{
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writew(value, PCI_IOBASE + addr);
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}
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#endif
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#ifndef outl
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#define outl outl
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static inline void outl(u32 value, unsigned long addr)
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{
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writel(value, PCI_IOBASE + addr);
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}
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#endif
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#ifndef inb_p
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#define inb_p inb_p
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static inline u8 inb_p(unsigned long addr)
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{
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return inb(addr);
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}
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#endif
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#ifndef inw_p
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#define inw_p inw_p
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static inline u16 inw_p(unsigned long addr)
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{
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return inw(addr);
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}
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#endif
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#ifndef inl_p
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#define inl_p inl_p
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static inline u32 inl_p(unsigned long addr)
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{
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return inl(addr);
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}
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#endif
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#ifndef outb_p
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#define outb_p outb_p
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static inline void outb_p(u8 value, unsigned long addr)
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{
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outb(value, addr);
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}
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#endif
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#ifndef outw_p
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#define outw_p outw_p
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static inline void outw_p(u16 value, unsigned long addr)
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{
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outw(value, addr);
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}
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#endif
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#ifndef outl_p
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#define outl_p outl_p
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static inline void outl_p(u32 value, unsigned long addr)
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{
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outl(value, addr);
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}
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#endif
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#ifndef CONFIG_GENERIC_IOMAP
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#ifndef ioread8
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#define ioread8 ioread8
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static inline u8 ioread8(const volatile void __iomem *addr)
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{
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return readb(addr);
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}
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#endif
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#ifndef ioread16
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#define ioread16 ioread16
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static inline u16 ioread16(const volatile void __iomem *addr)
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{
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return readw(addr);
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}
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#endif
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#ifndef ioread32
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#define ioread32 ioread32
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static inline u32 ioread32(const volatile void __iomem *addr)
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{
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return readl(addr);
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}
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#endif
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#ifndef iowrite8
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#define iowrite8 iowrite8
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static inline void iowrite8(u8 value, volatile void __iomem *addr)
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{
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writeb(value, addr);
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}
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#endif
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#ifndef iowrite16
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#define iowrite16 iowrite16
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static inline void iowrite16(u16 value, volatile void __iomem *addr)
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{
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writew(value, addr);
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}
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#endif
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#ifndef iowrite32
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#define iowrite32 iowrite32
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static inline void iowrite32(u32 value, volatile void __iomem *addr)
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{
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writel(value, addr);
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}
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#endif
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#ifndef ioread16be
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#define ioread16be ioread16be
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static inline u16 ioread16be(const volatile void __iomem *addr)
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{
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return __be16_to_cpu(__raw_readw(addr));
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}
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#endif
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#ifndef ioread32be
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#define ioread32be ioread32be
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static inline u32 ioread32be(const volatile void __iomem *addr)
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{
|
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return __be32_to_cpu(__raw_readl(addr));
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}
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#endif
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|
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#ifndef iowrite16be
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#define iowrite16be iowrite16be
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static inline void iowrite16be(u16 value, void volatile __iomem *addr)
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{
|
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__raw_writew(__cpu_to_be16(value), addr);
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}
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#endif
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|
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#ifndef iowrite32be
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#define iowrite32be iowrite32be
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static inline void iowrite32be(u32 value, volatile void __iomem *addr)
|
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{
|
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__raw_writel(__cpu_to_be32(value), addr);
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}
|
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#endif
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#endif /* CONFIG_GENERIC_IOMAP */
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|
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#ifdef __KERNEL__
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|
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#include <linux/vmalloc.h>
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#define __io_virt(x) ((void __force *) (x))
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#define __io_virt(x) ((void __force *)(x))
|
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|
||||
#ifndef CONFIG_GENERIC_IOMAP
|
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struct pci_dev;
|
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extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
|
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|
||||
#ifndef pci_iounmap
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#define pci_iounmap pci_iounmap
|
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static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
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{
|
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}
|
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|
|
@ -289,11 +479,15 @@ static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
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* These are pretty trivial
|
||||
*/
|
||||
#ifndef virt_to_phys
|
||||
#define virt_to_phys virt_to_phys
|
||||
static inline unsigned long virt_to_phys(volatile void *address)
|
||||
{
|
||||
return __pa((unsigned long)address);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef phys_to_virt
|
||||
#define phys_to_virt phys_to_virt
|
||||
static inline void *phys_to_virt(unsigned long address)
|
||||
{
|
||||
return __va(address);
|
||||
|
|
@ -306,37 +500,65 @@ static inline void *phys_to_virt(unsigned long address)
|
|||
* This implementation is for the no-MMU case only... if you have an MMU
|
||||
* you'll need to provide your own definitions.
|
||||
*/
|
||||
#ifndef CONFIG_MMU
|
||||
static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
|
||||
{
|
||||
return (void __iomem*) (unsigned long)offset;
|
||||
}
|
||||
|
||||
#define __ioremap(offset, size, flags) ioremap(offset, size)
|
||||
#ifndef CONFIG_MMU
|
||||
#ifndef ioremap
|
||||
#define ioremap ioremap
|
||||
static inline void __iomem *ioremap(phys_addr_t offset, size_t size)
|
||||
{
|
||||
return (void __iomem *)(unsigned long)offset;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef __ioremap
|
||||
#define __ioremap __ioremap
|
||||
static inline void __iomem *__ioremap(phys_addr_t offset, size_t size,
|
||||
unsigned long flags)
|
||||
{
|
||||
return ioremap(offset, size);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef ioremap_nocache
|
||||
#define ioremap_nocache ioremap
|
||||
#define ioremap_nocache ioremap_nocache
|
||||
static inline void __iomem *ioremap_nocache(phys_addr_t offset, size_t size)
|
||||
{
|
||||
return ioremap(offset, size);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef ioremap_wc
|
||||
#define ioremap_wc ioremap_nocache
|
||||
#define ioremap_wc ioremap_wc
|
||||
static inline void __iomem *ioremap_wc(phys_addr_t offset, size_t size)
|
||||
{
|
||||
return ioremap_nocache(offset, size);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef iounmap
|
||||
#define iounmap iounmap
|
||||
static inline void iounmap(void __iomem *addr)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
#ifdef CONFIG_HAS_IOPORT_MAP
|
||||
#ifndef CONFIG_GENERIC_IOMAP
|
||||
#ifndef ioport_map
|
||||
#define ioport_map ioport_map
|
||||
static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
|
||||
{
|
||||
return PCI_IOBASE + (port & IO_SPACE_LIMIT);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef ioport_unmap
|
||||
#define ioport_unmap ioport_unmap
|
||||
static inline void ioport_unmap(void __iomem *p)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
#else /* CONFIG_GENERIC_IOMAP */
|
||||
extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
|
||||
extern void ioport_unmap(void __iomem *p);
|
||||
|
|
@ -344,35 +566,68 @@ extern void ioport_unmap(void __iomem *p);
|
|||
#endif /* CONFIG_HAS_IOPORT_MAP */
|
||||
|
||||
#ifndef xlate_dev_kmem_ptr
|
||||
#define xlate_dev_kmem_ptr(p) p
|
||||
#define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
|
||||
static inline void *xlate_dev_kmem_ptr(void *addr)
|
||||
{
|
||||
return addr;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef xlate_dev_mem_ptr
|
||||
#define xlate_dev_mem_ptr(p) __va(p)
|
||||
#define xlate_dev_mem_ptr xlate_dev_mem_ptr
|
||||
static inline void *xlate_dev_mem_ptr(phys_addr_t addr)
|
||||
{
|
||||
return __va(addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef unxlate_dev_mem_ptr
|
||||
#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
|
||||
static inline void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VIRT_TO_BUS
|
||||
#ifndef virt_to_bus
|
||||
static inline unsigned long virt_to_bus(volatile void *address)
|
||||
static inline unsigned long virt_to_bus(void *address)
|
||||
{
|
||||
return ((unsigned long) address);
|
||||
return (unsigned long)address;
|
||||
}
|
||||
|
||||
static inline void *bus_to_virt(unsigned long address)
|
||||
{
|
||||
return (void *) address;
|
||||
return (void *)address;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef memset_io
|
||||
#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
|
||||
#define memset_io memset_io
|
||||
static inline void memset_io(volatile void __iomem *addr, int value,
|
||||
size_t size)
|
||||
{
|
||||
memset(__io_virt(addr), value, size);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef memcpy_fromio
|
||||
#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
|
||||
#define memcpy_fromio memcpy_fromio
|
||||
static inline void memcpy_fromio(void *buffer,
|
||||
const volatile void __iomem *addr,
|
||||
size_t size)
|
||||
{
|
||||
memcpy(buffer, __io_virt(addr), size);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef memcpy_toio
|
||||
#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
|
||||
#define memcpy_toio memcpy_toio
|
||||
static inline void memcpy_toio(volatile void __iomem *addr, const void *buffer,
|
||||
size_t size)
|
||||
{
|
||||
memcpy(__io_virt(addr), buffer, size);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user