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[PATCH] ppc iomem annotations: ->io_base_virt

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* ->io_base_virt in struct pci_controller is iomem pointer.  Marked as such.
  Most of the places that used it are already annotated to expect iomem.
* places that did gratitious (and wrong) casts a-la
	isa_io_base = (unsigned long)ioremap(...);
	hose->io_base_virt = (void *)isa_io_base;
  turned into
	hose->io_base_virt = ioremap(...);
	isa_io_base = (unsigned long)hose->io_base_virt;
* pci_bus_io_base() annotated as returning iomem pointer.

Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Al Viro 2005-04-25 07:55:57 -07:00 committed by Linus Torvalds
parent 9090e001f2
commit 92a11f9e7c
8 changed files with 19 additions and 27 deletions
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2
arch/ppc/kernel/pci.c
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@ -1432,7 +1432,7 @@ pci_bus_to_hose(int bus)
return NULL; return NULL;
} }
void* void __iomem *
pci_bus_io_base(unsigned int bus) pci_bus_io_base(unsigned int bus)
{ {
struct pci_controller *hose; struct pci_controller *hose;

5
arch/ppc/platforms/4xx/ebony.c
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@ -210,9 +210,8 @@ ebony_setup_hose(void)
hose->io_space.end = EBONY_PCI_UPPER_IO; hose->io_space.end = EBONY_PCI_UPPER_IO;
hose->mem_space.start = EBONY_PCI_LOWER_MEM; hose->mem_space.start = EBONY_PCI_LOWER_MEM;
hose->mem_space.end = EBONY_PCI_UPPER_MEM; hose->mem_space.end = EBONY_PCI_UPPER_MEM;
isa_io_base = hose->io_base_virt = ioremap64(EBONY_PCI_IO_BASE, EBONY_PCI_IO_SIZE);
(unsigned long)ioremap64(EBONY_PCI_IO_BASE, EBONY_PCI_IO_SIZE); isa_io_base = (unsigned long)hose->io_base_virt;
hose->io_base_virt = (void *)isa_io_base;
setup_indirect_pci(hose, setup_indirect_pci(hose,
EBONY_PCI_CFGA_PLB32, EBONY_PCI_CFGA_PLB32,

5
arch/ppc/platforms/4xx/luan.c
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@ -223,9 +223,8 @@ luan_setup_hose(struct pci_controller *hose,
hose->io_space.end = LUAN_PCIX_UPPER_IO; hose->io_space.end = LUAN_PCIX_UPPER_IO;
hose->mem_space.start = lower_mem; hose->mem_space.start = lower_mem;
hose->mem_space.end = upper_mem; hose->mem_space.end = upper_mem;
isa_io_base = hose->io_base_virt = ioremap64(pcix_io_base, PCIX_IO_SIZE);
(unsigned long)ioremap64(pcix_io_base, PCIX_IO_SIZE); isa_io_base = (unsigned long) hose->io_base_virt;
hose->io_base_virt = (void *)isa_io_base;
setup_indirect_pci(hose, cfga, cfgd); setup_indirect_pci(hose, cfga, cfgd);
hose->set_cfg_type = 1; hose->set_cfg_type = 1;

5
arch/ppc/platforms/4xx/ocotea.c
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@ -227,9 +227,8 @@ ocotea_setup_hose(void)
hose->io_space.end = OCOTEA_PCI_UPPER_IO; hose->io_space.end = OCOTEA_PCI_UPPER_IO;
hose->mem_space.start = OCOTEA_PCI_LOWER_MEM; hose->mem_space.start = OCOTEA_PCI_LOWER_MEM;
hose->mem_space.end = OCOTEA_PCI_UPPER_MEM; hose->mem_space.end = OCOTEA_PCI_UPPER_MEM;
isa_io_base = hose->io_base_virt = ioremap64(OCOTEA_PCI_IO_BASE, OCOTEA_PCI_IO_SIZE);
(unsigned long)ioremap64(OCOTEA_PCI_IO_BASE, OCOTEA_PCI_IO_SIZE); isa_io_base = (unsigned long) hose->io_base_virt;
hose->io_base_virt = (void *)isa_io_base;
setup_indirect_pci(hose, setup_indirect_pci(hose,
OCOTEA_PCI_CFGA_PLB32, OCOTEA_PCI_CFGA_PLB32,

5
arch/ppc/syslib/m8260_pci.c
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@ -171,10 +171,9 @@ void __init m8260_find_bridges(void)
m8260_setup_pci(hose); m8260_setup_pci(hose);
hose->pci_mem_offset = MPC826x_PCI_MEM_OFFSET; hose->pci_mem_offset = MPC826x_PCI_MEM_OFFSET;
isa_io_base = hose->io_base_virt = ioremap(MPC826x_PCI_IO_BASE,
(unsigned long) ioremap(MPC826x_PCI_IO_BASE,
MPC826x_PCI_IO_SIZE); MPC826x_PCI_IO_SIZE);
hose->io_base_virt = (void *) isa_io_base; isa_io_base = (unsigned long) hose->io_base_virt;
/* setup resources */ /* setup resources */
pci_init_resource(&hose->mem_resources[0], pci_init_resource(&hose->mem_resources[0],

8
arch/ppc/syslib/mpc52xx_pci.c
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@ -205,13 +205,11 @@ mpc52xx_find_bridges(void)
hose->pci_mem_offset = MPC52xx_PCI_MEM_OFFSET; hose->pci_mem_offset = MPC52xx_PCI_MEM_OFFSET;
isa_io_base = hose->io_base_virt = ioremap(MPC52xx_PCI_IO_BASE, MPC52xx_PCI_IO_SIZE);
(unsigned long) ioremap(MPC52xx_PCI_IO_BASE, isa_io_base = (unsigned long) hose->io_base_virt;
MPC52xx_PCI_IO_SIZE);
hose->io_base_virt = (void *) isa_io_base;
hose->cfg_addr = &pci_regs->car; hose->cfg_addr = &pci_regs->car;
hose->cfg_data = (void __iomem *) isa_io_base; hose->cfg_data = hose->io_base_virt;
/* Setup resources */ /* Setup resources */
pci_init_resource(&hose->mem_resources[0], pci_init_resource(&hose->mem_resources[0],

12
arch/ppc/syslib/ppc85xx_setup.c
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@ -280,16 +280,14 @@ mpc85xx_setup_hose(void)
hose_a->io_space.end = MPC85XX_PCI1_UPPER_IO; hose_a->io_space.end = MPC85XX_PCI1_UPPER_IO;
hose_a->io_base_phys = MPC85XX_PCI1_IO_BASE; hose_a->io_base_phys = MPC85XX_PCI1_IO_BASE;
#ifdef CONFIG_85xx_PCI2 #ifdef CONFIG_85xx_PCI2
isa_io_base = hose_a->io_base_virt = ioremap(MPC85XX_PCI1_IO_BASE,
(unsigned long) ioremap(MPC85XX_PCI1_IO_BASE,
MPC85XX_PCI1_IO_SIZE + MPC85XX_PCI1_IO_SIZE +
MPC85XX_PCI2_IO_SIZE); MPC85XX_PCI2_IO_SIZE);
#else #else
isa_io_base = hose_a->io_base_virt = ioremap(MPC85XX_PCI1_IO_BASE,
(unsigned long) ioremap(MPC85XX_PCI1_IO_BASE,
MPC85XX_PCI1_IO_SIZE); MPC85XX_PCI1_IO_SIZE);
#endif #endif
hose_a->io_base_virt = (void *) isa_io_base; isa_io_base = (unsigned long)hose_a->io_base_virt;
/* setup resources */ /* setup resources */
pci_init_resource(&hose_a->mem_resources[0], pci_init_resource(&hose_a->mem_resources[0],
@ -329,8 +327,8 @@ mpc85xx_setup_hose(void)
hose_b->io_space.start = MPC85XX_PCI2_LOWER_IO; hose_b->io_space.start = MPC85XX_PCI2_LOWER_IO;
hose_b->io_space.end = MPC85XX_PCI2_UPPER_IO; hose_b->io_space.end = MPC85XX_PCI2_UPPER_IO;
hose_b->io_base_phys = MPC85XX_PCI2_IO_BASE; hose_b->io_base_phys = MPC85XX_PCI2_IO_BASE;
hose_b->io_base_virt = (void *) isa_io_base + MPC85XX_PCI1_IO_SIZE; hose_b->io_base_virt = hose_a->io_base_virt + MPC85XX_PCI1_IO_SIZE;
/* setup resources */ /* setup resources */
pci_init_resource(&hose_b->mem_resources[0], pci_init_resource(&hose_b->mem_resources[0],
MPC85XX_PCI2_LOWER_MEM, MPC85XX_PCI2_LOWER_MEM,

4
include/asm-ppc/pci-bridge.h
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@ -12,7 +12,7 @@ struct pci_controller;
* pci_io_base returns the memory address at which you can access * pci_io_base returns the memory address at which you can access
* the I/O space for PCI bus number `bus' (or NULL on error). * the I/O space for PCI bus number `bus' (or NULL on error).
*/ */
extern void *pci_bus_io_base(unsigned int bus); extern void __iomem *pci_bus_io_base(unsigned int bus);
extern unsigned long pci_bus_io_base_phys(unsigned int bus); extern unsigned long pci_bus_io_base_phys(unsigned int bus);
extern unsigned long pci_bus_mem_base_phys(unsigned int bus); extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
@ -48,7 +48,7 @@ struct pci_controller {
int last_busno; int last_busno;
int bus_offset; int bus_offset;
void *io_base_virt; void __iomem *io_base_virt;
unsigned long io_base_phys; unsigned long io_base_phys;
/* Some machines (PReP) have a non 1:1 mapping of /* Some machines (PReP) have a non 1:1 mapping of