forked from luck/tmp_suning_uos_patched
Merge commit 'jwb/jwb-next'
This commit is contained in:
Benjamin Herrenschmidt
commit
930074b6b9
141
Documentation/powerpc/bootwrapper.txt
Normal file
141
Documentation/powerpc/bootwrapper.txt
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|
|
@ -0,0 +1,141 @@
|
|||
The PowerPC boot wrapper
|
||||
------------------------
|
||||
Copyright (C) Secret Lab Technologies Ltd.
|
||||
|
||||
PowerPC image targets compresses and wraps the kernel image (vmlinux) with
|
||||
a boot wrapper to make it usable by the system firmware. There is no
|
||||
standard PowerPC firmware interface, so the boot wrapper is designed to
|
||||
be adaptable for each kind of image that needs to be built.
|
||||
|
||||
The boot wrapper can be found in the arch/powerpc/boot/ directory. The
|
||||
Makefile in that directory has targets for all the available image types.
|
||||
The different image types are used to support all of the various firmware
|
||||
interfaces found on PowerPC platforms. OpenFirmware is the most commonly
|
||||
used firmware type on general purpose PowerPC systems from Apple, IBM and
|
||||
others. U-Boot is typically found on embedded PowerPC hardware, but there
|
||||
are a handful of other firmware implementations which are also popular. Each
|
||||
firmware interface requires a different image format.
|
||||
|
||||
The boot wrapper is built from the makefile in arch/powerpc/boot/Makefile and
|
||||
it uses the wrapper script (arch/powerpc/boot/wrapper) to generate target
|
||||
image. The details of the build system is discussed in the next section.
|
||||
Currently, the following image format targets exist:
|
||||
|
||||
cuImage.%: Backwards compatible uImage for older version of
|
||||
U-Boot (for versions that don't understand the device
|
||||
tree). This image embeds a device tree blob inside
|
||||
the image. The boot wrapper, kernel and device tree
|
||||
are all embedded inside the U-Boot uImage file format
|
||||
with boot wrapper code that extracts data from the old
|
||||
bd_info structure and loads the data into the device
|
||||
tree before jumping into the kernel.
|
||||
Because of the series of #ifdefs found in the
|
||||
bd_info structure used in the old U-Boot interfaces,
|
||||
cuImages are platform specific. Each specific
|
||||
U-Boot platform has a different platform init file
|
||||
which populates the embedded device tree with data
|
||||
from the platform specific bd_info file. The platform
|
||||
specific cuImage platform init code can be found in
|
||||
arch/powerpc/boot/cuboot.*.c. Selection of the correct
|
||||
cuImage init code for a specific board can be found in
|
||||
the wrapper structure.
|
||||
dtbImage.%: Similar to zImage, except device tree blob is embedded
|
||||
inside the image instead of provided by firmware. The
|
||||
output image file can be either an elf file or a flat
|
||||
binary depending on the platform.
|
||||
dtbImages are used on systems which do not have an
|
||||
interface for passing a device tree directly.
|
||||
dtbImages are similar to simpleImages except that
|
||||
dtbImages have platform specific code for extracting
|
||||
data from the board firmware, but simpleImages do not
|
||||
talk to the firmware at all.
|
||||
PlayStation 3 support uses dtbImage. So do Embedded
|
||||
Planet boards using the PlanetCore firmware. Board
|
||||
specific initialization code is typically found in a
|
||||
file named arch/powerpc/boot/<platform>.c; but this
|
||||
can be overridden by the wrapper script.
|
||||
simpleImage.%: Firmware independent compressed image that does not
|
||||
depend on any particular firmware interface and embeds
|
||||
a device tree blob. This image is a flat binary that
|
||||
can be loaded to any location in RAM and jumped to.
|
||||
Firmware cannot pass any configuration data to the
|
||||
kernel with this image type and it depends entirely on
|
||||
the embedded device tree for all information.
|
||||
The simpleImage is useful for booting systems with
|
||||
an unknown firmware interface or for booting from
|
||||
a debugger when no firmware is present (such as on
|
||||
the Xilinx Virtex platform). The only assumption that
|
||||
simpleImage makes is that RAM is correctly initialized
|
||||
and that the MMU is either off or has RAM mapped to
|
||||
base address 0.
|
||||
simpleImage also supports inserting special platform
|
||||
specific initialization code to the start of the bootup
|
||||
sequence. The virtex405 platform uses this feature to
|
||||
ensure that the cache is invalidated before caching
|
||||
is enabled. Platform specific initialization code is
|
||||
added as part of the wrapper script and is keyed on
|
||||
the image target name. For example, all
|
||||
simpleImage.virtex405-* targets will add the
|
||||
virtex405-head.S initialization code (This also means
|
||||
that the dts file for virtex405 targets should be
|
||||
named (virtex405-<board>.dts). Search the wrapper
|
||||
script for 'virtex405' and see the file
|
||||
arch/powerpc/boot/virtex405-head.S for details.
|
||||
treeImage.%; Image format for used with OpenBIOS firmware found
|
||||
on some ppc4xx hardware. This image embeds a device
|
||||
tree blob inside the image.
|
||||
uImage: Native image format used by U-Boot. The uImage target
|
||||
does not add any boot code. It just wraps a compressed
|
||||
vmlinux in the uImage data structure. This image
|
||||
requires a version of U-Boot that is able to pass
|
||||
a device tree to the kernel at boot. If using an older
|
||||
version of U-Boot, then you need to use a cuImage
|
||||
instead.
|
||||
zImage.%: Image format which does not embed a device tree.
|
||||
Used by OpenFirmware and other firmware interfaces
|
||||
which are able to supply a device tree. This image
|
||||
expects firmware to provide the device tree at boot.
|
||||
Typically, if you have general purpose PowerPC
|
||||
hardware then you want this image format.
|
||||
|
||||
Image types which embed a device tree blob (simpleImage, dtbImage, treeImage,
|
||||
and cuImage) all generate the device tree blob from a file in the
|
||||
arch/powerpc/boot/dts/ directory. The Makefile selects the correct device
|
||||
tree source based on the name of the target. Therefore, if the kernel is
|
||||
built with 'make treeImage.walnut simpleImage.virtex405-ml403', then the
|
||||
build system will use arch/powerpc/boot/dts/walnut.dts to build
|
||||
treeImage.walnut and arch/powerpc/boot/dts/virtex405-ml403.dts to build
|
||||
the simpleImage.virtex405-ml403.
|
||||
|
||||
Two special targets called 'zImage' and 'zImage.initrd' also exist. These
|
||||
targets build all the default images as selected by the kernel configuration.
|
||||
Default images are selected by the boot wrapper Makefile
|
||||
(arch/powerpc/boot/Makefile) by adding targets to the $image-y variable. Look
|
||||
at the Makefile to see which default image targets are available.
|
||||
|
||||
How it is built
|
||||
---------------
|
||||
arch/powerpc is designed to support multiplatform kernels, which means
|
||||
that a single vmlinux image can be booted on many different target boards.
|
||||
It also means that the boot wrapper must be able to wrap for many kinds of
|
||||
images on a single build. The design decision was made to not use any
|
||||
conditional compilation code (#ifdef, etc) in the boot wrapper source code.
|
||||
All of the boot wrapper pieces are buildable at any time regardless of the
|
||||
kernel configuration. Building all the wrapper bits on every kernel build
|
||||
also ensures that obscure parts of the wrapper are at the very least compile
|
||||
tested in a large variety of environments.
|
||||
|
||||
The wrapper is adapted for different image types at link time by linking in
|
||||
just the wrapper bits that are appropriate for the image type. The 'wrapper
|
||||
script' (found in arch/powerpc/boot/wrapper) is called by the Makefile and
|
||||
is responsible for selecting the correct wrapper bits for the image type.
|
||||
The arguments are well documented in the script's comment block, so they
|
||||
are not repeated here. However, it is worth mentioning that the script
|
||||
uses the -p (platform) argument as the main method of deciding which wrapper
|
||||
bits to compile in. Look for the large 'case "$platform" in' block in the
|
||||
middle of the script. This is also the place where platform specific fixups
|
||||
can be selected by changing the link order.
|
||||
|
||||
In particular, care should be taken when working with cuImages. cuImage
|
||||
wrapper bits are very board specific and care should be taken to make sure
|
||||
the target you are trying to build is supported by the wrapper bits.
|
||||
|
|
@ -459,6 +459,19 @@ config CMDLINE
|
|||
some command-line options at build time by entering them here. In
|
||||
most cases you will need to specify the root device here.
|
||||
|
||||
config EXTRA_TARGETS
|
||||
string "Additional default image types"
|
||||
help
|
||||
List additional targets to be built by the bootwrapper here (separated
|
||||
by spaces). This is useful for targets that depend of device tree
|
||||
files in the .dts directory.
|
||||
|
||||
Targets in this list will be build as part of the default build
|
||||
target, or when the user does a 'make zImage' or a
|
||||
'make zImage.initrd'.
|
||||
|
||||
If unsure, leave blank
|
||||
|
||||
if !44x || BROKEN
|
||||
config ARCH_WANTS_FREEZER_CONTROL
|
||||
def_bool y
|
||||
|
|
|
|||
|
|
@ -163,12 +163,25 @@ bootwrapper_install %.dtb:
|
|||
$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
|
||||
|
||||
define archhelp
|
||||
@echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
|
||||
@echo '* zImage - Build default images selected by kernel config'
|
||||
@echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
|
||||
@echo ' uImage - U-Boot native image format'
|
||||
@echo ' cuImage.<dt> - Backwards compatible U-Boot image for older'
|
||||
@echo ' versions which do not support device trees'
|
||||
@echo ' dtbImage.<dt> - zImage with an embedded device tree blob'
|
||||
@echo ' simpleImage.<dt> - Firmware independent image.'
|
||||
@echo ' treeImage.<dt> - Support for older IBM 4xx firmware (not U-Boot)'
|
||||
@echo ' install - Install kernel using'
|
||||
@echo ' (your) ~/bin/installkernel or'
|
||||
@echo ' (distribution) /sbin/installkernel or'
|
||||
@echo ' install to $$(INSTALL_PATH) and run lilo'
|
||||
@echo ' *_defconfig - Select default config from arch/$(ARCH)/configs'
|
||||
@echo ''
|
||||
@echo ' Targets with <dt> embed a device tree blob inside the image'
|
||||
@echo ' These targets support board with firmware that does not'
|
||||
@echo ' support passing a device tree directly. Replace <dt> with the'
|
||||
@echo ' name of a dts file from the arch/$(ARCH)/boot/dts/ directory'
|
||||
@echo ' (minus the .dts extension).'
|
||||
endef
|
||||
|
||||
install:
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
|
|||
fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
|
||||
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
|
||||
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
|
||||
virtex405-head.S redboot-83xx.c cuboot-sam440ep.c
|
||||
virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c
|
||||
src-boot := $(src-wlib) $(src-plat) empty.c
|
||||
|
||||
src-boot := $(addprefix $(obj)/, $(src-boot))
|
||||
|
|
@ -276,6 +276,9 @@ ifeq ($(CONFIG_PPC32),y)
|
|||
image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot
|
||||
endif
|
||||
|
||||
# Allow extra targets to be added to the defconfig
|
||||
image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS))
|
||||
|
||||
initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-))
|
||||
initrd-y := $(patsubst zImage%, zImage.initrd%, \
|
||||
$(patsubst dtbImage%, dtbImage.initrd%, \
|
||||
|
|
|
|||
296
arch/powerpc/boot/dts/virtex440-ml507.dts
Normal file
296
arch/powerpc/boot/dts/virtex440-ml507.dts
Normal file
|
|
@ -0,0 +1,296 @@
|
|||
/*
|
||||
* This file supports the Xilinx ML507 board with the 440 processor.
|
||||
* A reference design for the FPGA is provided at http://git.xilinx.com.
|
||||
*
|
||||
* (C) Copyright 2008 Xilinx, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "xlnx,virtex440";
|
||||
dcr-parent = <&ppc440_0>;
|
||||
model = "testing";
|
||||
DDR2_SDRAM: memory@0 {
|
||||
device_type = "memory";
|
||||
reg = < 0 0x10000000 >;
|
||||
} ;
|
||||
chosen {
|
||||
bootargs = "console=ttyS0 ip=on root=/dev/ram";
|
||||
linux,stdout-path = "/plb@0/serial@83e00000";
|
||||
} ;
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#cpus = <1>;
|
||||
#size-cells = <0>;
|
||||
ppc440_0: cpu@0 {
|
||||
clock-frequency = <400000000>;
|
||||
compatible = "PowerPC,440", "ibm,ppc440";
|
||||
d-cache-line-size = <0x20>;
|
||||
d-cache-size = <0x8000>;
|
||||
dcr-access-method = "native";
|
||||
dcr-controller ;
|
||||
device_type = "cpu";
|
||||
i-cache-line-size = <0x20>;
|
||||
i-cache-size = <0x8000>;
|
||||
model = "PowerPC,440";
|
||||
reg = <0>;
|
||||
timebase-frequency = <400000000>;
|
||||
xlnx,apu-control = <1>;
|
||||
xlnx,apu-udi-0 = <0>;
|
||||
xlnx,apu-udi-1 = <0>;
|
||||
xlnx,apu-udi-10 = <0>;
|
||||
xlnx,apu-udi-11 = <0>;
|
||||
xlnx,apu-udi-12 = <0>;
|
||||
xlnx,apu-udi-13 = <0>;
|
||||
xlnx,apu-udi-14 = <0>;
|
||||
xlnx,apu-udi-15 = <0>;
|
||||
xlnx,apu-udi-2 = <0>;
|
||||
xlnx,apu-udi-3 = <0>;
|
||||
xlnx,apu-udi-4 = <0>;
|
||||
xlnx,apu-udi-5 = <0>;
|
||||
xlnx,apu-udi-6 = <0>;
|
||||
xlnx,apu-udi-7 = <0>;
|
||||
xlnx,apu-udi-8 = <0>;
|
||||
xlnx,apu-udi-9 = <0>;
|
||||
xlnx,dcr-autolock-enable = <1>;
|
||||
xlnx,dcu-rd-ld-cache-plb-prio = <0>;
|
||||
xlnx,dcu-rd-noncache-plb-prio = <0>;
|
||||
xlnx,dcu-rd-touch-plb-prio = <0>;
|
||||
xlnx,dcu-rd-urgent-plb-prio = <0>;
|
||||
xlnx,dcu-wr-flush-plb-prio = <0>;
|
||||
xlnx,dcu-wr-store-plb-prio = <0>;
|
||||
xlnx,dcu-wr-urgent-plb-prio = <0>;
|
||||
xlnx,dma0-control = <0>;
|
||||
xlnx,dma0-plb-prio = <0>;
|
||||
xlnx,dma0-rxchannelctrl = <0x1010000>;
|
||||
xlnx,dma0-rxirqtimer = <0x3ff>;
|
||||
xlnx,dma0-txchannelctrl = <0x1010000>;
|
||||
xlnx,dma0-txirqtimer = <0x3ff>;
|
||||
xlnx,dma1-control = <0>;
|
||||
xlnx,dma1-plb-prio = <0>;
|
||||
xlnx,dma1-rxchannelctrl = <0x1010000>;
|
||||
xlnx,dma1-rxirqtimer = <0x3ff>;
|
||||
xlnx,dma1-txchannelctrl = <0x1010000>;
|
||||
xlnx,dma1-txirqtimer = <0x3ff>;
|
||||
xlnx,dma2-control = <0>;
|
||||
xlnx,dma2-plb-prio = <0>;
|
||||
xlnx,dma2-rxchannelctrl = <0x1010000>;
|
||||
xlnx,dma2-rxirqtimer = <0x3ff>;
|
||||
xlnx,dma2-txchannelctrl = <0x1010000>;
|
||||
xlnx,dma2-txirqtimer = <0x3ff>;
|
||||
xlnx,dma3-control = <0>;
|
||||
xlnx,dma3-plb-prio = <0>;
|
||||
xlnx,dma3-rxchannelctrl = <0x1010000>;
|
||||
xlnx,dma3-rxirqtimer = <0x3ff>;
|
||||
xlnx,dma3-txchannelctrl = <0x1010000>;
|
||||
xlnx,dma3-txirqtimer = <0x3ff>;
|
||||
xlnx,endian-reset = <0>;
|
||||
xlnx,generate-plb-timespecs = <1>;
|
||||
xlnx,icu-rd-fetch-plb-prio = <0>;
|
||||
xlnx,icu-rd-spec-plb-prio = <0>;
|
||||
xlnx,icu-rd-touch-plb-prio = <0>;
|
||||
xlnx,interconnect-imask = <0xffffffff>;
|
||||
xlnx,mplb-allow-lock-xfer = <1>;
|
||||
xlnx,mplb-arb-mode = <0>;
|
||||
xlnx,mplb-awidth = <0x20>;
|
||||
xlnx,mplb-counter = <0x500>;
|
||||
xlnx,mplb-dwidth = <0x80>;
|
||||
xlnx,mplb-max-burst = <8>;
|
||||
xlnx,mplb-native-dwidth = <0x80>;
|
||||
xlnx,mplb-p2p = <0>;
|
||||
xlnx,mplb-prio-dcur = <2>;
|
||||
xlnx,mplb-prio-dcuw = <3>;
|
||||
xlnx,mplb-prio-icu = <4>;
|
||||
xlnx,mplb-prio-splb0 = <1>;
|
||||
xlnx,mplb-prio-splb1 = <0>;
|
||||
xlnx,mplb-read-pipe-enable = <1>;
|
||||
xlnx,mplb-sync-tattribute = <0>;
|
||||
xlnx,mplb-wdog-enable = <1>;
|
||||
xlnx,mplb-write-pipe-enable = <1>;
|
||||
xlnx,mplb-write-post-enable = <1>;
|
||||
xlnx,num-dma = <1>;
|
||||
xlnx,pir = <0xf>;
|
||||
xlnx,ppc440mc-addr-base = <0>;
|
||||
xlnx,ppc440mc-addr-high = <0xfffffff>;
|
||||
xlnx,ppc440mc-arb-mode = <0>;
|
||||
xlnx,ppc440mc-bank-conflict-mask = <0xc00000>;
|
||||
xlnx,ppc440mc-control = <0xf810008f>;
|
||||
xlnx,ppc440mc-max-burst = <8>;
|
||||
xlnx,ppc440mc-prio-dcur = <2>;
|
||||
xlnx,ppc440mc-prio-dcuw = <3>;
|
||||
xlnx,ppc440mc-prio-icu = <4>;
|
||||
xlnx,ppc440mc-prio-splb0 = <1>;
|
||||
xlnx,ppc440mc-prio-splb1 = <0>;
|
||||
xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>;
|
||||
xlnx,ppcdm-asyncmode = <0>;
|
||||
xlnx,ppcds-asyncmode = <0>;
|
||||
xlnx,user-reset = <0>;
|
||||
DMA0: sdma@80 {
|
||||
compatible = "xlnx,ll-dma-1.00.a";
|
||||
dcr-reg = < 0x80 0x11 >;
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 9 2 0xa 2 >;
|
||||
} ;
|
||||
} ;
|
||||
} ;
|
||||
plb_v46_0: plb@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "xlnx,plb-v46-1.02.a", "simple-bus";
|
||||
ranges ;
|
||||
DIP_Switches_8Bit: gpio@81460000 {
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 6 2 >;
|
||||
reg = < 0x81460000 0x10000 >;
|
||||
xlnx,all-inputs = <1>;
|
||||
xlnx,all-inputs-2 = <0>;
|
||||
xlnx,dout-default = <0>;
|
||||
xlnx,dout-default-2 = <0>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gpio-width = <8>;
|
||||
xlnx,interrupt-present = <1>;
|
||||
xlnx,is-bidir = <1>;
|
||||
xlnx,is-bidir-2 = <1>;
|
||||
xlnx,is-dual = <0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
xlnx,tri-default-2 = <0xffffffff>;
|
||||
} ;
|
||||
Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "xlnx,compound";
|
||||
ethernet@81c00000 {
|
||||
compatible = "xlnx,xps-ll-temac-1.01.b";
|
||||
device_type = "network";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 5 2 >;
|
||||
llink-connected = <&DMA0>;
|
||||
local-mac-address = [ 02 00 00 00 00 00 ];
|
||||
reg = < 0x81c00000 0x40 >;
|
||||
xlnx,bus2core-clk-ratio = <1>;
|
||||
xlnx,phy-type = <1>;
|
||||
xlnx,phyaddr = <1>;
|
||||
xlnx,rxcsum = <1>;
|
||||
xlnx,rxfifo = <0x1000>;
|
||||
xlnx,temac-type = <0>;
|
||||
xlnx,txcsum = <1>;
|
||||
xlnx,txfifo = <0x1000>;
|
||||
} ;
|
||||
} ;
|
||||
LEDs_8Bit: gpio@81400000 {
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
reg = < 0x81400000 0x10000 >;
|
||||
xlnx,all-inputs = <0>;
|
||||
xlnx,all-inputs-2 = <0>;
|
||||
xlnx,dout-default = <0>;
|
||||
xlnx,dout-default-2 = <0>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gpio-width = <8>;
|
||||
xlnx,interrupt-present = <0>;
|
||||
xlnx,is-bidir = <1>;
|
||||
xlnx,is-bidir-2 = <1>;
|
||||
xlnx,is-dual = <0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
xlnx,tri-default-2 = <0xffffffff>;
|
||||
} ;
|
||||
LEDs_Positions: gpio@81420000 {
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
reg = < 0x81420000 0x10000 >;
|
||||
xlnx,all-inputs = <0>;
|
||||
xlnx,all-inputs-2 = <0>;
|
||||
xlnx,dout-default = <0>;
|
||||
xlnx,dout-default-2 = <0>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gpio-width = <5>;
|
||||
xlnx,interrupt-present = <0>;
|
||||
xlnx,is-bidir = <1>;
|
||||
xlnx,is-bidir-2 = <1>;
|
||||
xlnx,is-dual = <0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
xlnx,tri-default-2 = <0xffffffff>;
|
||||
} ;
|
||||
Push_Buttons_5Bit: gpio@81440000 {
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 7 2 >;
|
||||
reg = < 0x81440000 0x10000 >;
|
||||
xlnx,all-inputs = <1>;
|
||||
xlnx,all-inputs-2 = <0>;
|
||||
xlnx,dout-default = <0>;
|
||||
xlnx,dout-default-2 = <0>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gpio-width = <5>;
|
||||
xlnx,interrupt-present = <1>;
|
||||
xlnx,is-bidir = <1>;
|
||||
xlnx,is-bidir-2 = <1>;
|
||||
xlnx,is-dual = <0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
xlnx,tri-default-2 = <0xffffffff>;
|
||||
} ;
|
||||
RS232_Uart_1: serial@83e00000 {
|
||||
clock-frequency = <100000000>;
|
||||
compatible = "xlnx,xps-uart16550-2.00.a", "ns16550";
|
||||
current-speed = <0x2580>;
|
||||
device_type = "serial";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 8 2 >;
|
||||
reg = < 0x83e00000 0x10000 >;
|
||||
reg-offset = <3>;
|
||||
reg-shift = <2>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,has-external-rclk = <0>;
|
||||
xlnx,has-external-xin = <0>;
|
||||
xlnx,is-a-16550 = <1>;
|
||||
} ;
|
||||
SysACE_CompactFlash: sysace@83600000 {
|
||||
compatible = "xlnx,xps-sysace-1.00.a";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 4 2 >;
|
||||
reg = < 0x83600000 0x10000 >;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,mem-width = <0x10>;
|
||||
} ;
|
||||
xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 {
|
||||
compatible = "xlnx,xps-bram-if-cntlr-1.00.a";
|
||||
reg = < 0xffff0000 0x10000 >;
|
||||
xlnx,family = "virtex5";
|
||||
} ;
|
||||
xps_intc_0: interrupt-controller@81800000 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "xlnx,xps-intc-1.00.a";
|
||||
interrupt-controller ;
|
||||
reg = < 0x81800000 0x10000 >;
|
||||
xlnx,num-intr-inputs = <0xb>;
|
||||
} ;
|
||||
xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
|
||||
compatible = "xlnx,xps-timebase-wdt-1.00.b";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 2 0 1 2 >;
|
||||
reg = < 0x83a00000 0x10000 >;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,wdt-enable-once = <0>;
|
||||
xlnx,wdt-interval = <0x1e>;
|
||||
} ;
|
||||
xps_timer_1: timer@83c00000 {
|
||||
compatible = "xlnx,xps-timer-1.00.a";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 3 2 >;
|
||||
reg = < 0x83c00000 0x10000 >;
|
||||
xlnx,count-width = <0x20>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gen0-assert = <1>;
|
||||
xlnx,gen1-assert = <1>;
|
||||
xlnx,one-timer-only = <1>;
|
||||
xlnx,trig0-assert = <1>;
|
||||
xlnx,trig1-assert = <1>;
|
||||
} ;
|
||||
} ;
|
||||
} ;
|
||||
|
|
@ -23,6 +23,8 @@
|
|||
|
||||
BSS_STACK(4*1024);
|
||||
|
||||
extern int platform_specific_init(void) __attribute__((weak));
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7)
|
||||
{
|
||||
|
|
@ -80,5 +82,9 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|||
|
||||
/* prepare the device tree and find the console */
|
||||
fdt_init(_dtb_start);
|
||||
|
||||
if (platform_specific_init)
|
||||
platform_specific_init();
|
||||
|
||||
serial_console_init();
|
||||
}
|
||||
|
|
|
|||
100
arch/powerpc/boot/virtex.c
Normal file
100
arch/powerpc/boot/virtex.c
Normal file
|
|
@ -0,0 +1,100 @@
|
|||
/*
|
||||
* The platform specific code for virtex devices since a boot loader is not
|
||||
* always used.
|
||||
*
|
||||
* (C) Copyright 2008 Xilinx, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "ops.h"
|
||||
#include "io.h"
|
||||
#include "stdio.h"
|
||||
|
||||
#define UART_DLL 0 /* Out: Divisor Latch Low */
|
||||
#define UART_DLM 1 /* Out: Divisor Latch High */
|
||||
#define UART_FCR 2 /* Out: FIFO Control Register */
|
||||
#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
|
||||
#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
|
||||
#define UART_LCR 3 /* Out: Line Control Register */
|
||||
#define UART_MCR 4 /* Out: Modem Control Register */
|
||||
#define UART_MCR_RTS 0x02 /* RTS complement */
|
||||
#define UART_MCR_DTR 0x01 /* DTR complement */
|
||||
#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
|
||||
#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
|
||||
|
||||
static int virtex_ns16550_console_init(void *devp)
|
||||
{
|
||||
unsigned char *reg_base;
|
||||
u32 reg_shift, reg_offset, clk, spd;
|
||||
u16 divisor;
|
||||
int n;
|
||||
|
||||
if (dt_get_virtual_reg(devp, (void **)®_base, 1) < 1)
|
||||
return -1;
|
||||
|
||||
n = getprop(devp, "reg-offset", ®_offset, sizeof(reg_offset));
|
||||
if (n == sizeof(reg_offset))
|
||||
reg_base += reg_offset;
|
||||
|
||||
n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift));
|
||||
if (n != sizeof(reg_shift))
|
||||
reg_shift = 0;
|
||||
|
||||
n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd));
|
||||
if (n != sizeof(spd))
|
||||
spd = 9600;
|
||||
|
||||
/* should there be a default clock rate?*/
|
||||
n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk));
|
||||
if (n != sizeof(clk))
|
||||
return -1;
|
||||
|
||||
divisor = clk / (16 * spd);
|
||||
|
||||
/* Access baud rate */
|
||||
out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB);
|
||||
|
||||
/* Baud rate based on input clock */
|
||||
out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF);
|
||||
out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8);
|
||||
|
||||
/* 8 data, 1 stop, no parity */
|
||||
out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8);
|
||||
|
||||
/* RTS/DTR */
|
||||
out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR);
|
||||
|
||||
/* Clear transmitter and receiver */
|
||||
out_8(reg_base + (UART_FCR << reg_shift),
|
||||
UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* For virtex, the kernel may be loaded without using a bootloader and if so
|
||||
some UARTs need more setup than is provided in the normal console init
|
||||
*/
|
||||
int platform_specific_init(void)
|
||||
{
|
||||
void *devp;
|
||||
char devtype[MAX_PROP_LEN];
|
||||
char path[MAX_PATH_LEN];
|
||||
|
||||
devp = finddevice("/chosen");
|
||||
if (devp == NULL)
|
||||
return -1;
|
||||
|
||||
if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) {
|
||||
devp = finddevice(path);
|
||||
if (devp == NULL)
|
||||
return -1;
|
||||
|
||||
if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0)
|
||||
&& !strcmp(devtype, "serial")
|
||||
&& (dt_is_compatible(devp, "ns16550")))
|
||||
virtex_ns16550_console_init(devp);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -207,7 +207,15 @@ adder875-redboot)
|
|||
binary=y
|
||||
;;
|
||||
simpleboot-virtex405-*)
|
||||
platformo="$object/virtex405-head.o $object/simpleboot.o"
|
||||
platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o"
|
||||
binary=y
|
||||
;;
|
||||
simpleboot-virtex440-*)
|
||||
platformo="$object/simpleboot.o $object/virtex.o"
|
||||
binary=y
|
||||
;;
|
||||
simpleboot-*)
|
||||
platformo="$object/simpleboot.o"
|
||||
binary=y
|
||||
;;
|
||||
asp834x-redboot)
|
||||
|
|
|
|||
1107
arch/powerpc/configs/44x/virtex5_defconfig
Normal file
1107
arch/powerpc/configs/44x/virtex5_defconfig
Normal file
File diff suppressed because it is too large
Load Diff
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.25-rc6
|
||||
# Sat Apr 5 09:35:48 2008
|
||||
# Linux kernel version: 2.6.26-rc8
|
||||
# Wed Jul 9 13:50:48 2008
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
|
|
@ -32,6 +32,8 @@ CONFIG_GENERIC_CLOCKEVENTS=y
|
|||
CONFIG_GENERIC_HARDIRQS=y
|
||||
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
|
||||
CONFIG_IRQ_PER_CPU=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_ARCH_HAS_ILOG2_U32=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
|
|
@ -88,6 +90,7 @@ CONFIG_INITRAMFS_SOURCE=""
|
|||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_KALLSYMS_EXTRA_PASS=y
|
||||
|
|
@ -115,12 +118,14 @@ CONFIG_HAVE_OPROFILE=y
|
|||
# CONFIG_KPROBES is not set
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
# CONFIG_HAVE_DMA_ATTRS is not set
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_MODULE_FORCE_LOAD is not set
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
|
|
@ -157,6 +162,7 @@ CONFIG_PPC4xx_PCI_EXPRESS=y
|
|||
# CONFIG_PQ2ADS is not set
|
||||
CONFIG_BAMBOO=y
|
||||
CONFIG_EBONY=y
|
||||
CONFIG_SAM440EP=y
|
||||
CONFIG_SEQUOIA=y
|
||||
CONFIG_TAISHAN=y
|
||||
CONFIG_KATMAI=y
|
||||
|
|
@ -164,6 +170,7 @@ CONFIG_RAINIER=y
|
|||
CONFIG_WARP=y
|
||||
CONFIG_CANYONLANDS=y
|
||||
CONFIG_YOSEMITE=y
|
||||
CONFIG_XILINX_VIRTEX440_GENERIC_BOARD=y
|
||||
CONFIG_440EP=y
|
||||
CONFIG_440EPX=y
|
||||
CONFIG_440GRX=y
|
||||
|
|
@ -172,6 +179,8 @@ CONFIG_440GX=y
|
|||
CONFIG_440SPe=y
|
||||
CONFIG_460EX=y
|
||||
CONFIG_IBM440EP_ERR42=y
|
||||
CONFIG_XILINX_VIRTEX=y
|
||||
CONFIG_XILINX_VIRTEX_5_FXT=y
|
||||
# CONFIG_IPIC is not set
|
||||
# CONFIG_MPIC is not set
|
||||
# CONFIG_MPIC_WEIRD is not set
|
||||
|
|
@ -220,13 +229,16 @@ CONFIG_FLATMEM=y
|
|||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
CONFIG_RESOURCES_64BIT=y
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=11
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
CONFIG_EXTRA_TARGETS=""
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_ISA_DMA_API=y
|
||||
|
||||
|
|
@ -246,6 +258,7 @@ CONFIG_PCI_LEGACY=y
|
|||
# CONFIG_PCI_DEBUG is not set
|
||||
# CONFIG_PCCARD is not set
|
||||
# CONFIG_HOTPLUG_PCI is not set
|
||||
# CONFIG_HAS_RAPIDIO is not set
|
||||
|
||||
#
|
||||
# Advanced setup
|
||||
|
|
@ -255,13 +268,13 @@ CONFIG_PCI_LEGACY=y
|
|||
#
|
||||
# Default settings for advanced configuration options are used
|
||||
#
|
||||
CONFIG_HIGHMEM_START=0xfe000000
|
||||
CONFIG_LOWMEM_SIZE=0x30000000
|
||||
CONFIG_PAGE_OFFSET=0xc0000000
|
||||
CONFIG_KERNEL_START=0xc0000000
|
||||
CONFIG_PHYSICAL_START=0x00000000
|
||||
CONFIG_TASK_SIZE=0xc0000000
|
||||
CONFIG_CONSISTENT_START=0xff100000
|
||||
CONFIG_CONSISTENT_SIZE=0x00200000
|
||||
CONFIG_BOOT_LOAD=0x01000000
|
||||
|
||||
#
|
||||
# Networking
|
||||
|
|
@ -303,8 +316,6 @@ CONFIG_TCP_CONG_CUBIC=y
|
|||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
|
|
@ -366,6 +377,7 @@ CONFIG_MTD_PARTITIONS=y
|
|||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
|
|
@ -478,6 +490,10 @@ CONFIG_HAVE_IDE=y
|
|||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
|
||||
#
|
||||
# Enable only one of the two stacks, unless you know what you are doing
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
# CONFIG_I2O is not set
|
||||
|
|
@ -528,7 +544,6 @@ CONFIG_NETDEV_1000=y
|
|||
# CONFIG_SIS190 is not set
|
||||
# CONFIG_SKGE is not set
|
||||
# CONFIG_SKY2 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_VIA_VELOCITY is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
# CONFIG_BNX2 is not set
|
||||
|
|
@ -546,6 +561,7 @@ CONFIG_NETDEV_10000=y
|
|||
# CONFIG_MLX4_CORE is not set
|
||||
# CONFIG_TEHUTI is not set
|
||||
# CONFIG_BNX2X is not set
|
||||
# CONFIG_SFC is not set
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
|
|
@ -553,6 +569,7 @@ CONFIG_NETDEV_10000=y
|
|||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
|
|
@ -579,6 +596,7 @@ CONFIG_NETDEV_10000=y
|
|||
# Character devices
|
||||
#
|
||||
# CONFIG_VT is not set
|
||||
CONFIG_DEVKMEM=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
# CONFIG_NOZOMI is not set
|
||||
|
||||
|
|
@ -611,22 +629,19 @@ CONFIG_LEGACY_PTY_COUNT=256
|
|||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
CONFIG_XILINX_HWICAP=m
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
# CONFIG_TCG_TPM is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
|
||||
#
|
||||
|
|
@ -639,12 +654,22 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_VIDEO_MEDIA is not set
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
# CONFIG_DAB is not set
|
||||
|
||||
#
|
||||
|
|
@ -671,6 +696,8 @@ CONFIG_USB_ARCH_HAS_HCD=y
|
|||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
# CONFIG_USB is not set
|
||||
# CONFIG_USB_OTG_WHITELIST is not set
|
||||
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
|
|
@ -679,14 +706,11 @@ CONFIG_USB_ARCH_HAS_EHCI=y
|
|||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
# CONFIG_ACCESSIBILITY is not set
|
||||
# CONFIG_INFINIBAND is not set
|
||||
# CONFIG_EDAC is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
|
||||
#
|
||||
# Userspace I/O
|
||||
#
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
|
|
@ -701,7 +725,6 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
|
|
@ -770,7 +793,6 @@ CONFIG_NFS_FS=y
|
|||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
# CONFIG_NFS_V4 is not set
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
# CONFIG_NFSD is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
|
|
@ -798,6 +820,7 @@ CONFIG_MSDOS_PARTITION=y
|
|||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
|
|
@ -818,6 +841,7 @@ CONFIG_HAVE_LMB=y
|
|||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
|
|
@ -828,6 +852,7 @@ CONFIG_DETECT_SOFTLOCKUP=y
|
|||
CONFIG_SCHED_DEBUG=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
# CONFIG_DEBUG_OBJECTS is not set
|
||||
# CONFIG_SLUB_DEBUG_ON is not set
|
||||
# CONFIG_SLUB_STATS is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
|
|
@ -840,6 +865,7 @@ CONFIG_SCHED_DEBUG=y
|
|||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
# CONFIG_DEBUG_INFO is not set
|
||||
# CONFIG_DEBUG_VM is not set
|
||||
# CONFIG_DEBUG_WRITECOUNT is not set
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
|
|
@ -851,6 +877,9 @@ CONFIG_DEBUG_BUGVERBOSE=y
|
|||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
# CONFIG_DEBUG_PAGEALLOC is not set
|
||||
# CONFIG_DEBUGGER is not set
|
||||
# CONFIG_CODE_PATCHING_SELFTEST is not set
|
||||
# CONFIG_FTR_FIXUP_SELFTEST is not set
|
||||
# CONFIG_IRQSTACKS is not set
|
||||
# CONFIG_BDI_SWITCH is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG is not set
|
||||
|
||||
|
|
@ -861,50 +890,80 @@ CONFIG_DEBUG_BUGVERBOSE=y
|
|||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
# Crypto core or helper
|
||||
#
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=y
|
||||
# CONFIG_CRYPTO_SEQIV is not set
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
||||
#
|
||||
# Authenticated Encryption with Associated Data
|
||||
#
|
||||
# CONFIG_CRYPTO_CCM is not set
|
||||
# CONFIG_CRYPTO_GCM is not set
|
||||
# CONFIG_CRYPTO_SEQIV is not set
|
||||
|
||||
#
|
||||
# Block modes
|
||||
#
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
# CONFIG_CRYPTO_CTR is not set
|
||||
# CONFIG_CRYPTO_CTS is not set
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
CONFIG_CRYPTO_PCBC=y
|
||||
# CONFIG_CRYPTO_XTS is not set
|
||||
|
||||
#
|
||||
# Hash modes
|
||||
#
|
||||
# CONFIG_CRYPTO_HMAC is not set
|
||||
# CONFIG_CRYPTO_XCBC is not set
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
|
||||
#
|
||||
# Digest
|
||||
#
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
# CONFIG_CRYPTO_MD4 is not set
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_SHA1 is not set
|
||||
# CONFIG_CRYPTO_SHA256 is not set
|
||||
# CONFIG_CRYPTO_SHA512 is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
# CONFIG_CRYPTO_TGR192 is not set
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
CONFIG_CRYPTO_PCBC=y
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
# CONFIG_CRYPTO_XTS is not set
|
||||
# CONFIG_CRYPTO_CTR is not set
|
||||
# CONFIG_CRYPTO_GCM is not set
|
||||
# CONFIG_CRYPTO_CCM is not set
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
CONFIG_CRYPTO_DES=y
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
|
||||
#
|
||||
# Ciphers
|
||||
#
|
||||
# CONFIG_CRYPTO_AES is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
# CONFIG_CRYPTO_CAST5 is not set
|
||||
# CONFIG_CRYPTO_CAST6 is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
CONFIG_CRYPTO_DES=y
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
# CONFIG_CRYPTO_KHAZAD is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_SEED is not set
|
||||
# CONFIG_CRYPTO_SALSA20 is not set
|
||||
# CONFIG_CRYPTO_SEED is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
|
||||
#
|
||||
# Compression
|
||||
#
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_LZO is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
# CONFIG_PPC_CLOCK is not set
|
||||
# CONFIG_VIRTUALIZATION is not set
|
||||
|
|
|
|||
|
|
@ -1447,6 +1447,16 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
.machine_check = machine_check_440A,
|
||||
.platform = "ppc440",
|
||||
},
|
||||
{ /* 440 in Xilinx Virtex-5 FXT */
|
||||
.pvr_mask = 0xfffffff0,
|
||||
.pvr_value = 0x7ff21910,
|
||||
.cpu_name = "440 in Virtex-5 FXT",
|
||||
.cpu_features = CPU_FTRS_44X,
|
||||
.cpu_user_features = COMMON_USER_BOOKE,
|
||||
.icache_bsize = 32,
|
||||
.dcache_bsize = 32,
|
||||
.platform = "ppc440",
|
||||
},
|
||||
{ /* 460EX */
|
||||
.pvr_mask = 0xffff0002,
|
||||
.pvr_value = 0x13020002,
|
||||
|
|
|
|||
|
|
@ -293,119 +293,9 @@ interrupt_base:
|
|||
MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception)
|
||||
|
||||
/* Data Storage Interrupt */
|
||||
START_EXCEPTION(DataStorage)
|
||||
mtspr SPRN_SPRG0, r10 /* Save some working registers */
|
||||
mtspr SPRN_SPRG1, r11
|
||||
mtspr SPRN_SPRG4W, r12
|
||||
mtspr SPRN_SPRG5W, r13
|
||||
mfcr r11
|
||||
mtspr SPRN_SPRG7W, r11
|
||||
DATA_STORAGE_EXCEPTION
|
||||
|
||||
/*
|
||||
* Check if it was a store fault, if not then bail
|
||||
* because a user tried to access a kernel or
|
||||
* read-protected page. Otherwise, get the
|
||||
* offending address and handle it.
|
||||
*/
|
||||
mfspr r10, SPRN_ESR
|
||||
andis. r10, r10, ESR_ST@h
|
||||
beq 2f
|
||||
|
||||
mfspr r10, SPRN_DEAR /* Get faulting address */
|
||||
|
||||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw r10, r11
|
||||
blt+ 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
ori r11, r11, swapper_pg_dir@l
|
||||
|
||||
mfspr r12,SPRN_MMUCR
|
||||
rlwinm r12,r12,0,0,23 /* Clear TID */
|
||||
|
||||
b 4f
|
||||
|
||||
/* Get the PGD for the current thread */
|
||||
3:
|
||||
mfspr r11,SPRN_SPRG3
|
||||
lwz r11,PGDIR(r11)
|
||||
|
||||
/* Load PID into MMUCR TID */
|
||||
mfspr r12,SPRN_MMUCR /* Get MMUCR */
|
||||
mfspr r13,SPRN_PID /* Get PID */
|
||||
rlwimi r12,r13,0,24,31 /* Set TID */
|
||||
|
||||
4:
|
||||
mtspr SPRN_MMUCR,r12
|
||||
|
||||
rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
|
||||
lwzx r11, r12, r11 /* Get pgd/pmd entry */
|
||||
rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
|
||||
beq 2f /* Bail if no table */
|
||||
|
||||
rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
|
||||
lwz r11, 4(r12) /* Get pte entry */
|
||||
|
||||
andi. r13, r11, _PAGE_RW /* Is it writeable? */
|
||||
beq 2f /* Bail if not */
|
||||
|
||||
/* Update 'changed'.
|
||||
*/
|
||||
ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
|
||||
stw r11, 4(r12) /* Update Linux page table */
|
||||
|
||||
li r13, PPC44x_TLB_SR@l /* Set SR */
|
||||
rlwimi r13, r11, 29, 29, 29 /* SX = _PAGE_HWEXEC */
|
||||
rlwimi r13, r11, 0, 30, 30 /* SW = _PAGE_RW */
|
||||
rlwimi r13, r11, 29, 28, 28 /* UR = _PAGE_USER */
|
||||
rlwimi r12, r11, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */
|
||||
rlwimi r12, r11, 29, 30, 30 /* (_PAGE_USER>>3)->r12 */
|
||||
and r12, r12, r11 /* HWEXEC/RW & USER */
|
||||
rlwimi r13, r12, 0, 26, 26 /* UX = HWEXEC & USER */
|
||||
rlwimi r13, r12, 3, 27, 27 /* UW = RW & USER */
|
||||
|
||||
rlwimi r11,r13,0,26,31 /* Insert static perms */
|
||||
|
||||
/*
|
||||
* Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
|
||||
* on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
|
||||
* include/asm-powerpc/pgtable-ppc32.h for details).
|
||||
*/
|
||||
rlwinm r11,r11,0,20,10
|
||||
|
||||
/* find the TLB index that caused the fault. It has to be here. */
|
||||
tlbsx r10, 0, r10
|
||||
|
||||
tlbwe r11, r10, PPC44x_TLB_ATTRIB /* Write ATTRIB */
|
||||
|
||||
/* Done...restore registers and get out of here.
|
||||
*/
|
||||
mfspr r11, SPRN_SPRG7R
|
||||
mtcr r11
|
||||
mfspr r13, SPRN_SPRG5R
|
||||
mfspr r12, SPRN_SPRG4R
|
||||
|
||||
mfspr r11, SPRN_SPRG1
|
||||
mfspr r10, SPRN_SPRG0
|
||||
rfi /* Force context change */
|
||||
|
||||
2:
|
||||
/*
|
||||
* The bailout. Restore registers to pre-exception conditions
|
||||
* and call the heavyweights to help us out.
|
||||
*/
|
||||
mfspr r11, SPRN_SPRG7R
|
||||
mtcr r11
|
||||
mfspr r13, SPRN_SPRG5R
|
||||
mfspr r12, SPRN_SPRG4R
|
||||
|
||||
mfspr r11, SPRN_SPRG1
|
||||
mfspr r10, SPRN_SPRG0
|
||||
b data_access
|
||||
|
||||
/* Instruction Storage Interrupt */
|
||||
/* Instruction Storage Interrupt */
|
||||
INSTRUCTION_STORAGE_EXCEPTION
|
||||
|
||||
/* External Input Interrupt */
|
||||
|
|
@ -423,7 +313,6 @@ interrupt_base:
|
|||
#else
|
||||
EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
#endif
|
||||
|
||||
/* System Call Interrupt */
|
||||
START_EXCEPTION(SystemCall)
|
||||
NORMAL_EXCEPTION_PROLOG
|
||||
|
|
@ -484,18 +373,57 @@ interrupt_base:
|
|||
4:
|
||||
mtspr SPRN_MMUCR,r12
|
||||
|
||||
/* Mask of required permission bits. Note that while we
|
||||
* do copy ESR:ST to _PAGE_RW position as trying to write
|
||||
* to an RO page is pretty common, we don't do it with
|
||||
* _PAGE_DIRTY. We could do it, but it's a fairly rare
|
||||
* event so I'd rather take the overhead when it happens
|
||||
* rather than adding an instruction here. We should measure
|
||||
* whether the whole thing is worth it in the first place
|
||||
* as we could avoid loading SPRN_ESR completely in the first
|
||||
* place...
|
||||
*
|
||||
* TODO: Is it worth doing that mfspr & rlwimi in the first
|
||||
* place or can we save a couple of instructions here ?
|
||||
*/
|
||||
mfspr r12,SPRN_ESR
|
||||
li r13,_PAGE_PRESENT|_PAGE_ACCESSED
|
||||
rlwimi r13,r12,10,30,30
|
||||
|
||||
/* Load the PTE */
|
||||
rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
|
||||
lwzx r11, r12, r11 /* Get pgd/pmd entry */
|
||||
rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
|
||||
beq 2f /* Bail if no table */
|
||||
|
||||
rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
|
||||
lwz r11, 4(r12) /* Get pte entry */
|
||||
andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
|
||||
beq 2f /* Bail if not present */
|
||||
lwz r11, 0(r12) /* Get high word of pte entry */
|
||||
lwz r12, 4(r12) /* Get low word of pte entry */
|
||||
|
||||
ori r11, r11, _PAGE_ACCESSED
|
||||
stw r11, 4(r12)
|
||||
lis r10,tlb_44x_index@ha
|
||||
|
||||
andc. r13,r13,r12 /* Check permission */
|
||||
|
||||
/* Load the next available TLB index */
|
||||
lwz r13,tlb_44x_index@l(r10)
|
||||
|
||||
bne 2f /* Bail if permission mismach */
|
||||
|
||||
/* Increment, rollover, and store TLB index */
|
||||
addi r13,r13,1
|
||||
|
||||
/* Compare with watermark (instruction gets patched) */
|
||||
.globl tlb_44x_patch_hwater_D
|
||||
tlb_44x_patch_hwater_D:
|
||||
cmpwi 0,r13,1 /* reserve entries */
|
||||
ble 5f
|
||||
li r13,0
|
||||
5:
|
||||
/* Store the next available TLB index */
|
||||
stw r13,tlb_44x_index@l(r10)
|
||||
|
||||
/* Re-load the faulting address */
|
||||
mfspr r10,SPRN_DEAR
|
||||
|
||||
/* Jump to common tlb load */
|
||||
b finish_tlb_load
|
||||
|
|
@ -510,7 +438,7 @@ interrupt_base:
|
|||
mfspr r12, SPRN_SPRG4R
|
||||
mfspr r11, SPRN_SPRG1
|
||||
mfspr r10, SPRN_SPRG0
|
||||
b data_access
|
||||
b DataStorage
|
||||
|
||||
/* Instruction TLB Error Interrupt */
|
||||
/*
|
||||
|
|
@ -554,18 +482,42 @@ interrupt_base:
|
|||
4:
|
||||
mtspr SPRN_MMUCR,r12
|
||||
|
||||
/* Make up the required permissions */
|
||||
li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC
|
||||
|
||||
rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
|
||||
lwzx r11, r12, r11 /* Get pgd/pmd entry */
|
||||
rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
|
||||
beq 2f /* Bail if no table */
|
||||
|
||||
rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
|
||||
lwz r11, 4(r12) /* Get pte entry */
|
||||
andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
|
||||
beq 2f /* Bail if not present */
|
||||
lwz r11, 0(r12) /* Get high word of pte entry */
|
||||
lwz r12, 4(r12) /* Get low word of pte entry */
|
||||
|
||||
ori r11, r11, _PAGE_ACCESSED
|
||||
stw r11, 4(r12)
|
||||
lis r10,tlb_44x_index@ha
|
||||
|
||||
andc. r13,r13,r12 /* Check permission */
|
||||
|
||||
/* Load the next available TLB index */
|
||||
lwz r13,tlb_44x_index@l(r10)
|
||||
|
||||
bne 2f /* Bail if permission mismach */
|
||||
|
||||
/* Increment, rollover, and store TLB index */
|
||||
addi r13,r13,1
|
||||
|
||||
/* Compare with watermark (instruction gets patched) */
|
||||
.globl tlb_44x_patch_hwater_I
|
||||
tlb_44x_patch_hwater_I:
|
||||
cmpwi 0,r13,1 /* reserve entries */
|
||||
ble 5f
|
||||
li r13,0
|
||||
5:
|
||||
/* Store the next available TLB index */
|
||||
stw r13,tlb_44x_index@l(r10)
|
||||
|
||||
/* Re-load the faulting address */
|
||||
mfspr r10,SPRN_SRR0
|
||||
|
||||
/* Jump to common TLB load point */
|
||||
b finish_tlb_load
|
||||
|
|
@ -587,86 +539,40 @@ interrupt_base:
|
|||
|
||||
/*
|
||||
* Local functions
|
||||
*/
|
||||
/*
|
||||
* Data TLB exceptions will bail out to this point
|
||||
* if they can't resolve the lightweight TLB fault.
|
||||
*/
|
||||
data_access:
|
||||
NORMAL_EXCEPTION_PROLOG
|
||||
mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
|
||||
stw r5,_ESR(r11)
|
||||
mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
|
||||
EXC_XFER_EE_LITE(0x0300, handle_page_fault)
|
||||
*/
|
||||
|
||||
/*
|
||||
|
||||
* Both the instruction and data TLB miss get to this
|
||||
* point to load the TLB.
|
||||
* r10 - EA of fault
|
||||
* r11 - available to use
|
||||
* r12 - Pointer to the 64-bit PTE
|
||||
* r13 - available to use
|
||||
* r11 - PTE high word value
|
||||
* r12 - PTE low word value
|
||||
* r13 - TLB index
|
||||
* MMUCR - loaded with proper value when we get here
|
||||
* Upon exit, we reload everything and RFI.
|
||||
*/
|
||||
finish_tlb_load:
|
||||
/*
|
||||
* We set execute, because we don't have the granularity to
|
||||
* properly set this at the page level (Linux problem).
|
||||
* If shared is set, we cause a zero PID->TID load.
|
||||
* Many of these bits are software only. Bits we don't set
|
||||
* here we (properly should) assume have the appropriate value.
|
||||
*/
|
||||
|
||||
/* Load the next available TLB index */
|
||||
lis r13, tlb_44x_index@ha
|
||||
lwz r13, tlb_44x_index@l(r13)
|
||||
/* Load the TLB high watermark */
|
||||
lis r11, tlb_44x_hwater@ha
|
||||
lwz r11, tlb_44x_hwater@l(r11)
|
||||
|
||||
/* Increment, rollover, and store TLB index */
|
||||
addi r13, r13, 1
|
||||
cmpw 0, r13, r11 /* reserve entries */
|
||||
ble 7f
|
||||
li r13, 0
|
||||
7:
|
||||
/* Store the next available TLB index */
|
||||
lis r11, tlb_44x_index@ha
|
||||
stw r13, tlb_44x_index@l(r11)
|
||||
|
||||
lwz r11, 0(r12) /* Get MS word of PTE */
|
||||
lwz r12, 4(r12) /* Get LS word of PTE */
|
||||
rlwimi r11, r12, 0, 0 , 19 /* Insert RPN */
|
||||
tlbwe r11, r13, PPC44x_TLB_XLAT /* Write XLAT */
|
||||
/* Combine RPN & ERPN an write WS 0 */
|
||||
rlwimi r11,r12,0,0,19
|
||||
tlbwe r11,r13,PPC44x_TLB_XLAT
|
||||
|
||||
/*
|
||||
* Create PAGEID. This is the faulting address,
|
||||
* Create WS1. This is the faulting address (EPN),
|
||||
* page size, and valid flag.
|
||||
*/
|
||||
li r11, PPC44x_TLB_VALID | PPC44x_TLB_4K
|
||||
rlwimi r10, r11, 0, 20, 31 /* Insert valid and page size */
|
||||
tlbwe r10, r13, PPC44x_TLB_PAGEID /* Write PAGEID */
|
||||
li r11,PPC44x_TLB_VALID | PPC44x_TLB_4K
|
||||
rlwimi r10,r11,0,20,31 /* Insert valid and page size*/
|
||||
tlbwe r10,r13,PPC44x_TLB_PAGEID /* Write PAGEID */
|
||||
|
||||
li r10, PPC44x_TLB_SR@l /* Set SR */
|
||||
rlwimi r10, r12, 0, 30, 30 /* Set SW = _PAGE_RW */
|
||||
rlwimi r10, r12, 29, 29, 29 /* SX = _PAGE_HWEXEC */
|
||||
rlwimi r10, r12, 29, 28, 28 /* UR = _PAGE_USER */
|
||||
rlwimi r11, r12, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */
|
||||
and r11, r12, r11 /* HWEXEC & USER */
|
||||
rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
|
||||
|
||||
rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
|
||||
|
||||
/*
|
||||
* Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
|
||||
* on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
|
||||
* include/asm-powerpc/pgtable-ppc32.h for details).
|
||||
*/
|
||||
rlwinm r12, r12, 0, 20, 10
|
||||
|
||||
tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
|
||||
/* And WS 2 */
|
||||
li r10,0xf85 /* Mask to apply from PTE */
|
||||
rlwimi r10,r12,29,30,30 /* DIRTY -> SW position */
|
||||
and r11,r12,r10 /* Mask PTE bits to keep */
|
||||
andi. r10,r12,_PAGE_USER /* User page ? */
|
||||
beq 1f /* nope, leave U bits empty */
|
||||
rlwimi r11,r11,3,26,28 /* yes, copy S bits to U */
|
||||
1: tlbwe r11,r13,PPC44x_TLB_ATTRIB /* Write ATTRIB */
|
||||
|
||||
/* Done...restore registers and get out of here.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -340,6 +340,14 @@
|
|||
addi r3,r1,STACK_FRAME_OVERHEAD; \
|
||||
EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
|
||||
|
||||
#define DATA_STORAGE_EXCEPTION \
|
||||
START_EXCEPTION(DataStorage) \
|
||||
NORMAL_EXCEPTION_PROLOG; \
|
||||
mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
|
||||
stw r5,_ESR(r11); \
|
||||
mfspr r4,SPRN_DEAR; /* Grab the DEAR */ \
|
||||
EXC_XFER_EE_LITE(0x0300, handle_page_fault)
|
||||
|
||||
#define INSTRUCTION_STORAGE_EXCEPTION \
|
||||
START_EXCEPTION(InstructionStorage) \
|
||||
NORMAL_EXCEPTION_PROLOG; \
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
#include <asm/mmu.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
#include "mmu_decl.h"
|
||||
|
||||
|
|
@ -37,11 +38,35 @@ unsigned int tlb_44x_index; /* = 0 */
|
|||
unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
|
||||
int icache_44x_need_flush;
|
||||
|
||||
static void __init ppc44x_update_tlb_hwater(void)
|
||||
{
|
||||
extern unsigned int tlb_44x_patch_hwater_D[];
|
||||
extern unsigned int tlb_44x_patch_hwater_I[];
|
||||
|
||||
/* The TLB miss handlers hard codes the watermark in a cmpli
|
||||
* instruction to improve performances rather than loading it
|
||||
* from the global variable. Thus, we patch the instructions
|
||||
* in the 2 TLB miss handlers when updating the value
|
||||
*/
|
||||
tlb_44x_patch_hwater_D[0] = (tlb_44x_patch_hwater_D[0] & 0xffff0000) |
|
||||
tlb_44x_hwater;
|
||||
flush_icache_range((unsigned long)&tlb_44x_patch_hwater_D[0],
|
||||
(unsigned long)&tlb_44x_patch_hwater_D[1]);
|
||||
tlb_44x_patch_hwater_I[0] = (tlb_44x_patch_hwater_I[0] & 0xffff0000) |
|
||||
tlb_44x_hwater;
|
||||
flush_icache_range((unsigned long)&tlb_44x_patch_hwater_I[0],
|
||||
(unsigned long)&tlb_44x_patch_hwater_I[1]);
|
||||
}
|
||||
|
||||
/*
|
||||
* "Pins" a 256MB TLB entry in AS0 for kernel lowmem
|
||||
*/
|
||||
static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
|
||||
{
|
||||
unsigned int entry = tlb_44x_hwater--;
|
||||
|
||||
ppc44x_update_tlb_hwater();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"tlbwe %2,%3,%4\n"
|
||||
"tlbwe %1,%3,%5\n"
|
||||
|
|
@ -50,7 +75,7 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
|
|||
: "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
|
||||
"r" (phys),
|
||||
"r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
|
||||
"r" (tlb_44x_hwater--), /* slot for this TLB entry */
|
||||
"r" (entry),
|
||||
"i" (PPC44x_TLB_PAGEID),
|
||||
"i" (PPC44x_TLB_XLAT),
|
||||
"i" (PPC44x_TLB_ATTRIB));
|
||||
|
|
@ -58,6 +83,8 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
|
|||
|
||||
void __init MMU_init_hw(void)
|
||||
{
|
||||
ppc44x_update_tlb_hwater();
|
||||
|
||||
flush_instruction_cache();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -306,7 +306,8 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
|
|||
flush_dcache_icache_page(page);
|
||||
set_bit(PG_arch_1, &page->flags);
|
||||
}
|
||||
pte_update(ptep, 0, _PAGE_HWEXEC);
|
||||
pte_update(ptep, 0, _PAGE_HWEXEC |
|
||||
_PAGE_ACCESSED);
|
||||
_tlbie(address, mm->context.id);
|
||||
pte_unmap_unlock(ptep, ptl);
|
||||
up_read(&mm->mmap_sem);
|
||||
|
|
|
|||
|
|
@ -57,8 +57,8 @@
|
|||
|
||||
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
|
||||
|
||||
unsigned long total_memory;
|
||||
unsigned long total_lowmem;
|
||||
phys_addr_t total_memory;
|
||||
phys_addr_t total_lowmem;
|
||||
|
||||
phys_addr_t memstart_addr = (phys_addr_t)~0ull;
|
||||
EXPORT_SYMBOL(memstart_addr);
|
||||
|
|
|
|||
|
|
@ -330,7 +330,7 @@ static int __init mark_nonram_nosave(void)
|
|||
void __init paging_init(void)
|
||||
{
|
||||
unsigned long total_ram = lmb_phys_mem_size();
|
||||
unsigned long top_of_ram = lmb_end_of_DRAM();
|
||||
phys_addr_t top_of_ram = lmb_end_of_DRAM();
|
||||
unsigned long max_zone_pfns[MAX_NR_ZONES];
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
|
|
@ -349,10 +349,10 @@ void __init paging_init(void)
|
|||
kmap_prot = PAGE_KERNEL;
|
||||
#endif /* CONFIG_HIGHMEM */
|
||||
|
||||
printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
|
||||
top_of_ram, total_ram);
|
||||
printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%lx\n",
|
||||
(u64)top_of_ram, total_ram);
|
||||
printk(KERN_DEBUG "Memory hole size: %ldMB\n",
|
||||
(top_of_ram - total_ram) >> 20);
|
||||
(long int)((top_of_ram - total_ram) >> 20));
|
||||
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT;
|
||||
|
|
|
|||
|
|
@ -49,8 +49,8 @@ extern unsigned int num_tlbcam_entries;
|
|||
extern unsigned long ioremap_bot;
|
||||
extern unsigned long __max_low_memory;
|
||||
extern phys_addr_t __initial_memory_limit_addr;
|
||||
extern unsigned long total_memory;
|
||||
extern unsigned long total_lowmem;
|
||||
extern phys_addr_t total_memory;
|
||||
extern phys_addr_t total_lowmem;
|
||||
extern phys_addr_t memstart_addr;
|
||||
extern phys_addr_t lowmem_end_addr;
|
||||
|
||||
|
|
|
|||
|
|
@ -111,6 +111,22 @@ config YOSEMITE
|
|||
# help
|
||||
# This option enables support for the IBM PPC440GX evaluation board.
|
||||
|
||||
config XILINX_VIRTEX440_GENERIC_BOARD
|
||||
bool "Generic Xilinx Virtex 440 board"
|
||||
depends on 44x
|
||||
default n
|
||||
select XILINX_VIRTEX_5_FXT
|
||||
help
|
||||
This option enables generic support for Xilinx Virtex based boards
|
||||
that use a 440 based processor in the Virtex 5 FXT FPGA architecture.
|
||||
|
||||
The generic virtex board support matches any device tree which
|
||||
specifies 'xlnx,virtex440' in its compatible field. This includes
|
||||
the Xilinx ML5xx reference designs using the powerpc core.
|
||||
|
||||
Most Virtex 5 designs should use this unless it needs to do some
|
||||
special configuration at board probe time.
|
||||
|
||||
# 44x specific CPU modules, selected based on the board above.
|
||||
config 440EP
|
||||
bool
|
||||
|
|
@ -161,3 +177,13 @@ config 460EX
|
|||
# 44x errata/workaround config symbols, selected by the CPU models above
|
||||
config IBM440EP_ERR42
|
||||
bool
|
||||
|
||||
# Xilinx specific config options.
|
||||
config XILINX_VIRTEX
|
||||
bool
|
||||
|
||||
# Xilinx Virtex 5 FXT FPGA architecture, selected by a Xilinx board above
|
||||
config XILINX_VIRTEX_5_FXT
|
||||
bool
|
||||
select XILINX_VIRTEX
|
||||
|
||||
|
|
|
|||
|
|
@ -10,3 +10,4 @@ obj-$(CONFIG_RAINIER) += rainier.o
|
|||
obj-$(CONFIG_WARP) += warp.o
|
||||
obj-$(CONFIG_WARP) += warp-nand.o
|
||||
obj-$(CONFIG_CANYONLANDS) += canyonlands.o
|
||||
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
|
||||
|
|
|
|||
60
arch/powerpc/platforms/44x/virtex.c
Normal file
60
arch/powerpc/platforms/44x/virtex.c
Normal file
|
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Xilinx Virtex 5FXT based board support, derived from
|
||||
* the Xilinx Virtex (IIpro & 4FX) based board support
|
||||
*
|
||||
* Copyright 2007 Secret Lab Technologies Ltd.
|
||||
* Copyright 2008 Xilinx, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/xilinx_intc.h>
|
||||
#include <asm/reg.h>
|
||||
#include <asm/ppc4xx.h>
|
||||
#include "44x.h"
|
||||
|
||||
static struct of_device_id xilinx_of_bus_ids[] __initdata = {
|
||||
{ .compatible = "simple-bus", },
|
||||
{ .compatible = "xlnx,plb-v46-1.00.a", },
|
||||
{ .compatible = "xlnx,plb-v46-1.02.a", },
|
||||
{ .compatible = "xlnx,plb-v34-1.01.a", },
|
||||
{ .compatible = "xlnx,plb-v34-1.02.a", },
|
||||
{ .compatible = "xlnx,opb-v20-1.10.c", },
|
||||
{ .compatible = "xlnx,dcr-v29-1.00.a", },
|
||||
{ .compatible = "xlnx,compound", },
|
||||
{}
|
||||
};
|
||||
|
||||
static int __init virtex_device_probe(void)
|
||||
{
|
||||
of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
machine_device_initcall(virtex, virtex_device_probe);
|
||||
|
||||
static int __init virtex_probe(void)
|
||||
{
|
||||
unsigned long root = of_get_flat_dt_root();
|
||||
|
||||
if (!of_flat_dt_is_compatible(root, "xlnx,virtex440"))
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
define_machine(virtex) {
|
||||
.name = "Xilinx Virtex440",
|
||||
.probe = virtex_probe,
|
||||
.init_IRQ = xilinx_intc_init_tree,
|
||||
.get_irq = xilinx_intc_get_irq,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.restart = ppc4xx_reset_system,
|
||||
};
|
||||
|
|
@ -113,9 +113,14 @@ static int warp_setup_nand_flash(void)
|
|||
pp = of_find_property(np, "reg", NULL);
|
||||
if (pp && (pp->length == 12)) {
|
||||
u32 *v = pp->value;
|
||||
if (v[2] == 0x4000000)
|
||||
if (v[2] == 0x4000000) {
|
||||
/* Rev A = 64M NAND */
|
||||
warp_nand_chip0.nr_partitions = 2;
|
||||
warp_nand_chip0.nr_partitions = 3;
|
||||
|
||||
nand_parts[1].size = 0x3000000;
|
||||
nand_parts[2].offset = 0x3200000;
|
||||
nand_parts[2].size = 0x0e00000;
|
||||
}
|
||||
}
|
||||
of_node_put(np);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -182,6 +182,9 @@ extern int icache_44x_need_flush;
|
|||
#define _PMD_SIZE_16M 0x0e0
|
||||
#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))
|
||||
|
||||
/* Until my rework is finished, 40x still needs atomic PTE updates */
|
||||
#define PTE_ATOMIC_UPDATES 1
|
||||
|
||||
#elif defined(CONFIG_44x)
|
||||
/*
|
||||
* Definitions for PPC440
|
||||
|
|
@ -253,17 +256,17 @@ extern int icache_44x_need_flush;
|
|||
*/
|
||||
|
||||
#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
|
||||
#define _PAGE_RW 0x00000002 /* S: Write permission */
|
||||
#define _PAGE_RW 0x00000002 /* S: Write permission */
|
||||
#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
|
||||
#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
|
||||
#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
|
||||
#define _PAGE_HWWRITE 0x00000010 /* H: Dirty & RW */
|
||||
#define _PAGE_HWEXEC 0x00000020 /* H: Execute permission */
|
||||
#define _PAGE_USER 0x00000040 /* S: User page */
|
||||
#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
|
||||
#define _PAGE_GUARDED 0x00000100 /* H: G bit */
|
||||
#define _PAGE_DIRTY 0x00000200 /* S: Page dirty */
|
||||
#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
|
||||
#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
|
||||
#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
|
||||
#define _PAGE_USER 0x00000040 /* S: User page */
|
||||
#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
|
||||
#define _PAGE_GUARDED 0x00000100 /* H: G bit */
|
||||
#define _PAGE_COHERENT 0x00000200 /* H: M bit */
|
||||
#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
|
||||
#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
|
||||
|
||||
/* TODO: Add large page lowmem mapping support */
|
||||
#define _PMD_PRESENT 0
|
||||
|
|
@ -273,6 +276,7 @@ extern int icache_44x_need_flush;
|
|||
/* ERPN in a PTE never gets cleared, ignore it */
|
||||
#define _PTE_NONE_MASK 0xffffffff00000000ULL
|
||||
|
||||
|
||||
#elif defined(CONFIG_FSL_BOOKE)
|
||||
/*
|
||||
MMU Assist Register 3:
|
||||
|
|
@ -315,6 +319,9 @@ extern int icache_44x_need_flush;
|
|||
#define _PMD_PRESENT_MASK (PAGE_MASK)
|
||||
#define _PMD_BAD (~PAGE_MASK)
|
||||
|
||||
/* Until my rework is finished, FSL BookE still needs atomic PTE updates */
|
||||
#define PTE_ATOMIC_UPDATES 1
|
||||
|
||||
#elif defined(CONFIG_8xx)
|
||||
/* Definitions for 8xx embedded chips. */
|
||||
#define _PAGE_PRESENT 0x0001 /* Page is valid */
|
||||
|
|
@ -345,6 +352,9 @@ extern int icache_44x_need_flush;
|
|||
|
||||
#define _PTE_NONE_MASK _PAGE_ACCESSED
|
||||
|
||||
/* Until my rework is finished, 8xx still needs atomic PTE updates */
|
||||
#define PTE_ATOMIC_UPDATES 1
|
||||
|
||||
#else /* CONFIG_6xx */
|
||||
/* Definitions for 60x, 740/750, etc. */
|
||||
#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
|
||||
|
|
@ -365,6 +375,10 @@ extern int icache_44x_need_flush;
|
|||
#define _PMD_PRESENT 0
|
||||
#define _PMD_PRESENT_MASK (PAGE_MASK)
|
||||
#define _PMD_BAD (~PAGE_MASK)
|
||||
|
||||
/* Hash table based platforms need atomic updates of the linux PTE */
|
||||
#define PTE_ATOMIC_UPDATES 1
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -557,9 +571,11 @@ extern void add_hash_page(unsigned context, unsigned long va,
|
|||
* low PTE word since we expect ALL flag bits to be there
|
||||
*/
|
||||
#ifndef CONFIG_PTE_64BIT
|
||||
static inline unsigned long pte_update(pte_t *p, unsigned long clr,
|
||||
static inline unsigned long pte_update(pte_t *p,
|
||||
unsigned long clr,
|
||||
unsigned long set)
|
||||
{
|
||||
#ifdef PTE_ATOMIC_UPDATES
|
||||
unsigned long old, tmp;
|
||||
|
||||
__asm__ __volatile__("\
|
||||
|
|
@ -572,16 +588,26 @@ static inline unsigned long pte_update(pte_t *p, unsigned long clr,
|
|||
: "=&r" (old), "=&r" (tmp), "=m" (*p)
|
||||
: "r" (p), "r" (clr), "r" (set), "m" (*p)
|
||||
: "cc" );
|
||||
#else /* PTE_ATOMIC_UPDATES */
|
||||
unsigned long old = pte_val(*p);
|
||||
*p = __pte((old & ~clr) | set);
|
||||
#endif /* !PTE_ATOMIC_UPDATES */
|
||||
|
||||
#ifdef CONFIG_44x
|
||||
if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
|
||||
icache_44x_need_flush = 1;
|
||||
#endif
|
||||
return old;
|
||||
}
|
||||
#else
|
||||
static inline unsigned long long pte_update(pte_t *p, unsigned long clr,
|
||||
unsigned long set)
|
||||
#else /* CONFIG_PTE_64BIT */
|
||||
/* TODO: Change that to only modify the low word and move set_pte_at()
|
||||
* out of line
|
||||
*/
|
||||
static inline unsigned long long pte_update(pte_t *p,
|
||||
unsigned long clr,
|
||||
unsigned long set)
|
||||
{
|
||||
#ifdef PTE_ATOMIC_UPDATES
|
||||
unsigned long long old;
|
||||
unsigned long tmp;
|
||||
|
||||
|
|
@ -596,13 +622,18 @@ static inline unsigned long long pte_update(pte_t *p, unsigned long clr,
|
|||
: "=&r" (old), "=&r" (tmp), "=m" (*p)
|
||||
: "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p)
|
||||
: "cc" );
|
||||
#else /* PTE_ATOMIC_UPDATES */
|
||||
unsigned long long old = pte_val(*p);
|
||||
*p = __pte((old & ~clr) | set);
|
||||
#endif /* !PTE_ATOMIC_UPDATES */
|
||||
|
||||
#ifdef CONFIG_44x
|
||||
if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
|
||||
icache_44x_need_flush = 1;
|
||||
#endif
|
||||
return old;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_PTE_64BIT */
|
||||
|
||||
/*
|
||||
* set_pte stores a linux PTE into the linux page table.
|
||||
|
|
@ -671,7 +702,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
|
|||
({ \
|
||||
int __changed = !pte_same(*(__ptep), __entry); \
|
||||
if (__changed) { \
|
||||
__ptep_set_access_flags(__ptep, __entry, __dirty); \
|
||||
__ptep_set_access_flags(__ptep, __entry, __dirty); \
|
||||
flush_tlb_page_nohash(__vma, __address); \
|
||||
} \
|
||||
__changed; \
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user