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[POWERPC] Separate MPC52xx PSC FIFO registers from rest of PSC

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This is in preparation for the addition of MPC512x
PSC support.  The main difference in the 512x is
in the fifo registers.

Signed-off-by: John Rigby <jrigby@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
John Rigby 2008-01-17 08:37:24 +11:00 committed by Grant Likely
parent 5b5820d08b
commit 94f389485e
3 changed files with 12 additions and 4 deletions
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10
drivers/serial/mpc52xx_uart.c
View File

@ -112,6 +112,7 @@ static void mpc52xx_uart_of_enumerate(void);
#endif
#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
#define FIFO(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
/* Forward declaration of the interruption handling routine */
@ -223,6 +224,7 @@ static int
mpc52xx_uart_startup(struct uart_port *port)
{
struct mpc52xx_psc __iomem *psc = PSC(port);
struct mpc52xx_psc_fifo __iomem *fifo = FIFO(port);
int ret;
/* Request IRQ */
@ -239,10 +241,10 @@ mpc52xx_uart_startup(struct uart_port *port)
out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
out_8(&psc->rfcntl, 0x00);
out_be16(&psc->rfalarm, 0x1ff);
out_8(&psc->tfcntl, 0x07);
out_be16(&psc->tfalarm, 0x80);
out_8(&fifo->rfcntl, 0x00);
out_be16(&fifo->rfalarm, 0x1ff);
out_8(&fifo->tfcntl, 0x07);
out_be16(&fifo->tfalarm, 0x80);
port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);

3
include/asm-powerpc/mpc52xx_psc.h
View File

@ -153,6 +153,9 @@ struct mpc52xx_psc {
u8 reserved16[3];
u8 irfdr; /* PSC + 0x54 */
u8 reserved17[3];
};
struct mpc52xx_psc_fifo {
u16 rfnum; /* PSC + 0x58 */
u16 reserved18;
u16 tfnum; /* PSC + 0x5c */

3
include/asm-ppc/mpc52xx_psc.h
View File

@ -159,6 +159,9 @@ struct mpc52xx_psc {
u8 reserved16[3];
u8 irfdr; /* PSC + 0x54 */
u8 reserved17[3];
};
struct mpc52xx_psc_fifo {
u16 rfnum; /* PSC + 0x58 */
u16 reserved18;
u16 tfnum; /* PSC + 0x5c */