forked from luck/tmp_suning_uos_patched
ARM: SAMSUNG: Add GPIO configuration read calls
Add the necessary 1,2 and 4 bit configuration read calls for the new gpio code to allow removal of the old s3c24xx gpio code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
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5690a6267f
commit
97a339995f
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@ -51,6 +51,7 @@
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static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
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.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
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.get_config = s3c_gpio_getcfg_s3c64xx_4bit,
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.set_pull = s3c_gpio_setpull_updown,
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.get_pull = s3c_gpio_getpull_updown,
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};
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@ -58,12 +59,14 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
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static struct s3c_gpio_cfg gpio_4bit_cfg_eint0111 = {
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.cfg_eint = 7,
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.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
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.get_config = s3c_gpio_getcfg_s3c64xx_4bit,
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.set_pull = s3c_gpio_setpull_updown,
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.get_pull = s3c_gpio_getpull_updown,
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};
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static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = {
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.cfg_eint = 3,
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.get_config = s3c_gpio_getcfg_s3c64xx_4bit,
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.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
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.set_pull = s3c_gpio_setpull_updown,
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.get_pull = s3c_gpio_getpull_updown,
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@ -171,6 +174,7 @@ static struct s3c_gpio_chip gpio_4bit2[] = {
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static struct s3c_gpio_cfg gpio_2bit_cfg_noint = {
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.set_config = s3c_gpio_setcfg_s3c24xx,
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.get_config = s3c_gpio_getcfg_s3c24xx,
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.set_pull = s3c_gpio_setpull_updown,
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.get_pull = s3c_gpio_getpull_updown,
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};
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@ -178,6 +182,7 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_noint = {
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static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = {
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.cfg_eint = 2,
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.set_config = s3c_gpio_setcfg_s3c24xx,
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.get_config = s3c_gpio_getcfg_s3c24xx,
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.set_pull = s3c_gpio_setpull_updown,
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.get_pull = s3c_gpio_getpull_updown,
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};
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@ -185,6 +190,7 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = {
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static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = {
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.cfg_eint = 3,
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.set_config = s3c_gpio_setcfg_s3c24xx,
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.get_config = s3c_gpio_getcfg_s3c24xx,
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.set_pull = s3c_gpio_setpull_updown,
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.get_pull = s3c_gpio_getpull_updown,
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};
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@ -161,12 +161,15 @@ static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = {
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}, {
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.cfg_eint = 0,
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.set_config = s3c_gpio_setcfg_s3c24xx,
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.get_config = s3c_gpio_getcfg_s3c24xx,
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}, {
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.cfg_eint = 2,
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.set_config = s3c_gpio_setcfg_s3c24xx,
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.get_config = s3c_gpio_getcfg_s3c24xx,
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}, {
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.cfg_eint = 3,
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.set_config = s3c_gpio_setcfg_s3c24xx,
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.get_config = s3c_gpio_getcfg_s3c24xx,
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},
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};
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@ -279,6 +282,8 @@ void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
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for (; nr_chips > 0; nr_chips--, chipcfg++) {
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if (!chipcfg->set_config)
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chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit;
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if (!chipcfg->get_config)
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chipcfg->get_config = s3c_gpio_getcfg_s3c64xx_4bit;
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if (!chipcfg->set_pull)
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chipcfg->set_pull = s3c_gpio_setpull_updown;
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if (!chipcfg->get_pull)
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@ -81,10 +81,12 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
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static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
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.set_config = s3c_gpio_setcfg_s3c24xx_a,
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.get_config = s3c_gpio_getcfg_s3c24xx_a,
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};
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struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
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.set_config = s3c_gpio_setcfg_s3c24xx,
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.get_config = s3c_gpio_getcfg_s3c24xx,
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};
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struct s3c_gpio_chip s3c24xx_gpios[] = {
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@ -1,7 +1,7 @@
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/* linux/arch/arm/plat-s3c/gpio-config.c
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Copyright 2008-2010 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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@ -87,6 +87,19 @@ int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
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return 0;
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}
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unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
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unsigned int off)
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{
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u32 con;
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con = __raw_readl(chip->base);
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con >>= off;
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con &= 1;
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con++;
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return S3C_GPIO_SFN(con);
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}
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int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
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unsigned int off, unsigned int cfg)
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{
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@ -109,6 +122,19 @@ int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
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return 0;
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}
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unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
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unsigned int off)
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{
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u32 con;
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con = __raw_readl(chip->base);
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con >>= off * 2;
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con &= 3;
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/* this conversion works for IN and OUT as well as special mode */
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return S3C_GPIO_SPECIAL(con);
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}
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#endif
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#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
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@ -134,6 +160,25 @@ int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
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return 0;
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}
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unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
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unsigned int off)
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{
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void __iomem *reg = chip->base;
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unsigned int shift = (off & 7) * 4;
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u32 con;
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if (off < 8 && chip->chip.ngpio > 8)
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reg -= 4;
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con = __raw_readl(reg);
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con >>= shift;
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con &= 0xf;
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/* this conversion works for IN and OUT as well as special mode */
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return S3C_GPIO_SPECIAL(con);
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}
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#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
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#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
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@ -52,6 +52,18 @@ static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip,
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extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
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unsigned int off, unsigned int cfg);
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/**
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* s3c_gpio_getcfg_s3c24xx - S3C24XX style GPIO configuration read.
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* @chip: The gpio chip that is being configured.
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* @off: The offset for the GPIO being configured.
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*
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* The reverse of s3c_gpio_setcfg_s3c24xx(). Will return a value whicg
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* could be directly passed back to s3c_gpio_setcfg_s3c24xx(), from the
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* S3C_GPIO_SPECIAL() macro.
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*/
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unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
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unsigned int off);
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/**
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* s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A)
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* @chip: The gpio chip that is being configured.
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@ -65,6 +77,21 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
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extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
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unsigned int off, unsigned int cfg);
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/**
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* s3c_gpio_getcfg_s3c24xx_a - S3C24XX style GPIO configuration read (Bank A)
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* @chip: The gpio chip that is being configured.
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* @off: The offset for the GPIO being configured.
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*
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* The reverse of s3c_gpio_setcfg_s3c24xx_a() turning an GPIO into a usable
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* GPIO configuration value.
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*
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* @sa s3c_gpio_getcfg_s3c24xx
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* @sa s3c_gpio_getcfg_s3c64xx_4bit
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*/
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extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
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unsigned int off);
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/**
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* s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config.
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* @chip: The gpio chip that is being configured.
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@ -85,6 +112,20 @@ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
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unsigned int off, unsigned int cfg);
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/**
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* s3c_gpio_getcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config read.
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* @chip: The gpio chip that is being configured.
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* @off: The offset for the GPIO being configured.
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*
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* The reverse of s3c_gpio_setcfg_s3c64xx_4bit(), turning a gpio configuration
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* register setting into a value the software can use, such as could be passed
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* to s3c_gpio_setcfg_s3c64xx_4bit().
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*
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* @sa s3c_gpio_getcfg_s3c24xx
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*/
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extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
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unsigned int off);
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/* Pull-{up,down} resistor controls.
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*
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* S3C2410,S3C2440,S3C24A0 = Pull-UP,
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