forked from luck/tmp_suning_uos_patched
KVM: nVMX: Don't flush TLB on nested VMX transition
Unconditionally skip the TLB flush triggered when reusing a root for a nested transition as nested_vmx_transition_tlb_flush() ensures the TLB is flushed when needed, regardless of whether the MMU can reuse a cached root (or the last root). Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Message-Id: <20200320212833.3507-35-sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -5034,7 +5034,7 @@ void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
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kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
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execonly, level);
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__kvm_mmu_new_cr3(vcpu, new_eptp, new_role.base, false, true);
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__kvm_mmu_new_cr3(vcpu, new_eptp, new_role.base, true, true);
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if (new_role.as_u64 == context->mmu_role.as_u64)
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return;
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@ -1143,10 +1143,12 @@ static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool ne
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}
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/*
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* See nested_vmx_transition_mmu_sync for details on skipping the MMU sync.
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* Unconditionally skip the TLB flush on fast CR3 switch, all TLB
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* flushes are handled by nested_vmx_transition_tlb_flush(). See
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* nested_vmx_transition_mmu_sync for details on skipping the MMU sync.
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*/
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if (!nested_ept)
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kvm_mmu_new_cr3(vcpu, cr3, false,
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kvm_mmu_new_cr3(vcpu, cr3, true,
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!nested_vmx_transition_mmu_sync(vcpu));
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vcpu->arch.cr3 = cr3;
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