forked from luck/tmp_suning_uos_patched
arch, mm: convert all architectures to use 5level-fixup.h
If an architecture uses 4level-fixup.h we don't need to do anything as it includes 5level-fixup.h. If an architecture uses pgtable-nop*d.h, define __ARCH_USE_5LEVEL_HACK before inclusion of the header. It makes asm-generic code to use 5level-fixup.h. If an architecture has 4-level paging or folds levels on its own, include 5level-fixup.h directly. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Acked-by: Michal Hocko <mhocko@suse.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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30ec842660
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@ -11,6 +11,7 @@
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#define _ASM_ARC_HUGEPAGE_H
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#include <linux/types.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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static inline pte_t pmd_pte(pmd_t pmd)
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@ -37,6 +37,7 @@
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#include <asm/page.h>
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#include <asm/mmu.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#include <linux/const.h>
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@ -20,6 +20,7 @@
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#else
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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#include <asm/memory.h>
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#include <asm/pgtable-hwdef.h>
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@ -55,9 +55,13 @@ typedef struct { pteval_t pgprot; } pgprot_t;
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#define __pgprot(x) ((pgprot_t) { (x) } )
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#if CONFIG_PGTABLE_LEVELS == 2
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#elif CONFIG_PGTABLE_LEVELS == 3
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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#elif CONFIG_PGTABLE_LEVELS == 4
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#include <asm-generic/5level-fixup.h>
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#endif
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#endif /* __ASM_PGTABLE_TYPES_H */
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@ -8,6 +8,7 @@
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#ifndef __ASM_AVR32_PGTABLE_2LEVEL_H
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#define __ASM_AVR32_PGTABLE_2LEVEL_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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/*
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@ -6,6 +6,7 @@
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#define _CRIS_PGTABLE_H
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#include <asm/page.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#ifndef __ASSEMBLY__
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@ -16,6 +16,7 @@
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#ifndef _ASM_PGTABLE_H
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#define _ASM_PGTABLE_H
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#include <asm-generic/5level-fixup.h>
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#include <asm/mem-layout.h>
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#include <asm/setup.h>
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#include <asm/processor.h>
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@ -1,5 +1,6 @@
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#ifndef _H8300_PGTABLE_H
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#define _H8300_PGTABLE_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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#include <asm-generic/pgtable.h>
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#define pgtable_cache_init() do { } while (0)
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@ -26,6 +26,7 @@
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*/
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#include <linux/swap.h>
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#include <asm/page.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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/* A handy thing to have if one has the RAM. Declared in head.S */
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@ -587,8 +587,10 @@ extern struct page *zero_page_memmap_ptr;
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#if CONFIG_PGTABLE_LEVELS == 3
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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#endif
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#include <asm-generic/5level-fixup.h>
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#include <asm-generic/pgtable.h>
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#endif /* _ASM_IA64_PGTABLE_H */
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@ -6,6 +6,7 @@
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#define _METAG_PGTABLE_H
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#include <asm/pgtable-bits.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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/* Invalid regions on Meta: 0x00000000-0x001FFFFF and 0xFFFF0000-0xFFFFFFFF */
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@ -95,7 +95,8 @@ typedef struct { unsigned long pgd; } pgd_t;
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# else /* CONFIG_MMU */
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typedef struct { unsigned long ste[64]; } pmd_t;
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typedef struct { pmd_t pue[1]; } pud_t;
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typedef struct { pud_t pge[1]; } pgd_t;
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typedef struct { pud_t p4e[1]; } p4d_t;
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typedef struct { p4d_t pge[1]; } pgd_t;
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# endif /* CONFIG_MMU */
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# define pte_val(x) ((x).pte)
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@ -16,6 +16,7 @@
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#include <asm/cachectl.h>
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#include <asm/fixmap.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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extern int temp_tlb_entry;
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@ -17,6 +17,7 @@
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#include <asm/cachectl.h>
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#include <asm/fixmap.h>
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#define __ARCH_USE_5LEVEL_HACK
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#if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_MIPS_VA_BITS_48)
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#include <asm-generic/pgtable-nopmd.h>
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#else
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@ -57,6 +57,7 @@ typedef struct page *pgtable_t;
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#define __pgd(x) ((pgd_t) { (x) })
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#define __pgprot(x) ((pgprot_t) { (x) })
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#endif /* !__ASSEMBLY__ */
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@ -22,6 +22,7 @@
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#include <asm/tlbflush.h>
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#include <asm/pgtable-bits.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#define FIRST_USER_ADDRESS 0UL
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@ -25,6 +25,7 @@
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#ifndef __ASM_OPENRISC_PGTABLE_H
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#define __ASM_OPENRISC_PGTABLE_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#ifndef __ASSEMBLY__
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@ -1,6 +1,7 @@
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#ifndef _ASM_POWERPC_BOOK3S_32_PGTABLE_H
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#define _ASM_POWERPC_BOOK3S_32_PGTABLE_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#include <asm/book3s/32/hash.h>
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@ -1,9 +1,12 @@
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#ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
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#define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
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#include <asm-generic/5level-fixup.h>
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#ifndef __ASSEMBLY__
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#include <linux/mmdebug.h>
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#endif
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/*
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* Common bits between hash and Radix page table
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*/
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#ifndef _ASM_POWERPC_NOHASH_32_PGTABLE_H
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#define _ASM_POWERPC_NOHASH_32_PGTABLE_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#ifndef __ASSEMBLY__
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@ -1,5 +1,8 @@
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#ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_4K_H
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#define _ASM_POWERPC_NOHASH_64_PGTABLE_4K_H
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#include <asm-generic/5level-fixup.h>
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/*
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* Entries per page directory level. The PTE level must use a 64b record
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* for each page table entry. The PMD and PGD level use a 32b record for
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#ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_64K_H
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#define _ASM_POWERPC_NOHASH_64_PGTABLE_64K_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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@ -24,6 +24,7 @@
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* the S390 page table tree.
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*/
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#ifndef __ASSEMBLY__
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#include <asm-generic/5level-fixup.h>
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#include <linux/sched.h>
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#include <linux/mm_types.h>
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#include <linux/page-flags.h>
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@ -2,6 +2,7 @@
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#define _ASM_SCORE_PGTABLE_H
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#include <linux/const.h>
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#include <asm/fixmap.h>
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@ -1,6 +1,7 @@
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#ifndef __ASM_SH_PGTABLE_2LEVEL_H
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#define __ASM_SH_PGTABLE_2LEVEL_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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/*
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#ifndef __ASM_SH_PGTABLE_3LEVEL_H
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#define __ASM_SH_PGTABLE_3LEVEL_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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/*
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* the SpitFire page tables.
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*/
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#include <asm-generic/5level-fixup.h>
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#include <linux/compiler.h>
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#include <linux/const.h>
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#include <asm/types.h>
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#define MAXMEM (_VMALLOC_START - PAGE_OFFSET)
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/* We have no pmd or pud since we are strictly a two-level page table */
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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static inline int pud_huge_page(pud_t pud) { return 0; }
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@ -59,6 +59,7 @@
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#ifndef __ASSEMBLY__
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/* We have no pud since we are a three-level page table. */
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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/*
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#ifndef __UM_PGTABLE_2LEVEL_H
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#define __UM_PGTABLE_2LEVEL_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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/* PGDIR_SHIFT determines what a third-level page table entry can map */
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#ifndef __UM_PGTABLE_3LEVEL_H
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#define __UM_PGTABLE_3LEVEL_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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/* PGDIR_SHIFT determines what a third-level page table entry can map */
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#ifndef __UNICORE_PGTABLE_H__
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#define __UNICORE_PGTABLE_H__
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#include <asm/cpu-single.h>
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}
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#if CONFIG_PGTABLE_LEVELS > 3
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#include <asm-generic/5level-fixup.h>
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typedef struct { pudval_t pud; } pud_t;
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static inline pud_t native_make_pud(pmdval_t val)
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return pud.pud;
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}
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#else
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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static inline pudval_t native_pud_val(pud_t pud)
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return pmd.pmd;
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}
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#else
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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static inline pmdval_t native_pmd_val(pmd_t pmd)
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#ifndef _XTENSA_PGTABLE_H
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#define _XTENSA_PGTABLE_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopmd.h>
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#include <asm/page.h>
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#include <asm/kmem_layout.h>
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