forked from luck/tmp_suning_uos_patched
drm/i915: add get_vblank_counter function for GM45
As discussed in the long thread about vblank related timeouts, it turns out GM45 has different frame count registers than previous chips. This patch adds support for them, which prevents us from waiting on really stale sequence values in drm_wait_vblank (which rather than returning immediately ends up timing out or getting interrupted). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
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@ -1112,6 +1112,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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dev_priv->has_gem = 1;
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#endif
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dev->driver->get_vblank_counter = i915_get_vblank_counter;
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if (IS_GM45(dev))
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dev->driver->get_vblank_counter = gm45_get_vblank_counter;
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i915_gem_load(dev);
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/* Init HWS */
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@ -112,7 +112,6 @@ static struct drm_driver driver = {
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.suspend = i915_suspend,
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.resume = i915_resume,
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.device_is_agp = i915_driver_device_is_agp,
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.get_vblank_counter = i915_get_vblank_counter,
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.enable_vblank = i915_enable_vblank,
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.disable_vblank = i915_disable_vblank,
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.irq_preinstall = i915_driver_irq_preinstall,
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@ -535,6 +535,7 @@ extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
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extern int i915_enable_vblank(struct drm_device *dev, int crtc);
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extern void i915_disable_vblank(struct drm_device *dev, int crtc);
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extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
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extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc);
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extern int i915_vblank_swap(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
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@ -174,6 +174,19 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
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return count;
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}
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u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
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if (!i915_pipe_enabled(dev, pipe)) {
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DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
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return 0;
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}
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return I915_READ(reg);
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}
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irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
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{
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struct drm_device *dev = (struct drm_device *) arg;
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@ -1371,6 +1371,9 @@
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#define PIPE_FRAME_LOW_SHIFT 24
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#define PIPE_PIXEL_MASK 0x00ffffff
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#define PIPE_PIXEL_SHIFT 0
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/* GM45+ just has to be different */
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#define PIPEA_FRMCOUNT_GM45 0x70040
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#define PIPEA_FLIPCOUNT_GM45 0x70044
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/* Cursor A & B regs */
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#define CURACNTR 0x70080
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@ -1439,6 +1442,9 @@
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#define PIPEBSTAT 0x71024
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#define PIPEBFRAMEHIGH 0x71040
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#define PIPEBFRAMEPIXEL 0x71044
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#define PIPEB_FRMCOUNT_GM45 0x71040
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#define PIPEB_FLIPCOUNT_GM45 0x71044
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/* Display B control */
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#define DSPBCNTR 0x71180
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