forked from luck/tmp_suning_uos_patched
soc: drivers: Amlogic updates for v5.7
- Add secure power domain controller -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl5vy00ACgkQWTcYmtP7 xmXW3Q//Vp+Smi0+r9qEMhM18WFnaTn7A/uh828gjraX1Hnl8KlqYfz4Howh3GxK IsloulnmsfskJ2c+iVrJiX7SjCUJzd6kaordLC0C63WIxTnUgDnaUDFjwzUqT+Tr y9HtwCmUIgl1acJ6wPB+K0ssLuw8FUZa5RmQK24KoOo6Dz1wj3nB15xuy11oRnX7 63irUHHUVg7afV89C6Kxz8bUapufHvrqKKHeNHHm9ulwXFx04547NJ3+WMR0+qPZ QmlMav17p/SI3z40QVePAe/l9RQklxPVNKR2600PzMTjaDIuUK0HLRkRlYedl8fC K12WiPJJp8qZcf5rOMc3wYmdD4AJHsSlp1GhPR7rf4CU8RAkkHDJLvUJaGXJdu4A ixKepdkiKM9p57P48MDSCEvmLyfdt2ce4K0XkZgg9QVaNZ0uF30ixDoOsr+NFRkA quP52cMD3g0Wsm1OW+Ps+xkzkfXMpl+fNmCHFG7FAmSVbHxruhUhb0iah37tO1cz tUZ+wMV4DDkdFp/OKlywOqhk69Z2Uwa0Vs3yKWRrAXaWVfx7GOlR33u7CDZGGSba uSZsl1C4oFlKJ3PJ/6aMDEMx7CijMpENvQHtii2y4BIA8Uy69VBd2jA3SfXoylKw Xz39UfdQNnRUOlqGexh5DNym/iLdXh5YMSL3DgqkSZFG0do5aqM= =IKeh -----END PGP SIGNATURE----- Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers soc: drivers: Amlogic updates for v5.7 - Add secure power domain controller * tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: dt-bindings: power: Fix dt_binding_check error soc: amlogic: fix compile failure with MESON_SECURE_PM_DOMAINS & !MESON_SM soc: amlogic: Add support for Secure power domains controller dt-bindings: power: add Amlogic secure power domains bindings firmware: meson_sm: Add secure power domain support Link: https://lore.kernel.org/r/7hpndcugoo.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
993330e000
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@ -0,0 +1,40 @@
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# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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# Copyright (c) 2019 Amlogic, Inc
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# Author: Jianxin Pan <jianxin.pan@amlogic.com>
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Amlogic Meson Secure Power Domains
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maintainers:
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- Jianxin Pan <jianxin.pan@amlogic.com>
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description: |+
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Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node
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of secure-monitor.
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properties:
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compatible:
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enum:
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- amlogic,meson-a1-pwrc
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"#power-domain-cells":
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const: 1
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required:
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- compatible
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- "#power-domain-cells"
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examples:
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- |
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secure-monitor {
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compatible = "amlogic,meson-gxbb-sm";
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pwrc: power-controller {
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compatible = "amlogic,meson-a1-pwrc";
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#power-domain-cells = <1>;
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};
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};
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@ -44,6 +44,8 @@ static const struct meson_sm_chip gxbb_chip = {
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CMD(SM_EFUSE_WRITE, 0x82000031),
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CMD(SM_EFUSE_USER_MAX, 0x82000033),
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CMD(SM_GET_CHIP_ID, 0x82000044),
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CMD(SM_A1_PWRC_SET, 0x82000093),
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CMD(SM_A1_PWRC_GET, 0x82000095),
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{ /* sentinel */ },
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},
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};
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@ -48,6 +48,19 @@ config MESON_EE_PM_DOMAINS
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Say yes to expose Amlogic Meson Everything-Else Power Domains as
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Generic Power Domains.
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config MESON_SECURE_PM_DOMAINS
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bool "Amlogic Meson Secure Power Domains driver"
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depends on (ARCH_MESON || COMPILE_TEST) && MESON_SM
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depends on PM && OF
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depends on HAVE_ARM_SMCCC
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default ARCH_MESON
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select PM_GENERIC_DOMAINS
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select PM_GENERIC_DOMAINS_OF
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help
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Support for the power controller on Amlogic A1/C1 series.
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Say yes to expose Amlogic Meson Secure Power Domains as Generic
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Power Domains.
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config MESON_MX_SOCINFO
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bool "Amlogic Meson MX SoC Information driver"
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depends on ARCH_MESON || COMPILE_TEST
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@ -5,3 +5,4 @@ obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o
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obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o
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obj-$(CONFIG_MESON_MX_SOCINFO) += meson-mx-socinfo.o
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obj-$(CONFIG_MESON_EE_PM_DOMAINS) += meson-ee-pwrc.o
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obj-$(CONFIG_MESON_SECURE_PM_DOMAINS) += meson-secure-pwrc.o
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204
drivers/soc/amlogic/meson-secure-pwrc.c
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204
drivers/soc/amlogic/meson-secure-pwrc.c
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@ -0,0 +1,204 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Amlogic, Inc.
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* Author: Jianxin Pan <jianxin.pan@amlogic.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/io.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <dt-bindings/power/meson-a1-power.h>
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#include <linux/arm-smccc.h>
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#include <linux/firmware/meson/meson_sm.h>
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#define PWRC_ON 1
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#define PWRC_OFF 0
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struct meson_secure_pwrc_domain {
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struct generic_pm_domain base;
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unsigned int index;
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struct meson_secure_pwrc *pwrc;
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};
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struct meson_secure_pwrc {
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struct meson_secure_pwrc_domain *domains;
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struct genpd_onecell_data xlate;
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struct meson_sm_firmware *fw;
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};
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struct meson_secure_pwrc_domain_desc {
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unsigned int index;
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unsigned int flags;
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char *name;
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bool (*is_off)(struct meson_secure_pwrc_domain *pwrc_domain);
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};
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struct meson_secure_pwrc_domain_data {
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unsigned int count;
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struct meson_secure_pwrc_domain_desc *domains;
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};
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static bool pwrc_secure_is_off(struct meson_secure_pwrc_domain *pwrc_domain)
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{
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int is_off = 1;
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if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off,
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pwrc_domain->index, 0, 0, 0, 0) < 0)
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pr_err("failed to get power domain status\n");
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return is_off;
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}
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static int meson_secure_pwrc_off(struct generic_pm_domain *domain)
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{
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int ret = 0;
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struct meson_secure_pwrc_domain *pwrc_domain =
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container_of(domain, struct meson_secure_pwrc_domain, base);
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if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
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pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) {
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pr_err("failed to set power domain off\n");
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ret = -EINVAL;
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}
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return ret;
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}
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static int meson_secure_pwrc_on(struct generic_pm_domain *domain)
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{
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int ret = 0;
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struct meson_secure_pwrc_domain *pwrc_domain =
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container_of(domain, struct meson_secure_pwrc_domain, base);
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if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
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pwrc_domain->index, PWRC_ON, 0, 0, 0) < 0) {
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pr_err("failed to set power domain on\n");
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ret = -EINVAL;
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}
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return ret;
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}
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#define SEC_PD(__name, __flag) \
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[PWRC_##__name##_ID] = \
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{ \
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.name = #__name, \
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.index = PWRC_##__name##_ID, \
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.is_off = pwrc_secure_is_off, \
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.flags = __flag, \
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}
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static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = {
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SEC_PD(DSPA, 0),
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SEC_PD(DSPB, 0),
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/* UART should keep working in ATF after suspend and before resume */
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SEC_PD(UART, GENPD_FLAG_ALWAYS_ON),
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/* DMC is for DDR PHY ana/dig and DMC, and should be always on */
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SEC_PD(DMC, GENPD_FLAG_ALWAYS_ON),
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SEC_PD(I2C, 0),
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SEC_PD(PSRAM, 0),
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SEC_PD(ACODEC, 0),
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SEC_PD(AUDIO, 0),
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SEC_PD(OTP, 0),
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SEC_PD(DMA, 0),
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SEC_PD(SD_EMMC, 0),
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SEC_PD(RAMA, 0),
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/* SRAMB is used as ATF runtime memory, and should be always on */
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SEC_PD(RAMB, GENPD_FLAG_ALWAYS_ON),
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SEC_PD(IR, 0),
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SEC_PD(SPICC, 0),
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SEC_PD(SPIFC, 0),
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SEC_PD(USB, 0),
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/* NIC is for the Arm NIC-400 interconnect, and should be always on */
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SEC_PD(NIC, GENPD_FLAG_ALWAYS_ON),
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SEC_PD(PDMIN, 0),
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SEC_PD(RSA, 0),
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};
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static int meson_secure_pwrc_probe(struct platform_device *pdev)
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{
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int i;
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struct device_node *sm_np;
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struct meson_secure_pwrc *pwrc;
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const struct meson_secure_pwrc_domain_data *match;
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match = of_device_get_match_data(&pdev->dev);
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if (!match) {
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dev_err(&pdev->dev, "failed to get match data\n");
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return -ENODEV;
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}
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sm_np = of_find_compatible_node(NULL, NULL, "amlogic,meson-gxbb-sm");
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if (!sm_np) {
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dev_err(&pdev->dev, "no secure-monitor node\n");
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return -ENODEV;
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}
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pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
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if (!pwrc)
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return -ENOMEM;
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pwrc->fw = meson_sm_get(sm_np);
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of_node_put(sm_np);
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if (!pwrc->fw)
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return -EPROBE_DEFER;
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pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count,
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sizeof(*pwrc->xlate.domains),
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GFP_KERNEL);
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if (!pwrc->xlate.domains)
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return -ENOMEM;
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pwrc->domains = devm_kcalloc(&pdev->dev, match->count,
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sizeof(*pwrc->domains), GFP_KERNEL);
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if (!pwrc->domains)
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return -ENOMEM;
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pwrc->xlate.num_domains = match->count;
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platform_set_drvdata(pdev, pwrc);
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for (i = 0 ; i < match->count ; ++i) {
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struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
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if (!match->domains[i].index)
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continue;
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dom->pwrc = pwrc;
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dom->index = match->domains[i].index;
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dom->base.name = match->domains[i].name;
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dom->base.flags = match->domains[i].flags;
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dom->base.power_on = meson_secure_pwrc_on;
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dom->base.power_off = meson_secure_pwrc_off;
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pm_genpd_init(&dom->base, NULL, match->domains[i].is_off(dom));
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pwrc->xlate.domains[i] = &dom->base;
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}
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return of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate);
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}
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static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = {
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.domains = a1_pwrc_domains,
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.count = ARRAY_SIZE(a1_pwrc_domains),
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};
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static const struct of_device_id meson_secure_pwrc_match_table[] = {
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{
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.compatible = "amlogic,meson-a1-pwrc",
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.data = &meson_secure_a1_pwrc_data,
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},
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{ /* sentinel */ }
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};
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static struct platform_driver meson_secure_pwrc_driver = {
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.probe = meson_secure_pwrc_probe,
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.driver = {
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.name = "meson_secure_pwrc",
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.of_match_table = meson_secure_pwrc_match_table,
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},
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};
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builtin_platform_driver(meson_secure_pwrc_driver);
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32
include/dt-bindings/power/meson-a1-power.h
Normal file
32
include/dt-bindings/power/meson-a1-power.h
Normal file
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@ -0,0 +1,32 @@
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/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc.
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* Author: Jianxin Pan <jianxin.pan@amlogic.com>
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*/
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#ifndef _DT_BINDINGS_MESON_A1_POWER_H
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#define _DT_BINDINGS_MESON_A1_POWER_H
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#define PWRC_DSPA_ID 8
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#define PWRC_DSPB_ID 9
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#define PWRC_UART_ID 10
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#define PWRC_DMC_ID 11
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#define PWRC_I2C_ID 12
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#define PWRC_PSRAM_ID 13
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#define PWRC_ACODEC_ID 14
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#define PWRC_AUDIO_ID 15
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#define PWRC_OTP_ID 16
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#define PWRC_DMA_ID 17
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#define PWRC_SD_EMMC_ID 18
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#define PWRC_RAMA_ID 19
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#define PWRC_RAMB_ID 20
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#define PWRC_IR_ID 21
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#define PWRC_SPICC_ID 22
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#define PWRC_SPIFC_ID 23
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#define PWRC_USB_ID 24
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#define PWRC_NIC_ID 25
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#define PWRC_PDMIN_ID 26
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#define PWRC_RSA_ID 27
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#define PWRC_MAX_ID 28
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#endif
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@ -12,6 +12,8 @@ enum {
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SM_EFUSE_WRITE,
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SM_EFUSE_USER_MAX,
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SM_GET_CHIP_ID,
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SM_A1_PWRC_SET,
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SM_A1_PWRC_GET,
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};
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struct meson_sm_firmware;
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