forked from luck/tmp_suning_uos_patched
perf tools: Fallback to reading sysfs to get cacheline size
On systems where sysconf(_SC_LEVEL1_DCACHE_LINESIZE) is not available, such as musl LIBC and Android's bionic libc. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Chris Phlipot <cphlipot0@gmail.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Wang Nan <wangnan0@huawei.com> Link: http://lkml.kernel.org/n/tip-772obxzby758g7m2wmzcejxz@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -497,6 +497,16 @@ void pthread__unblock_sigwinch(void)
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pthread_sigmask(SIG_UNBLOCK, &set, NULL);
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}
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#ifdef _SC_LEVEL1_DCACHE_LINESIZE
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#define cache_line_size(cacheline_sizep) *cacheline_sizep = sysconf(_SC_LEVEL1_DCACHE_LINESIZE)
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#else
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static void cache_line_size(int *cacheline_sizep)
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{
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if (sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", cacheline_sizep))
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perror("cannot determine cache line size");
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}
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#endif
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int main(int argc, const char **argv)
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{
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const char *cmd;
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@ -509,7 +519,7 @@ int main(int argc, const char **argv)
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/* The page_size is placed in util object. */
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page_size = sysconf(_SC_PAGE_SIZE);
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cacheline_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
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cache_line_size(&cacheline_size);
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if (sysctl__read_int("kernel/perf_event_max_stack", &value) == 0)
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sysctl_perf_event_max_stack = value;
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