forked from luck/tmp_suning_uos_patched
KVM: x86: avoid large stack allocations in em_fxrstor
em_fxstor previously called fxstor_fixup. Both created instances of struct fxregs_state on the stack, which triggered the warning: arch/x86/kvm/emulate.c:4018:12: warning: stack frame size of 1080 bytes in function 'em_fxrstor' [-Wframe-larger-than=] static int em_fxrstor(struct x86_emulate_ctxt *ctxt) ^ with CONFIG_FRAME_WARN set to 1024. This patch does the fixup in em_fxstor now, avoiding one additional struct fxregs_state, and now fxstor_fixup can be removed as it has no other call sites. Further, the calculation for offsets into xmm_space can be shared between em_fxstor and em_fxsave. Signed-off-by: Nick Desaulniers <nick.desaulniers@gmail.com> [Clean up calculation of offsets and fix it for 64-bit mode. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -3940,6 +3940,25 @@ static int check_fxsr(struct x86_emulate_ctxt *ctxt)
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return X86EMUL_CONTINUE;
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}
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/*
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* Hardware doesn't save and restore XMM 0-7 without CR4.OSFXSR, but does save
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* and restore MXCSR.
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*/
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static size_t __fxstate_size(int nregs)
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{
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return offsetof(struct fxregs_state, xmm_space[0]) + nregs * 16;
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}
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static inline size_t fxstate_size(struct x86_emulate_ctxt *ctxt)
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{
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bool cr4_osfxsr;
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if (ctxt->mode == X86EMUL_MODE_PROT64)
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return __fxstate_size(16);
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cr4_osfxsr = ctxt->ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR;
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return __fxstate_size(cr4_osfxsr ? 8 : 0);
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}
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/*
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* FXSAVE and FXRSTOR have 4 different formats depending on execution mode,
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* 1) 16 bit mode
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@ -3961,7 +3980,6 @@ static int check_fxsr(struct x86_emulate_ctxt *ctxt)
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static int em_fxsave(struct x86_emulate_ctxt *ctxt)
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{
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struct fxregs_state fx_state;
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size_t size;
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int rc;
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rc = check_fxsr(ctxt);
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@ -3977,68 +3995,42 @@ static int em_fxsave(struct x86_emulate_ctxt *ctxt)
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if (rc != X86EMUL_CONTINUE)
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return rc;
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if (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR)
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size = offsetof(struct fxregs_state, xmm_space[8 * 16/4]);
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else
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size = offsetof(struct fxregs_state, xmm_space[0]);
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return segmented_write_std(ctxt, ctxt->memop.addr.mem, &fx_state, size);
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}
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static int fxrstor_fixup(struct x86_emulate_ctxt *ctxt,
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struct fxregs_state *new)
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{
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int rc = X86EMUL_CONTINUE;
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struct fxregs_state old;
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rc = asm_safe("fxsave %[fx]", , [fx] "+m"(old));
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if (rc != X86EMUL_CONTINUE)
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return rc;
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/*
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* 64 bit host will restore XMM 8-15, which is not correct on non-64
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* bit guests. Load the current values in order to preserve 64 bit
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* XMMs after fxrstor.
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*/
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#ifdef CONFIG_X86_64
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/* XXX: accessing XMM 8-15 very awkwardly */
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memcpy(&new->xmm_space[8 * 16/4], &old.xmm_space[8 * 16/4], 8 * 16);
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#endif
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/*
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* Hardware doesn't save and restore XMM 0-7 without CR4.OSFXSR, but
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* does save and restore MXCSR.
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*/
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if (!(ctxt->ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR))
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memcpy(new->xmm_space, old.xmm_space, 8 * 16);
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return rc;
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return segmented_write_std(ctxt, ctxt->memop.addr.mem, &fx_state,
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fxstate_size(ctxt));
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}
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static int em_fxrstor(struct x86_emulate_ctxt *ctxt)
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{
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struct fxregs_state fx_state;
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int rc;
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size_t size;
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rc = check_fxsr(ctxt);
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if (rc != X86EMUL_CONTINUE)
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return rc;
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rc = segmented_read_std(ctxt, ctxt->memop.addr.mem, &fx_state, 512);
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if (rc != X86EMUL_CONTINUE)
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return rc;
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if (fx_state.mxcsr >> 16)
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return emulate_gp(ctxt, 0);
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ctxt->ops->get_fpu(ctxt);
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if (ctxt->mode < X86EMUL_MODE_PROT64)
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rc = fxrstor_fixup(ctxt, &fx_state);
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size = fxstate_size(ctxt);
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if (size < __fxstate_size(16)) {
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rc = asm_safe("fxsave %[fx]", , [fx] "+m"(fx_state));
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if (rc != X86EMUL_CONTINUE)
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goto out;
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}
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rc = segmented_read_std(ctxt, ctxt->memop.addr.mem, &fx_state, size);
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if (rc != X86EMUL_CONTINUE)
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goto out;
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if (fx_state.mxcsr >> 16) {
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rc = emulate_gp(ctxt, 0);
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goto out;
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}
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if (rc == X86EMUL_CONTINUE)
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rc = asm_safe("fxrstor %[fx]", : [fx] "m"(fx_state));
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out:
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ctxt->ops->put_fpu(ctxt);
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return rc;
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