forked from luck/tmp_suning_uos_patched
sh: Add MigoR header file
This patch adds a MigoR specific header file. We may want to use a cpu specific header file instead, but this will do for now. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -14,6 +14,7 @@
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#include <asm/machvec.h>
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#include <asm/io.h>
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#include <asm/sh_keysc.h>
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#include <asm/migor.h>
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/* Address IRQ Size Bus Description
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* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
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@ -87,14 +88,6 @@ static int __init migor_devices_setup(void)
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}
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__initcall(migor_devices_setup);
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#define PORT_PJCR 0xA4050110UL
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#define PORT_PSELA 0xA405014EUL
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#define PORT_PYCR 0xA405014AUL
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#define PORT_PZCR 0xA405014CUL
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#define PORT_HIZCRA 0xA4050158UL
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#define PORT_HIZCRC 0xA405015CUL
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#define MSTPCR2 0xA4150038UL
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static void __init migor_setup(char **cmdline_p)
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{
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/* SMC91C111 - Enable IRQ0 */
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58
include/asm-sh/migor.h
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58
include/asm-sh/migor.h
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@ -0,0 +1,58 @@
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#ifndef __ASM_SH_MIGOR_H
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#define __ASM_SH_MIGOR_H
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/*
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* linux/include/asm-sh/migor.h
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*
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* Copyright (C) 2008 Renesas Solutions
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*
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* Portions Copyright (C) 2007 Nobuhiro Iwamatsu
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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*/
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#include <asm/addrspace.h>
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/* GPIO */
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#define MSTPCR0 0xa4150030
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#define MSTPCR1 0xa4150034
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#define MSTPCR2 0xa4150038
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#define PORT_PACR 0xa4050100
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#define PORT_PDCR 0xa4050106
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#define PORT_PECR 0xa4050108
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#define PORT_PHCR 0xa405010e
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#define PORT_PJCR 0xa4050110
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#define PORT_PKCR 0xa4050112
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#define PORT_PLCR 0xa4050114
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#define PORT_PMCR 0xa4050116
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#define PORT_PRCR 0xa405011c
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#define PORT_PWCR 0xa4050146
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#define PORT_PXCR 0xa4050148
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#define PORT_PYCR 0xa405014a
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#define PORT_PZCR 0xa405014c
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#define PORT_PADR 0xa4050120
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#define PORT_PWDR 0xa4050166
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#define PORT_HIZCRA 0xa4050158
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#define PORT_HIZCRC 0xa405015c
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#define PORT_MSELCRB 0xa4050182
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#define MSTPCR1 0xa4150034
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#define MSTPCR2 0xa4150038
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#define PORT_PSELA 0xa405014e
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#define PORT_PSELB 0xa4050150
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#define PORT_PSELC 0xa4050152
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#define PORT_PSELD 0xa4050154
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#define PORT_HIZCRA 0xa4050158
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#define PORT_HIZCRB 0xa405015a
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#define PORT_HIZCRC 0xa405015c
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#define BSC_CS6ABCR 0xfec1001c
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#endif /* __ASM_SH_MIGOR_H */
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