AcoSail/kernel_optimize_test
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x86/paravirt, 64-bit: make load_gs_index() a paravirt operation

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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: xen-devel <xen-devel@lists.xensource.com>
Cc: Stephen Tweedie <sct@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Jeremy Fitzhardinge 2008-06-25 00:19:32 -04:00 committed by Ingo Molnar
parent fab58420ac
commit 9f9d489a3e
5 changed files with 18 additions and 4 deletions
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4
arch/x86/kernel/entry_64.S
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@ -944,7 +944,7 @@ KPROBE_END(error_entry)
/* Reload gs selector with exception handling */
/* edi: new selector */
ENTRY(load_gs_index)
ENTRY(native_load_gs_index)
CFI_STARTPROC
pushf
CFI_ADJUST_CFA_OFFSET 8
@ -958,7 +958,7 @@ gs_change:
CFI_ADJUST_CFA_OFFSET -8
ret
CFI_ENDPROC
ENDPROC(load_gs_index)
ENDPROC(native_load_gs_index)
.section __ex_table,"a"
.align 8

3
arch/x86/kernel/paravirt.c
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@ -329,6 +329,9 @@ struct pv_cpu_ops pv_cpu_ops = {
.store_idt = native_store_idt,
.store_tr = native_store_tr,
.load_tls = native_load_tls,
#ifdef CONFIG_X86_64
.load_gs_index = native_load_gs_index,
#endif
.write_ldt_entry = native_write_ldt_entry,
.write_gdt_entry = native_write_gdt_entry,
.write_idt_entry = native_write_idt_entry,

2
include/asm-x86/elf.h
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@ -83,9 +83,9 @@ extern unsigned int vdso_enabled;
(((x)->e_machine == EM_386) || ((x)->e_machine == EM_486))
#include <asm/processor.h>
#include <asm/system.h>
#ifdef CONFIG_X86_32
#include <asm/system.h> /* for savesegment */
#include <asm/desc.h>
#define elf_check_arch(x) elf_check_arch_ia32(x)

10
include/asm-x86/paravirt.h
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@ -115,6 +115,9 @@ struct pv_cpu_ops {
void (*set_ldt)(const void *desc, unsigned entries);
unsigned long (*store_tr)(void);
void (*load_tls)(struct thread_struct *t, unsigned int cpu);
#ifdef CONFIG_X86_64
void (*load_gs_index)(unsigned int idx);
#endif
void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
const void *desc);
void (*write_gdt_entry)(struct desc_struct *,
@ -845,6 +848,13 @@ static inline void load_TLS(struct thread_struct *t, unsigned cpu)
PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
}
#ifdef CONFIG_X86_64
static inline void load_gs_index(unsigned int gs)
{
PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
}
#endif
static inline void write_ldt_entry(struct desc_struct *dt, int entry,
const void *desc)
{

3
include/asm-x86/system.h
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@ -136,7 +136,7 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
#define set_base(ldt, base) _set_base(((char *)&(ldt)) , (base))
#define set_limit(ldt, limit) _set_limit(((char *)&(ldt)) , ((limit)-1))
extern void load_gs_index(unsigned);
extern void native_load_gs_index(unsigned);
/*
* Load a segment. Fall back on loading the zero
@ -282,6 +282,7 @@ static inline void native_wbinvd(void)
#ifdef CONFIG_X86_64
#define read_cr8() (native_read_cr8())
#define write_cr8(x) (native_write_cr8(x))
#define load_gs_index native_load_gs_index
#endif
/* Clear the 'TS' bit */