forked from luck/tmp_suning_uos_patched
Merge branch 'irqchip/stacked-irq_set_wake' into irqchip/core
Conflicts: drivers/irqchip/irq-gic.c
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commit
a01e7b3258
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@ -252,11 +252,6 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static int sh73a0_set_wake(struct irq_data *data, unsigned int on)
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{
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return 0; /* always allow wakeup */
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}
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#define PINTER0_PHYS 0xe69000a0
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#define PINTER1_PHYS 0xe69000a4
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#define PINTER0_VIRT IOMEM(0xe69000a0)
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@ -318,8 +313,8 @@ void __init sh73a0_init_irq(void)
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void __iomem *gic_cpu_base = IOMEM(0xf0000100);
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void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE);
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gic_init(0, 29, gic_dist_base, gic_cpu_base);
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gic_arch_extn.irq_set_wake = sh73a0_set_wake;
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register_intc_controller(&intcs_desc);
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register_intc_controller(&intc_pint0_desc);
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@ -713,18 +713,13 @@ void __init r8a7779_init_late(void)
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}
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#ifdef CONFIG_USE_OF
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static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
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{
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return 0; /* always allow wakeup */
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}
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void __init r8a7779_init_irq_dt(void)
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{
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#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
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void __iomem *gic_dist_base = ioremap_nocache(0xf0001000, 0x1000);
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void __iomem *gic_cpu_base = ioremap_nocache(0xf0000100, 0x1000);
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#endif
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gic_arch_extn.irq_set_wake = r8a7779_set_wake;
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE);
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#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
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gic_init(0, 29, gic_dist_base, gic_cpu_base);
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@ -52,7 +52,7 @@ void ux500_restart(enum reboot_mode mode, const char *cmd)
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*/
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void __init ux500_init_irq(void)
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{
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gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
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irqchip_init();
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/*
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@ -186,7 +186,7 @@ static void __init zynq_map_io(void)
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static void __init zynq_irq_init(void)
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{
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gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
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gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
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irqchip_init();
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}
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@ -880,6 +880,11 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
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.xlate = gic_irq_domain_xlate,
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};
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void gic_set_irqchip_flags(unsigned long flags)
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{
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gic_chip.flags |= flags;
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}
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void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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void __iomem *dist_base, void __iomem *cpu_base,
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u32 percpu_offset, struct device_node *node)
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@ -97,6 +97,7 @@ struct device_node;
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extern struct irq_chip gic_arch_extn;
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void gic_set_irqchip_flags(unsigned long flags);
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void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
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u32 offset, struct device_node *);
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void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
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