forked from luck/tmp_suning_uos_patched
kvm: apic: Flush TLB after APIC mode/address change if VPIDs are in use
Currently, KVM flushes the TLB after a change to the APIC access page address or the APIC mode when EPT mode is enabled. However, even in shadow paging mode, a TLB flush is needed if VPIDs are being used, as specified in the Intel SDM Section 29.4.5. So replace vmx_flush_tlb_ept_only() with vmx_flush_tlb(), which will flush if either EPT or VPIDs are in use. Signed-off-by: Junaid Shahid <junaids@google.com> Reviewed-by: Jim Mattson <jmattson@google.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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@ -4544,12 +4544,6 @@ static void vmx_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
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__vmx_flush_tlb(vcpu, to_vmx(vcpu)->vpid, invalidate_gpa);
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}
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static void vmx_flush_tlb_ept_only(struct kvm_vcpu *vcpu)
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{
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if (enable_ept)
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vmx_flush_tlb(vcpu, true);
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}
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static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
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{
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ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits;
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@ -9278,7 +9272,7 @@ static void vmx_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set)
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} else {
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sec_exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
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sec_exec_control |= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
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vmx_flush_tlb_ept_only(vcpu);
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vmx_flush_tlb(vcpu, true);
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}
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vmcs_write32(SECONDARY_VM_EXEC_CONTROL, sec_exec_control);
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@ -9306,7 +9300,7 @@ static void vmx_set_apic_access_page_addr(struct kvm_vcpu *vcpu, hpa_t hpa)
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!nested_cpu_has2(get_vmcs12(&vmx->vcpu),
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SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
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vmcs_write64(APIC_ACCESS_ADDR, hpa);
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vmx_flush_tlb_ept_only(vcpu);
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vmx_flush_tlb(vcpu, true);
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}
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}
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@ -11220,7 +11214,7 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
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}
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} else if (nested_cpu_has2(vmcs12,
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SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
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vmx_flush_tlb_ept_only(vcpu);
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vmx_flush_tlb(vcpu, true);
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}
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/*
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@ -12073,7 +12067,7 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
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} else if (!nested_cpu_has_ept(vmcs12) &&
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nested_cpu_has2(vmcs12,
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SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
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vmx_flush_tlb_ept_only(vcpu);
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vmx_flush_tlb(vcpu, true);
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}
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/* This is needed for same reason as it was needed in prepare_vmcs02 */
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