forked from luck/tmp_suning_uos_patched
musb: add high bandwidth ISO support
Tested on OMAP3 host side with Creative (Live! Cam Optia) USB camera which uses high bandwidth isochronous IN endpoints. FIFO mode 4 is updated to provide the needed 4K endpoint buffer without breaking the g_nokia composite gadget configuration. (This is the only gadget driver known to use enough endpoints to notice the change.) Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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parent
d1043a2697
commit
a483d7068f
drivers/usb/musb
@ -1084,14 +1084,13 @@ static struct fifo_cfg __initdata mode_4_cfg[] = {
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{ .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 13, .style = FIFO_TX, .maxpacket = 512, },
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{ .hw_ep_num = 13, .style = FIFO_RX, .maxpacket = 512, },
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{ .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, },
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{ .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, },
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{ .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, },
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{ .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, },
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{ .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, },
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{ .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, },
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{ .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, },
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{ .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
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{ .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
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};
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@ -1351,11 +1350,11 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
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}
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if (reg & MUSB_CONFIGDATA_HBRXE) {
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strcat(aInfo, ", HB-ISO Rx");
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strcat(aInfo, " (X)"); /* no driver support */
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musb->hb_iso_rx = true;
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}
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if (reg & MUSB_CONFIGDATA_HBTXE) {
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strcat(aInfo, ", HB-ISO Tx");
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strcat(aInfo, " (X)"); /* no driver support */
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musb->hb_iso_tx = true;
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}
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if (reg & MUSB_CONFIGDATA_SOFTCONE)
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strcat(aInfo, ", SoftConn");
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@ -395,6 +395,9 @@ struct musb {
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unsigned is_multipoint:1;
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unsigned ignore_disconnect:1; /* during bus resets */
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unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
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unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
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#ifdef C_MP_TX
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unsigned bulk_split:1;
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#define can_bulk_split(musb,type) \
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@ -605,7 +605,8 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)
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musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg);
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musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg);
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/* NOTE: bulk combining rewrites high bits of maxpacket */
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musb_writew(ep->regs, MUSB_RXMAXP, qh->maxpacket);
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musb_writew(ep->regs, MUSB_RXMAXP,
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qh->maxpacket | ((qh->hb_mult - 1) << 11));
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ep->rx_reinit = 0;
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}
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@ -627,9 +628,10 @@ static bool musb_tx_dma_program(struct dma_controller *dma,
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csr = musb_readw(epio, MUSB_TXCSR);
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if (length > pkt_size) {
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mode = 1;
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csr |= MUSB_TXCSR_AUTOSET
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| MUSB_TXCSR_DMAMODE
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| MUSB_TXCSR_DMAENAB;
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csr |= MUSB_TXCSR_DMAMODE | MUSB_TXCSR_DMAENAB;
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/* autoset shouldn't be set in high bandwidth */
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if (qh->hb_mult == 1)
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csr |= MUSB_TXCSR_AUTOSET;
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} else {
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mode = 0;
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csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAMODE);
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@ -1497,6 +1499,10 @@ void musb_host_rx(struct musb *musb, u8 epnum)
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/* packet error reported later */
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iso_err = true;
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}
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} else if (rx_csr & MUSB_RXCSR_INCOMPRX) {
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DBG(3, "end %d high bandwidth incomplete ISO packet RX\n",
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epnum);
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status = -EPROTO;
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}
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/* faults abort the transfer */
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@ -1704,7 +1710,11 @@ void musb_host_rx(struct musb *musb, u8 epnum)
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val &= ~MUSB_RXCSR_H_AUTOREQ;
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else
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val |= MUSB_RXCSR_H_AUTOREQ;
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val |= MUSB_RXCSR_AUTOCLEAR | MUSB_RXCSR_DMAENAB;
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val |= MUSB_RXCSR_DMAENAB;
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/* autoclear shouldn't be set in high bandwidth */
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if (qh->hb_mult == 1)
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val |= MUSB_RXCSR_AUTOCLEAR;
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musb_writew(epio, MUSB_RXCSR,
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MUSB_RXCSR_H_WZC_BITS | val);
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@ -1790,9 +1800,10 @@ static int musb_schedule(
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continue;
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if (is_in)
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diff = hw_ep->max_packet_sz_rx - qh->maxpacket;
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diff = hw_ep->max_packet_sz_rx;
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else
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diff = hw_ep->max_packet_sz_tx - qh->maxpacket;
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diff = hw_ep->max_packet_sz_tx;
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diff -= (qh->maxpacket * qh->hb_mult);
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if (diff >= 0 && best_diff > diff) {
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best_diff = diff;
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@ -1895,15 +1906,27 @@ static int musb_urb_enqueue(
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qh->is_ready = 1;
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qh->maxpacket = le16_to_cpu(epd->wMaxPacketSize);
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qh->type = usb_endpoint_type(epd);
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/* no high bandwidth support yet */
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if (qh->maxpacket & ~0x7ff) {
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/* Bits 11 & 12 of wMaxPacketSize encode high bandwidth multiplier.
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* Some musb cores don't support high bandwidth ISO transfers; and
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* we don't (yet!) support high bandwidth interrupt transfers.
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*/
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qh->hb_mult = 1 + ((qh->maxpacket >> 11) & 0x03);
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if (qh->hb_mult > 1) {
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int ok = (qh->type == USB_ENDPOINT_XFER_ISOC);
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if (ok)
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ok = (usb_pipein(urb->pipe) && musb->hb_iso_rx)
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|| (usb_pipeout(urb->pipe) && musb->hb_iso_tx);
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if (!ok) {
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ret = -EMSGSIZE;
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goto done;
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}
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qh->maxpacket &= 0x7ff;
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}
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qh->epnum = usb_endpoint_num(epd);
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qh->type = usb_endpoint_type(epd);
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/* NOTE: urb->dev->devnum is wrong during SET_ADDRESS */
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qh->addr_reg = (u8) usb_pipedevice(urb->pipe);
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@ -67,6 +67,7 @@ struct musb_qh {
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u8 is_ready; /* safe to modify hw_ep */
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u8 type; /* XFERTYPE_* */
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u8 epnum;
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u8 hb_mult; /* high bandwidth pkts per uf */
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u16 maxpacket;
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u16 frame; /* for periodic schedule */
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unsigned iso_idx; /* in urb->iso_frame_desc[] */
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