forked from luck/tmp_suning_uos_patched
dt-binding: spi: add NPCM PSPI reset binding
Add NPCM Peripheral SPI reset binding documentation, Removing unnecessary aliases use. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200115162301.235926-4-tmaimon77@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -12,6 +12,7 @@ Required properties:
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- clock-names: Should be "clk_apb5".
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- pinctrl-names : a pinctrl state named "default" must be defined.
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- pinctrl-0 : phandle referencing pin configuration of the device.
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- resets : phandle to the reset control for this device.
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- cs-gpios: Specifies the gpio pins to be used for chipselects.
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See: Documentation/devicetree/bindings/spi/spi-bus.txt
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@ -19,16 +20,6 @@ Optional properties:
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- clock-frequency : Input clock frequency to the PSPI block in Hz.
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Default is 25000000 Hz.
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Aliases:
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- All the SPI controller nodes should be represented in the aliases node using
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the following format 'spi{n}' withe the correct numbered in "aliases" node.
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Example:
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aliases {
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spi0 = &spi0;
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};
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spi0: spi@f0200000 {
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compatible = "nuvoton,npcm750-pspi";
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reg = <0xf0200000 0x1000>;
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@ -39,5 +30,6 @@ spi0: spi@f0200000 {
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk NPCM7XX_CLK_APB5>;
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clock-names = "clk_apb5";
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resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>
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cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
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};
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