AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Merge branch 'dt' of git://github.com/hzhuang1/linux into next/dt

Browse Source 
* 'dt' of git://github.com/hzhuang1/linux: (6 commits)
  Document: devicetree: add OF documents for arch-mmp
  ARM: dts: append DTS file of pxa168
  ARM: mmp: append OF support on pxa168
  ARM: mmp: enable rtc clk in pxa168
  i2c: pxa: add OF support
  serial: pxa: add OF support

  (plus update to v3.3-rc6)
This commit is contained in:
Olof Johansson 2012-03-08 09:27:07 -08:00
commit a58f67e70a
205 changed files with 1734 additions and 652 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/arm/mrvl.txt Normal file
View File

@ -0,0 +1,6 @@
Marvell Platforms Device Tree Bindings
----------------------------------------------------
PXA168 Aspenite Board
Required root node properties:
- compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";

23
Documentation/devicetree/bindings/gpio/mrvl-gpio.txt Normal file
View File

@ -0,0 +1,23 @@
* Marvell PXA GPIO controller
Required properties:
- compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"
- reg : Address and length of the register set for the device
- interrupts : Should be the port interrupt shared by all gpio pins, if
- interrupt-name : Should be the name of irq resource.
one number.
- gpio-controller : Marks the device node as a gpio controller.
- #gpio-cells : Should be one. It is the pin number.
Example:
gpio: gpio@d4019000 {
compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
reg = <0xd4019000 0x1000>;
interrupts = <49>, <17>, <18>;
interrupt-name = "gpio_mux", "gpio0", "gpio1";
gpio-controller;
#gpio-cells = <1>;
interrupt-controller;
#interrupt-cells = <1>;
};

37
Documentation/devicetree/bindings/i2c/mrvl-i2c.txt Normal file
View File

@ -0,0 +1,37 @@
* I2C
Required properties :
- reg : Offset and length of the register set for the device
- compatible : should be "mrvl,mmp-twsi" where CHIP is the name of a
compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.
For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
as shown in the example below.
Recommended properties :
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
status register of i2c controller instead.
- mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
Examples:
twsi1: i2c@d4011000 {
compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
reg = <0xd4011000 0x1000>;
interrupts = <7>;
mrvl,i2c-fast-mode;
};
twsi2: i2c@d4025000 {
compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
reg = <0xd4025000 0x1000>;
interrupts = <58>;
};

17
Documentation/devicetree/bindings/rtc/sa1100-rtc.txt Normal file
View File

@ -0,0 +1,17 @@
* Marvell Real Time Clock controller
Required properties:
- compatible: should be "mrvl,sa1100-rtc"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: Should be two. The first interrupt number is the rtc alarm
interrupt and the second interrupt number is the rtc hz interrupt.
- interrupt-names: Assign name of irq resource.
Example:
rtc: rtc@d4010000 {
compatible = "mrvl,mmp-rtc";
reg = <0xd4010000 0x1000>;
interrupts = <5>, <6>;
interrupt-name = "rtc 1Hz", "rtc alarm";
};

4
Documentation/devicetree/bindings/serial/mrvl-serial.txt Normal file
View File

@ -0,0 +1,4 @@
PXA UART controller
Required properties:
- compatible : should be "mrvl,mmp-uart" or "mrvl,pxa-uart".

6
MAINTAINERS
View File

@ -3789,7 +3789,7 @@ F: Documentation/kdump/
KERNEL AUTOMOUNTER v4 (AUTOFS4)
M: Ian Kent <raven@themaw.net>
L: autofs@linux.kernel.org
L: autofs@vger.kernel.org
S: Maintained
F: fs/autofs4/
@ -4694,7 +4694,7 @@ NTFS FILESYSTEM
M: Anton Altaparmakov <anton@tuxera.com>
L: linux-ntfs-dev@lists.sourceforge.net
W: http://www.tuxera.com/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs-2.6.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs.git
S: Supported
F: Documentation/filesystems/ntfs.txt
F: fs/ntfs/
@ -7280,7 +7280,7 @@ WATCHDOG DEVICE DRIVERS
M: Wim Van Sebroeck <wim@iguana.be>
L: linux-watchdog@vger.kernel.org
W: http://www.linux-watchdog.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog.git
T: git git://www.linux-watchdog.org/linux-watchdog.git
S: Maintained
F: Documentation/watchdog/
F: drivers/watchdog/

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 3
SUBLEVEL = 0
EXTRAVERSION = -rc5
EXTRAVERSION = -rc6
NAME = Saber-toothed Squirrel
# *DOCUMENTATION*

38
arch/arm/boot/dts/pxa168-aspenite.dts Normal file
View File

@ -0,0 +1,38 @@
/*
* Copyright (C) 2012 Marvell Technology Group Ltd.
* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
/dts-v1/;
/include/ "pxa168.dtsi"
/ {
model = "Marvell PXA168 Aspenite Development Board";
compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
chosen {
bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
};
memory {
reg = <0x00000000 0x04000000>;
};
soc {
apb@d4000000 {
uart1: uart@d4017000 {
status = "okay";
};
twsi1: i2c@d4011000 {
status = "okay";
};
rtc: rtc@d4010000 {
status = "okay";
};
};
};
};

98
arch/arm/boot/dts/pxa168.dtsi Normal file
View File

@ -0,0 +1,98 @@
/*
* Copyright (C) 2012 Marvell Technology Group Ltd.
* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
/include/ "skeleton.dtsi"
/ {
aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
i2c0 = &twsi1;
i2c1 = &twsi2;
};
intc: intc-interrupt-controller@d4282000 {
compatible = "mrvl,mmp-intc", "mrvl,intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0xd4282000 0x1000>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&intc>;
ranges;
apb@d4000000 { /* APB */
compatible = "mrvl,apb-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0xd4000000 0x00200000>;
ranges;
uart1: uart@d4017000 {
compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
reg = <0xd4017000 0x1000>;
interrupts = <27>;
status = "disabled";
};
uart2: uart@d4018000 {
compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
reg = <0xd4018000 0x1000>;
interrupts = <28>;
status = "disabled";
};
uart3: uart@d4026000 {
compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
reg = <0xd4026000 0x1000>;
interrupts = <29>;
status = "disabled";
};
gpio: gpio@d4019000 {
compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
reg = <0xd4019000 0x1000>;
interrupts = <49>;
interrupt-names = "gpio_mux";
gpio-controller;
#gpio-cells = <1>;
interrupt-controller;
#interrupt-cells = <1>;
};
twsi1: i2c@d4011000 {
compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
reg = <0xd4011000 0x1000>;
interrupts = <7>;
mrvl,i2c-fast-mode;
status = "disabled";
};
twsi2: i2c@d4025000 {
compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
reg = <0xd4025000 0x1000>;
interrupts = <58>;
status = "disabled";
};
rtc: rtc@d4010000 {
compatible = "mrvl,mmp-rtc";
reg = <0xd4010000 0x1000>;
interrupts = <5 6>;
interrupt-names = "rtc 1Hz", "rtc alarm";
status = "disabled";
};
};
};
};

2
arch/arm/mach-lpc32xx/include/mach/irqs.h
View File

@ -61,7 +61,7 @@
*/
#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)

25
arch/arm/mach-lpc32xx/irq.c
View File

@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
.event_group = &lpc32xx_event_pin_regs,
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
},
[IRQ_LPC32XX_GPI_28] = {
.event_group = &lpc32xx_event_pin_regs,
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
},
[IRQ_LPC32XX_GPIO_00] = {
.event_group = &lpc32xx_event_int_regs,
.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
if (state)
eventreg |= lpc32xx_events[d->irq].mask;
else
else {
eventreg &= ~lpc32xx_events[d->irq].mask;
/*
* When disabling the wakeup, clear the latched
* event
*/
__raw_writel(lpc32xx_events[d->irq].mask,
lpc32xx_events[d->irq].
event_group->rawstat_reg);
}
__raw_writel(eventreg,
lpc32xx_events[d->irq].event_group->enab_reg);
@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)
/* Setup SIC1 */
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
__raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
__raw_writel(SIC1_ATR_DEFAULT,
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
/* Setup SIC2 */
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
__raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
__raw_writel(SIC2_ATR_DEFAULT,
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
/* Configure supported IRQ's */
for (i = 0; i < NR_IRQS; i++) {

20
arch/arm/mach-lpc32xx/serial.c
View File

@ -88,6 +88,7 @@ struct uartinit {
char *uart_ck_name;
u32 ck_mode_mask;
void __iomem *pdiv_clk_reg;
resource_size_t mapbase;
};
static struct uartinit uartinit_data[] __initdata = {
@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
.ck_mode_mask =
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
.pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
.mapbase = LPC32XX_UART5_BASE,
},
#endif
#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
.ck_mode_mask =
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
.pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
.mapbase = LPC32XX_UART3_BASE,
},
#endif
#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
.ck_mode_mask =
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
.pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
.mapbase = LPC32XX_UART4_BASE,
},
#endif
#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
.ck_mode_mask =
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
.pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
.mapbase = LPC32XX_UART6_BASE,
},
#endif
};
@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)
/* pre-UART clock divider set to 1 */
__raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
/*
* Force a flush of the RX FIFOs to work around a
* HW bug
*/
puart = uartinit_data[i].mapbase;
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
__raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
j = LPC32XX_SUART_FIFO_SIZE;
while (j--)
tmp = __raw_readl(
LPC32XX_UART_DLL_FIFO(puart));
__raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
}
/* This needs to be done after all UART clocks are setup */
__raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) {
for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
/* Force a flush of the RX FIFOs to work around a HW bug */
puart = serial_std_platform_data[i].mapbase;
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));

10
arch/arm/mach-mmp/Kconfig
View File

@ -2,6 +2,16 @@ if ARCH_MMP
menu "Marvell PXA168/910/MMP2 Implmentations"
config MACH_MMP_DT
bool "Support MMP2 platforms from device tree"
select CPU_PXA168
select CPU_PXA910
select USE_OF
help
Include support for Marvell MMP2 based platforms using
the device tree. Needn't select any other machine while
MACH_MMP_DT is enabled.
config MACH_ASPENITE
bool "Marvell's PXA168 Aspenite Development Board"
select CPU_PXA168

1
arch/arm/mach-mmp/Makefile
View File

@ -18,5 +18,6 @@ obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
obj-$(CONFIG_MACH_FLINT) += flint.o
obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
obj-$(CONFIG_MACH_MMP_DT) += mmp-dt.o
obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
obj-$(CONFIG_MACH_GPLUGD) += gplugd.o

1
arch/arm/mach-mmp/aspenite.c
View File

@ -17,7 +17,6 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

75
arch/arm/mach-mmp/mmp-dt.c Normal file
View File

@ -0,0 +1,75 @@
/*
* linux/arch/arm/mach-mmp/mmp-dt.c
*
* Copyright (C) 2012 Marvell Technology Group Ltd.
* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* publishhed by the Free Software Foundation.
*/
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <mach/irqs.h>
#include "common.h"
extern struct sys_timer pxa168_timer;
extern void __init icu_init_irq(void);
static const struct of_dev_auxdata mmp_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL),
OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL),
OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4026000, "pxa2xx-uart.2", NULL),
OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),
OF_DEV_AUXDATA("mrvl,mmp-gpio", 0xd4019000, "pxa-gpio", NULL),
OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
{}
};
static int __init mmp_intc_add_irq_domain(struct device_node *np,
struct device_node *parent)
{
irq_domain_add_simple(np, 0);
return 0;
}
static int __init mmp_gpio_add_irq_domain(struct device_node *np,
struct device_node *parent)
{
irq_domain_add_simple(np, IRQ_GPIO_START);
return 0;
}
static const struct of_device_id mmp_irq_match[] __initconst = {
{ .compatible = "mrvl,mmp-intc", .data = mmp_intc_add_irq_domain, },
{ .compatible = "mrvl,mmp-gpio", .data = mmp_gpio_add_irq_domain, },
{}
};
static void __init mmp_dt_init(void)
{
of_irq_init(mmp_irq_match);
of_platform_populate(NULL, of_default_bus_match_table,
mmp_auxdata_lookup, NULL);
}
static const char *pxa168_dt_board_compat[] __initdata = {
"mrvl,pxa168-aspenite",
NULL,
};
DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)")
.map_io = mmp_map_io,
.init_irq = icu_init_irq,
.timer = &pxa168_timer,
.init_machine = mmp_dt_init,
.dt_compat = pxa168_dt_board_compat,
MACHINE_END

3
arch/arm/mach-mmp/pxa168.c
View File

@ -24,7 +24,6 @@
#include <mach/dma.h>
#include <mach/devices.h>
#include <mach/mfp.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <mach/pxa168.h>
@ -65,6 +64,7 @@ static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
static APBC_CLK(rtc, PXA168_RTC, 8, 32768);
static APMU_CLK(nand, NAND, 0x19b, 156000000);
static APMU_CLK(lcd, LCD, 0x7f, 312000000);
@ -93,6 +93,7 @@ static struct clk_lookup pxa168_clkregs[] = {
INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
static int __init pxa168_init(void)

1
arch/arm/mach-mmp/tavorevb.c
View File

@ -12,7 +12,6 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/smc91x.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

4
arch/arm/mach-omap1/board-innovator.c
View File

@ -416,13 +416,13 @@ static void __init innovator_init(void)
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
omap1_usb_init(&innovator1510_usb_config);
innovator_config[1].data = &innovator1510_lcd_config;
innovator_config[0].data = &innovator1510_lcd_config;
}
#endif
#ifdef CONFIG_ARCH_OMAP16XX
if (cpu_is_omap1610()) {
omap1_usb_init(&h2_usb_config);
innovator_config[1].data = &innovator1610_lcd_config;
innovator_config[0].data = &innovator1610_lcd_config;
}
#endif
omap_board_config = innovator_config;

4
arch/arm/mach-omap2/Kconfig
View File

@ -363,8 +363,8 @@ config OMAP3_SDRC_AC_TIMING
going on could result in system crashes;
config OMAP4_ERRATA_I688
bool "OMAP4 errata: Async Bridge Corruption (BROKEN)"
depends on ARCH_OMAP4 && BROKEN
bool "OMAP4 errata: Async Bridge Corruption"
depends on ARCH_OMAP4
select ARCH_HAS_BARRIERS
help
If a data is stalled inside asynchronous bridge because of back

4
arch/arm/mach-omap2/board-n8x0.c
View File

@ -371,7 +371,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
else
*openp = 0;
#ifdef CONFIG_MMC_OMAP
omap_mmc_notify_cover_event(mmc_device, index, *openp);
#else
pr_warn("MMC: notify cover event not available\n");
#endif
}
static int n8x0_mmc_late_init(struct device *dev)

2
arch/arm/mach-omap2/board-omap3evm.c
View File

@ -381,7 +381,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
platform_device_register(&leds_gpio);

1
arch/arm/mach-omap2/common.h
View File

@ -132,6 +132,7 @@ void omap3_map_io(void);
void am33xx_map_io(void);
void omap4_map_io(void);
void ti81xx_map_io(void);
void omap_barriers_init(void);
/**
* omap_test_timeout - busy-loop, testing a condition

5
arch/arm/mach-omap2/cpuidle44xx.c
View File

@ -65,7 +65,6 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
struct timespec ts_preidle, ts_postidle, ts_idle;
u32 cpu1_state;
int idle_time;
int new_state_idx;
int cpu_id = smp_processor_id();
/* Used to keep track of the total time in idle */
@ -84,8 +83,8 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
*/
cpu1_state = pwrdm_read_pwrst(cpu1_pd);
if (cpu1_state != PWRDM_POWER_OFF) {
new_state_idx = drv->safe_state_index;
cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]);
index = drv->safe_state_index;
cx = cpuidle_get_statedata(&dev->states_usage[index]);
}
if (index > 0)

52
arch/arm/mach-omap2/gpmc-smsc911x.c
View File

@ -19,6 +19,8 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/smsc911x.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <plat/board.h>
#include <plat/gpmc.h>
@ -42,6 +44,50 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
.flags = SMSC911X_USE_16BIT,
};
static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};
/* Generic regulator definition to satisfy smsc911x */
static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
.constraints = {
.min_uV = 3300000,
.max_uV = 3300000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
.consumer_supplies = gpmc_smsc911x_supply,
};
static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
.supply_name = "gpmc_smsc911x",
.microvolts = 3300000,
.gpio = -EINVAL,
.startup_delay = 0,
.enable_high = 0,
.enabled_at_boot = 1,
.init_data = &gpmc_smsc911x_reg_init_data,
};
/*
* Platform device id of 42 is a temporary fix to avoid conflicts
* with other reg-fixed-voltage devices. The real fix should
* involve the driver core providing a way of dynamically
* assigning a unique id on registration for platform devices
* in the same name space.
*/
static struct platform_device gpmc_smsc911x_regulator = {
.name = "reg-fixed-voltage",
.id = 42,
.dev = {
.platform_data = &gpmc_smsc911x_fixed_reg_data,
},
};
/*
* Initialize smsc911x device connected to the GPMC. Note that we
* assume that pin multiplexing is done in the board-*.c file,
@ -55,6 +101,12 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
gpmc_cfg = board_data;
ret = platform_device_register(&gpmc_smsc911x_regulator);
if (ret < 0) {
pr_err("Unable to register smsc911x regulators: %d\n", ret);
return;
}
if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
pr_err("Failed to request GPMC mem region\n");
return;

6
arch/arm/mach-omap2/hsmmc.c
View File

@ -428,6 +428,7 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
return 0;
}
static int omap_hsmmc_done;
#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
@ -491,6 +492,11 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
{
u32 reg;
if (omap_hsmmc_done)
return;
omap_hsmmc_done = 1;
if (!cpu_is_omap44xx()) {
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;

1
arch/arm/mach-omap2/io.c
View File

@ -307,6 +307,7 @@ void __init omapam33xx_map_common_io(void)
void __init omap44xx_map_common_io(void)
{
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
omap_barriers_init();
}
#endif

13
arch/arm/mach-omap2/mailbox.c
View File

@ -281,8 +281,16 @@ static struct omap_mbox mbox_iva_info = {
.ops = &omap2_mbox_ops,
.priv = &omap2_mbox_iva_priv,
};
#endif
struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL };
#ifdef CONFIG_ARCH_OMAP2
struct omap_mbox *omap2_mboxes[] = {
&mbox_dsp_info,
#ifdef CONFIG_SOC_OMAP2420
&mbox_iva_info,
#endif
NULL
};
#endif
#if defined(CONFIG_ARCH_OMAP4)
@ -412,7 +420,8 @@ static void __exit omap2_mbox_exit(void)
platform_driver_unregister(&omap2_mbox_driver);
}
module_init(omap2_mbox_init);
/* must be ready before omap3isp is probed */
subsys_initcall(omap2_mbox_init);
module_exit(omap2_mbox_exit);
MODULE_LICENSE("GPL v2");

2
arch/arm/mach-omap2/mux.c
View File

@ -218,7 +218,7 @@ static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
return -ENODEV;
}
static int __init
static int
omap_mux_get_by_name(const char *muxname,
struct omap_mux_partition **found_partition,
struct omap_mux **found_mux)

25
arch/arm/mach-omap2/omap4-common.c
View File

@ -24,6 +24,7 @@
#include <plat/irqs.h>
#include <plat/sram.h>
#include <plat/omap-secure.h>
#include <mach/hardware.h>
#include <mach/omap-wakeupgen.h>
@ -43,6 +44,9 @@ static void __iomem *sar_ram_base;
void __iomem *dram_sync, *sram_sync;
static phys_addr_t paddr;
static u32 size;
void omap_bus_sync(void)
{
if (dram_sync && sram_sync) {
@ -52,18 +56,20 @@ void omap_bus_sync(void)
}
}
static int __init omap_barriers_init(void)
/* Steal one page physical memory for barrier implementation */
int __init omap_barrier_reserve_memblock(void)
{
struct map_desc dram_io_desc[1];
phys_addr_t paddr;
u32 size;
if (!cpu_is_omap44xx())
return -ENODEV;
size = ALIGN(PAGE_SIZE, SZ_1M);
paddr = arm_memblock_steal(size, SZ_1M);
return 0;
}
void __init omap_barriers_init(void)
{
struct map_desc dram_io_desc[1];
dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
dram_io_desc[0].pfn = __phys_to_pfn(paddr);
dram_io_desc[0].length = size;
@ -75,9 +81,10 @@ static int __init omap_barriers_init(void)
pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
(long long) paddr, dram_io_desc[0].virtual);
return 0;
}
core_initcall(omap_barriers_init);
#else
void __init omap_barriers_init(void)
{}
#endif
void __init gic_init_irq(void)

3
arch/arm/mach-omap2/pm.c
View File

@ -174,14 +174,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
freq = clk->rate;
clk_put(clk);
rcu_read_lock();
opp = opp_find_freq_ceil(dev, &freq);
if (IS_ERR(opp)) {
rcu_read_unlock();
pr_err("%s: unable to find boot up OPP for vdd_%s\n",
__func__, vdd_name);
goto exit;
}
bootup_volt = opp_get_voltage(opp);
rcu_read_unlock();
if (!bootup_volt) {
pr_err("%s: unable to find voltage corresponding "
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);

6
arch/arm/mach-omap2/usb-host.c
View File

@ -486,7 +486,7 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
{
struct omap_hwmod *oh[2];
struct omap_device *od;
struct platform_device *pdev;
int bus_id = -1;
int i;
@ -522,11 +522,11 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
return;
}
od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
(void *)&usbhs_data, sizeof(usbhs_data),
omap_uhhtll_latency,
ARRAY_SIZE(omap_uhhtll_latency), false);
if (IS_ERR(od)) {
if (IS_ERR(pdev)) {
pr_err("Could not build hwmod devices %s,%s\n",
USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
return;

25
arch/arm/mach-pxa/hx4700.c
View File

@ -45,6 +45,7 @@
#include <mach/hx4700.h>
#include <mach/irda.h>
#include <sound/ak4641.h>
#include <video/platform_lcd.h>
#include <video/w100fb.h>
@ -764,6 +765,28 @@ static struct i2c_board_info __initdata pi2c_board_info[] = {
},
};
/*
* Asahi Kasei AK4641 on I2C
*/
static struct ak4641_platform_data ak4641_info = {
.gpio_power = GPIO27_HX4700_CODEC_ON,
.gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
};
static struct i2c_board_info i2c_board_info[] __initdata = {
{
I2C_BOARD_INFO("ak4641", 0x12),
.platform_data = &ak4641_info,
},
};
static struct platform_device audio = {
.name = "hx4700-audio",
.id = -1,
};
/*
* PCMCIA
*/
@ -790,6 +813,7 @@ static struct platform_device *devices[] __initdata = {
&gpio_vbus,
&power_supply,
&strataflash,
&audio,
&pcmcia,
};
@ -827,6 +851,7 @@ static void __init hx4700_init(void)
pxa_set_ficp_info(&ficp_info);
pxa27x_set_i2c_power_info(NULL);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));

1
arch/arm/mach-pxa/pxa25x.c
View File

@ -25,7 +25,6 @@
#include <linux/suspend.h>
#include <linux/syscore_ops.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <asm/mach/map.h>
#include <asm/suspend.h>

1
arch/arm/mach-pxa/pxa27x.c
View File

@ -22,7 +22,6 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/gpio.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>

1
arch/arm/mach-pxa/saarb.c
View File

@ -15,7 +15,6 @@
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/mfd/88pm860x.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

3
arch/arm/mach-pxa/sharpsl_pm.c
View File

@ -168,6 +168,7 @@ struct battery_thresh sharpsl_battery_levels_noac[] = {
#define MAXCTRL_SEL_SH 4
#define MAXCTRL_STR (1u << 7)
extern int max1111_read_channel(int);
/*
* Read MAX1111 ADC
*/
@ -177,8 +178,6 @@ int sharpsl_pm_pxa_read_max1111(int channel)
if (machine_is_tosa())
return 0;
extern int max1111_read_channel(int);
/* max1111 accepts channels from 0-3, however,
* it is encoded from 0-7 here in the code.
*/

5
arch/arm/mach-pxa/spitz_pm.c
View File

@ -172,10 +172,9 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
static unsigned long spitz_charger_wakeup(void)
{
unsigned long ret;
ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT)
<< GPIO_bit(SPITZ_GPIO_KEY_INT))
| (!gpio_get_value(SPITZ_GPIO_SYNC)
<< GPIO_bit(SPITZ_GPIO_SYNC));
| gpio_get_value(SPITZ_GPIO_SYNC));
return ret;
}

1
arch/arm/plat-omap/common.c
View File

@ -69,6 +69,7 @@ void __init omap_reserve(void)
omap_vram_reserve_sdram_memblock();
omap_dsp_reserve_sdram_memblock();
omap_secure_ram_reserve_memblock();
omap_barrier_reserve_memblock();
}
void __init omap_init_consistent_dma_size(void)

6
arch/arm/plat-omap/include/plat/omap-secure.h
View File

@ -10,4 +10,10 @@ static inline void omap_secure_ram_reserve_memblock(void)
{ }
#endif
#ifdef CONFIG_OMAP4_ERRATA_I688
extern int omap_barrier_reserve_memblock(void);
#else
static inline void omap_barrier_reserve_memblock(void)
{ }
#endif
#endif /* __OMAP_SECURE_H__ */

8
arch/openrisc/include/asm/ptrace.h
View File

@ -77,7 +77,6 @@ struct pt_regs {
long syscallno; /* Syscall number (used by strace) */
long dummy; /* Cheap alignment fix */
};
#endif /* __ASSEMBLY__ */
/* TODO: Rename this to REDZONE because that's what it is */
#define STACK_FRAME_OVERHEAD 128 /* size of minimum stack frame */
@ -87,6 +86,13 @@ struct pt_regs {
#define user_stack_pointer(regs) ((unsigned long)(regs)->sp)
#define profile_pc(regs) instruction_pointer(regs)
static inline long regs_return_value(struct pt_regs *regs)
{
return regs->gpr[11];
}
#endif /* __ASSEMBLY__ */
/*
* Offsets used by 'ptrace' system call interface.
*/

1
arch/openrisc/kernel/init_task.c
View File

@ -17,6 +17,7 @@
#include <linux/init_task.h>
#include <linux/mqueue.h>
#include <linux/export.h>
static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);

1
arch/openrisc/kernel/irq.c
View File

@ -23,6 +23,7 @@
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/kernel_stat.h>
#include <linux/export.h>
#include <linux/irqflags.h>

12
arch/openrisc/kernel/ptrace.c
View File

@ -188,11 +188,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
*/
ret = -1L;
/* Are these regs right??? */
if (unlikely(current->audit_context))
audit_syscall_entry(audit_arch(), regs->syscallno,
regs->gpr[3], regs->gpr[4],
regs->gpr[5], regs->gpr[6]);
audit_syscall_entry(audit_arch(), regs->syscallno,
regs->gpr[3], regs->gpr[4],
regs->gpr[5], regs->gpr[6]);
return ret ? : regs->syscallno;
}
@ -201,9 +199,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
{
int step;
if (unlikely(current->audit_context))
audit_syscall_exit(AUDITSC_RESULT(regs->gpr[11]),
regs->gpr[11]);
audit_syscall_exit(regs);
step = test_thread_flag(TIF_SINGLESTEP);
if (step || test_thread_flag(TIF_SYSCALL_TRACE))

4
arch/parisc/Makefile
View File

@ -31,7 +31,11 @@ ifdef CONFIG_64BIT
UTS_MACHINE := parisc64
CHECKFLAGS += -D__LP64__=1 -m64
WIDTH := 64
# FIXME: if no default set, should really try to locate dynamically
ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE := hppa64-linux-gnu-
endif
else # 32-bit
WIDTH :=
endif

3
arch/s390/Kconfig
View File

@ -227,6 +227,9 @@ config COMPAT
config SYSVIPC_COMPAT
def_bool y if COMPAT && SYSVIPC
config KEYS_COMPAT
def_bool y if COMPAT && KEYS
config AUDIT_ARCH
def_bool y

7
arch/s390/include/asm/compat.h
View File

@ -172,13 +172,6 @@ static inline int is_compat_task(void)
return is_32bit_task();
}
#else
static inline int is_compat_task(void)
{
return 0;
}
#endif
static inline void __user *arch_compat_alloc_user_space(long len)

1
arch/s390/kernel/crash_dump.c
View File

@ -11,7 +11,6 @@
#include <linux/module.h>
#include <linux/gfp.h>
#include <linux/slab.h>
#include <linux/crash_dump.h>
#include <linux/bootmem.h>
#include <linux/elf.h>
#include <asm/ipl.h>

1
arch/s390/kernel/process.c
View File

@ -29,7 +29,6 @@
#include <asm/irq.h>
#include <asm/timer.h>
#include <asm/nmi.h>
#include <asm/compat.h>
#include <asm/smp.h>
#include "entry.h"

2
arch/s390/kernel/ptrace.c
View File

@ -20,8 +20,8 @@
#include <linux/regset.h>
#include <linux/tracehook.h>
#include <linux/seccomp.h>
#include <linux/compat.h>
#include <trace/syscall.h>
#include <asm/compat.h>
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgtable.h>

2
arch/s390/kernel/setup.c
View File

@ -46,6 +46,7 @@
#include <linux/kexec.h>
#include <linux/crash_dump.h>
#include <linux/memory.h>
#include <linux/compat.h>
#include <asm/ipl.h>
#include <asm/uaccess.h>
@ -59,7 +60,6 @@
#include <asm/ptrace.h>
#include <asm/sections.h>
#include <asm/ebcdic.h>
#include <asm/compat.h>
#include <asm/kvm_virtio.h>
#include <asm/diag.h>

1
arch/s390/kernel/signal.c
View File

@ -30,7 +30,6 @@
#include <asm/ucontext.h>
#include <asm/uaccess.h>
#include <asm/lowcore.h>
#include <asm/compat.h>
#include "entry.h"
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))

1
arch/s390/mm/fault.c
View File

@ -36,7 +36,6 @@
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
#include <asm/compat.h>
#include "../kernel/entry.h"
#ifndef CONFIG_64BIT

30
arch/s390/mm/init.c
View File

@ -223,16 +223,38 @@ void free_initrd_mem(unsigned long start, unsigned long end)
#ifdef CONFIG_MEMORY_HOTPLUG
int arch_add_memory(int nid, u64 start, u64 size)
{
struct pglist_data *pgdat;
unsigned long zone_start_pfn, zone_end_pfn, nr_pages;
unsigned long start_pfn = PFN_DOWN(start);
unsigned long size_pages = PFN_DOWN(size);
struct zone *zone;
int rc;
pgdat = NODE_DATA(nid);
zone = pgdat->node_zones + ZONE_MOVABLE;
rc = vmem_add_mapping(start, size);
if (rc)
return rc;
rc = __add_pages(nid, zone, PFN_DOWN(start), PFN_DOWN(size));
for_each_zone(zone) {
if (zone_idx(zone) != ZONE_MOVABLE) {
/* Add range within existing zone limits */
zone_start_pfn = zone->zone_start_pfn;
zone_end_pfn = zone->zone_start_pfn +
zone->spanned_pages;
} else {
/* Add remaining range to ZONE_MOVABLE */
zone_start_pfn = start_pfn;
zone_end_pfn = start_pfn + size_pages;
}
if (start_pfn < zone_start_pfn || start_pfn >= zone_end_pfn)
continue;
nr_pages = (start_pfn + size_pages > zone_end_pfn) ?
zone_end_pfn - start_pfn : size_pages;
rc = __add_pages(nid, zone, start_pfn, nr_pages);
if (rc)
break;
start_pfn += nr_pages;
size_pages -= nr_pages;
if (!size_pages)
break;
}
if (rc)
vmem_remove_mapping(start, size);
return rc;

2
arch/s390/mm/mmap.c
View File

@ -29,8 +29,8 @@
#include <linux/mman.h>
#include <linux/module.h>
#include <linux/random.h>
#include <linux/compat.h>
#include <asm/pgalloc.h>
#include <asm/compat.h>
static unsigned long stack_maxrandom_size(void)
{

8
arch/x86/include/asm/perf_event.h
View File

@ -242,4 +242,12 @@ static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
static inline void perf_events_lapic_init(void) { }
#endif
#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
extern void amd_pmu_enable_virt(void);
extern void amd_pmu_disable_virt(void);
#else
static inline void amd_pmu_enable_virt(void) { }
static inline void amd_pmu_disable_virt(void) { }
#endif
#endif /* _ASM_X86_PERF_EVENT_H */

44
arch/x86/kernel/cpu/intel_cacheinfo.c
View File

@ -326,8 +326,7 @@ static void __cpuinit amd_calc_l3_indices(struct amd_northbridge *nb)
l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
}
static void __cpuinit amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf,
int index)
static void __cpuinit amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)
{
int node;
@ -725,14 +724,16 @@ static DEFINE_PER_CPU(struct _cpuid4_info *, ici_cpuid4_info);
#define CPUID4_INFO_IDX(x, y) (&((per_cpu(ici_cpuid4_info, x))[y]))
#ifdef CONFIG_SMP
static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
static int __cpuinit cache_shared_amd_cpu_map_setup(unsigned int cpu, int index)
{
struct _cpuid4_info *this_leaf, *sibling_leaf;
unsigned long num_threads_sharing;
int index_msb, i, sibling;
struct _cpuid4_info *this_leaf;
int ret, i, sibling;
struct cpuinfo_x86 *c = &cpu_data(cpu);
if ((index == 3) && (c->x86_vendor == X86_VENDOR_AMD)) {
ret = 0;
if (index == 3) {
ret = 1;
for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
if (!per_cpu(ici_cpuid4_info, i))
continue;
@ -743,8 +744,35 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
set_bit(sibling, this_leaf->shared_cpu_map);
}
}
return;
} else if ((c->x86 == 0x15) && ((index == 1) || (index == 2))) {
ret = 1;
for_each_cpu(i, cpu_sibling_mask(cpu)) {
if (!per_cpu(ici_cpuid4_info, i))
continue;
this_leaf = CPUID4_INFO_IDX(i, index);
for_each_cpu(sibling, cpu_sibling_mask(cpu)) {
if (!cpu_online(sibling))
continue;
set_bit(sibling, this_leaf->shared_cpu_map);
}
}
}
return ret;
}
static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
{
struct _cpuid4_info *this_leaf, *sibling_leaf;
unsigned long num_threads_sharing;
int index_msb, i;
struct cpuinfo_x86 *c = &cpu_data(cpu);
if (c->x86_vendor == X86_VENDOR_AMD) {
if (cache_shared_amd_cpu_map_setup(cpu, index))
return;
}
this_leaf = CPUID4_INFO_IDX(cpu, index);
num_threads_sharing = 1 + this_leaf->base.eax.split.num_threads_sharing;

2
arch/x86/kernel/cpu/mcheck/mce_amd.c
View File

@ -528,6 +528,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
sprintf(name, "threshold_bank%i", bank);
#ifdef CONFIG_SMP
if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
i = cpumask_first(cpu_llc_shared_mask(cpu));
@ -553,6 +554,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
goto out;
}
#endif
b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
if (!b) {

8
arch/x86/kernel/cpu/perf_event.h
View File

@ -147,7 +147,9 @@ struct cpu_hw_events {
/*
* AMD specific bits
*/
struct amd_nb *amd_nb;
struct amd_nb *amd_nb;
/* Inverted mask of bits to clear in the perf_ctr ctrl registers */
u64 perf_ctr_virt_mask;
void *kfree_on_online;
};
@ -417,9 +419,11 @@ void x86_pmu_disable_all(void);
static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
u64 enable_mask)
{
u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);
if (hwc->extra_reg.reg)
wrmsrl(hwc->extra_reg.reg, hwc->extra_reg.config);
wrmsrl(hwc->config_base, hwc->config | enable_mask);
wrmsrl(hwc->config_base, (hwc->config | enable_mask) & ~disable_mask);
}
void x86_pmu_enable_all(int added);

37
arch/x86/kernel/cpu/perf_event_amd.c
View File

@ -1,4 +1,5 @@
#include <linux/perf_event.h>
#include <linux/export.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/slab.h>
@ -357,7 +358,9 @@ static void amd_pmu_cpu_starting(int cpu)
struct amd_nb *nb;
int i, nb_id;
if (boot_cpu_data.x86_max_cores < 2)
cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
if (boot_cpu_data.x86_max_cores < 2 || boot_cpu_data.x86 == 0x15)
return;
nb_id = amd_get_nb_id(cpu);
@ -587,9 +590,9 @@ static __initconst const struct x86_pmu amd_pmu_f15h = {
.put_event_constraints = amd_put_event_constraints,
.cpu_prepare = amd_pmu_cpu_prepare,
.cpu_starting = amd_pmu_cpu_starting,
.cpu_dead = amd_pmu_cpu_dead,
#endif
.cpu_starting = amd_pmu_cpu_starting,
};
__init int amd_pmu_init(void)
@ -621,3 +624,33 @@ __init int amd_pmu_init(void)
return 0;
}
void amd_pmu_enable_virt(void)
{
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
cpuc->perf_ctr_virt_mask = 0;
/* Reload all events */
x86_pmu_disable_all();
x86_pmu_enable_all(0);
}
EXPORT_SYMBOL_GPL(amd_pmu_enable_virt);
void amd_pmu_disable_virt(void)
{
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
/*
* We only mask out the Host-only bit so that host-only counting works
* when SVM is disabled. If someone sets up a guest-only counter when
* SVM is disabled the Guest-only bits still gets set and the counter
* will not count anything.
*/
cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;
/* Reload all events */
x86_pmu_disable_all();
x86_pmu_enable_all(0);
}
EXPORT_SYMBOL_GPL(amd_pmu_disable_virt);

9
arch/x86/kernel/entry_64.S
View File

@ -1531,11 +1531,18 @@ ENTRY(nmi)
/* Use %rdx as out temp variable throughout */
pushq_cfi %rdx
/*
* If %cs was not the kernel segment, then the NMI triggered in user
* space, which means it is definitely not nested.
*/
cmpl $__KERNEL_CS, 16(%rsp)
jne first_nmi
/*
* Check the special variable on the stack to see if NMIs are
* executing.
*/
cmp $1, -8(%rsp)
cmpl $1, -8(%rsp)
je nested_nmi
/*

1
arch/x86/kernel/microcode_amd.c
View File

@ -360,7 +360,6 @@ static enum ucode_state request_microcode_amd(int cpu, struct device *device)
static enum ucode_state
request_microcode_user(int cpu, const void __user *buf, size_t size)
{
pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
return UCODE_ERROR;
}

5
arch/x86/kvm/svm.c
View File

@ -29,6 +29,7 @@
#include <linux/ftrace_event.h>
#include <linux/slab.h>
#include <asm/perf_event.h>
#include <asm/tlbflush.h>
#include <asm/desc.h>
#include <asm/kvm_para.h>
@ -575,6 +576,8 @@ static void svm_hardware_disable(void *garbage)
wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
cpu_svm_disable();
amd_pmu_disable_virt();
}
static int svm_hardware_enable(void *garbage)
@ -622,6 +625,8 @@ static int svm_hardware_enable(void *garbage)
svm_init_erratum_383();
amd_pmu_enable_virt();
return 0;
}

6
arch/x86/xen/enlighten.c
View File

@ -1141,7 +1141,9 @@ asmlinkage void __init xen_start_kernel(void)
/* Prevent unwanted bits from being set in PTEs. */
__supported_pte_mask &= ~_PAGE_GLOBAL;
#if 0
if (!xen_initial_domain())
#endif
__supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
__supported_pte_mask |= _PAGE_IOMAP;
@ -1204,10 +1206,6 @@ asmlinkage void __init xen_start_kernel(void)
pgd = (pgd_t *)xen_start_info->pt_base;
if (!xen_initial_domain())
__supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
__supported_pte_mask |= _PAGE_IOMAP;
/* Don't do the full vcpu_info placement stuff until we have a
possible map and a non-dummy shared_info. */
per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];

8
arch/x86/xen/mmu.c
View File

@ -415,13 +415,13 @@ static pteval_t iomap_pte(pteval_t val)
static pteval_t xen_pte_val(pte_t pte)
{
pteval_t pteval = pte.pte;
#if 0
/* If this is a WC pte, convert back from Xen WC to Linux WC */
if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
WARN_ON(!pat_enabled);
pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
}
#endif
if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
return pteval;
@ -463,7 +463,7 @@ void xen_set_pat(u64 pat)
static pte_t xen_make_pte(pteval_t pte)
{
phys_addr_t addr = (pte & PTE_PFN_MASK);
#if 0
/* If Linux is trying to set a WC pte, then map to the Xen WC.
* If _PAGE_PAT is set, then it probably means it is really
* _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
@ -476,7 +476,7 @@ static pte_t xen_make_pte(pteval_t pte)
if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
}
#endif
/*
* Unprivileged domains are allowed to do IOMAPpings for
* PCI passthrough, but not map ISA space. The ISA

11
block/partitions/ldm.c
View File

@ -2,7 +2,7 @@
* ldm - Support for Windows Logical Disk Manager (Dynamic Disks)
*
* Copyright (C) 2001,2002 Richard Russon <ldm@flatcap.org>
* Copyright (c) 2001-2007 Anton Altaparmakov
* Copyright (c) 2001-2012 Anton Altaparmakov
* Copyright (C) 2001,2002 Jakob Kemi <jakob.kemi@telia.com>
*
* Documentation is available at http://www.linux-ntfs.org/doku.php?id=downloads
@ -1341,20 +1341,17 @@ static bool ldm_frag_add (const u8 *data, int size, struct list_head *frags)
ldm_error("REC value (%d) exceeds NUM value (%d)", rec, f->num);
return false;
}
if (f->map & (1 << rec)) {
ldm_error ("Duplicate VBLK, part %d.", rec);
f->map &= 0x7F; /* Mark the group as broken */
return false;
}
f->map |= (1 << rec);
if (!rec)
memcpy(f->data, data, VBLK_SIZE_HEAD);
data += VBLK_SIZE_HEAD;
size -= VBLK_SIZE_HEAD;
memcpy (f->data+rec*(size-VBLK_SIZE_HEAD)+VBLK_SIZE_HEAD, data, size);
memcpy(f->data + VBLK_SIZE_HEAD + rec * size, data, size);
return true;
}

4
drivers/atm/solos-pci.c
View File

@ -1206,9 +1206,9 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
out_unmap_both:
pci_set_drvdata(dev, NULL);
pci_iounmap(dev, card->config_regs);
out_unmap_config:
pci_iounmap(dev, card->buffers);
out_unmap_config:
pci_iounmap(dev, card->config_regs);
out_release_regions:
pci_release_regions(dev);
out:

4
drivers/bluetooth/btusb.c
View File

@ -102,6 +102,7 @@ static struct usb_device_id btusb_table[] = {
/* Broadcom BCM20702A0 */
{ USB_DEVICE(0x0a5c, 0x21e3) },
{ USB_DEVICE(0x0a5c, 0x21f3) },
{ USB_DEVICE(0x413c, 0x8197) },
{ } /* Terminating entry */
@ -726,9 +727,6 @@ static int btusb_send_frame(struct sk_buff *skb)
usb_fill_bulk_urb(urb, data->udev, pipe,
skb->data, skb->len, btusb_tx_complete, skb);
if (skb->priority >= HCI_PRIO_MAX - 1)
urb->transfer_flags = URB_ISO_ASAP;
hdev->stat.acl_tx++;
break;

1
drivers/crypto/mv_cesa.c
View File

@ -714,6 +714,7 @@ static int mv_hash_final(struct ahash_request *req)
{
struct mv_req_hash_ctx *ctx = ahash_request_ctx(req);
ahash_request_set_crypt(req, NULL, req->result, 0);
mv_update_hash_req_ctx(ctx, 1, 0);
return mv_handle_req(&req->base);
}

16
drivers/gpu/drm/exynos/exynos_drm_connector.c
View File

@ -28,6 +28,7 @@
#include "drmP.h"
#include "drm_crtc_helper.h"
#include <drm/exynos_drm.h>
#include "exynos_drm_drv.h"
#include "exynos_drm_encoder.h"
@ -44,8 +45,9 @@ struct exynos_drm_connector {
/* convert exynos_video_timings to drm_display_mode */
static inline void
convert_to_display_mode(struct drm_display_mode *mode,
struct fb_videomode *timing)
struct exynos_drm_panel_info *panel)
{
struct fb_videomode *timing = &panel->timing;
DRM_DEBUG_KMS("%s\n", __FILE__);
mode->clock = timing->pixclock / 1000;
@ -60,6 +62,8 @@ convert_to_display_mode(struct drm_display_mode *mode,
mode->vsync_start = mode->vdisplay + timing->upper_margin;
mode->vsync_end = mode->vsync_start + timing->vsync_len;
mode->vtotal = mode->vsync_end + timing->lower_margin;
mode->width_mm = panel->width_mm;
mode->height_mm = panel->height_mm;
if (timing->vmode & FB_VMODE_INTERLACED)
mode->flags |= DRM_MODE_FLAG_INTERLACE;
@ -148,16 +152,18 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector)
connector->display_info.raw_edid = edid;
} else {
struct drm_display_mode *mode = drm_mode_create(connector->dev);
struct fb_videomode *timing;
struct exynos_drm_panel_info *panel;
if (display_ops->get_timing)
timing = display_ops->get_timing(manager->dev);
if (display_ops->get_panel)
panel = display_ops->get_panel(manager->dev);
else {
drm_mode_destroy(connector->dev, mode);
return 0;
}
convert_to_display_mode(mode, timing);
convert_to_display_mode(mode, panel);
connector->display_info.width_mm = mode->width_mm;
connector->display_info.height_mm = mode->height_mm;
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
drm_mode_set_name(mode);

4
drivers/gpu/drm/exynos/exynos_drm_drv.h
View File

@ -136,7 +136,7 @@ struct exynos_drm_overlay {
* @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
* @is_connected: check for that display is connected or not.
* @get_edid: get edid modes from display driver.
* @get_timing: get timing object from display driver.
* @get_panel: get panel object from display driver.
* @check_timing: check if timing is valid or not.
* @power_on: display device on or off.
*/
@ -145,7 +145,7 @@ struct exynos_drm_display_ops {
bool (*is_connected)(struct device *dev);
int (*get_edid)(struct device *dev, struct drm_connector *connector,
u8 *edid, int len);
void *(*get_timing)(struct device *dev);
void *(*get_panel)(struct device *dev);
int (*check_timing)(struct device *dev, void *timing);
int (*power_on)(struct device *dev, int mode);
};

27
drivers/gpu/drm/exynos/exynos_drm_fimd.c
View File

@ -89,7 +89,7 @@ struct fimd_context {
bool suspended;
struct mutex lock;
struct fb_videomode *timing;
struct exynos_drm_panel_info *panel;
};
static bool fimd_display_is_connected(struct device *dev)
@ -101,13 +101,13 @@ static bool fimd_display_is_connected(struct device *dev)
return true;
}
static void *fimd_get_timing(struct device *dev)
static void *fimd_get_panel(struct device *dev)
{
struct fimd_context *ctx = get_fimd_context(dev);
DRM_DEBUG_KMS("%s\n", __FILE__);
return ctx->timing;
return ctx->panel;
}
static int fimd_check_timing(struct device *dev, void *timing)
@ -131,7 +131,7 @@ static int fimd_display_power_on(struct device *dev, int mode)
static struct exynos_drm_display_ops fimd_display_ops = {
.type = EXYNOS_DISPLAY_TYPE_LCD,
.is_connected = fimd_display_is_connected,
.get_timing = fimd_get_timing,
.get_panel = fimd_get_panel,
.check_timing = fimd_check_timing,
.power_on = fimd_display_power_on,
};
@ -193,7 +193,8 @@ static void fimd_apply(struct device *subdrv_dev)
static void fimd_commit(struct device *dev)
{
struct fimd_context *ctx = get_fimd_context(dev);
struct fb_videomode *timing = ctx->timing;
struct exynos_drm_panel_info *panel = ctx->panel;
struct fb_videomode *timing = &panel->timing;
u32 val;
if (ctx->suspended)
@ -786,7 +787,7 @@ static int __devinit fimd_probe(struct platform_device *pdev)
struct fimd_context *ctx;
struct exynos_drm_subdrv *subdrv;
struct exynos_drm_fimd_pdata *pdata;
struct fb_videomode *timing;
struct exynos_drm_panel_info *panel;
struct resource *res;
int win;
int ret = -EINVAL;
@ -799,9 +800,9 @@ static int __devinit fimd_probe(struct platform_device *pdev)
return -EINVAL;
}
timing = &pdata->timing;
if (!timing) {
dev_err(dev, "timing is null.\n");
panel = &pdata->panel;
if (!panel) {
dev_err(dev, "panel is null.\n");
return -EINVAL;
}
@ -863,16 +864,16 @@ static int __devinit fimd_probe(struct platform_device *pdev)
goto err_req_irq;
}
ctx->clkdiv = fimd_calc_clkdiv(ctx, timing);
ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
ctx->vidcon0 = pdata->vidcon0;
ctx->vidcon1 = pdata->vidcon1;
ctx->default_win = pdata->default_win;
ctx->timing = timing;
ctx->panel = panel;
timing->pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
timing->pixclock, ctx->clkdiv);
panel->timing.pixclock, ctx->clkdiv);
subdrv = &ctx->subdrv;

15
drivers/gpu/drm/i915/intel_display.c
View File

@ -4680,8 +4680,17 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
crtc = intel_get_crtc_for_plane(dev, plane);
clock = crtc->mode.clock;
if (!clock) {
*sprite_wm = 0;
return false;
}
line_time_us = (sprite_width * 1000) / clock;
if (!line_time_us) {
*sprite_wm = 0;
return false;
}
line_count = (latency_ns / line_time_us + 1000) / 1000;
line_size = sprite_width * pixel_size;
@ -6175,7 +6184,7 @@ void intel_crtc_load_lut(struct drm_crtc *crtc)
int i;
/* The clocks have to be on to load the palette. */
if (!crtc->enabled)
if (!crtc->enabled || !intel_crtc->active)
return;
/* use legacy palette for Ironlake */
@ -6561,7 +6570,7 @@ intel_framebuffer_create_for_mode(struct drm_device *dev,
mode_cmd.height = mode->vdisplay;
mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width,
bpp);
mode_cmd.pixel_format = 0;
mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth);
return intel_framebuffer_create(dev, &mode_cmd, obj);
}
@ -8185,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
if (intel_enable_rc6(dev_priv->dev))
rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
(IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
I915_WRITE(GEN6_RC_CONTROL,
rc6_mask |

14
drivers/gpu/drm/i915/intel_ringbuffer.c
View File

@ -301,7 +301,7 @@ static int init_ring_common(struct intel_ring_buffer *ring)
I915_WRITE_CTL(ring,
((ring->size - PAGE_SIZE) & RING_NR_PAGES)
| RING_REPORT_64K | RING_VALID);
| RING_VALID);
/* If the head is still not zero, the ring is dead */
if ((I915_READ_CTL(ring) & RING_VALID) == 0 ||
@ -1132,18 +1132,6 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
struct drm_device *dev = ring->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
unsigned long end;
u32 head;
/* If the reported head position has wrapped or hasn't advanced,
* fallback to the slow and accurate path.
*/
head = intel_read_status_page(ring, 4);
if (head > ring->head) {
ring->head = head;
ring->space = ring_space(ring);
if (ring->space >= n)
return 0;
}
trace_i915_ring_wait_begin(ring);
if (drm_core_check_feature(dev, DRIVER_GEM))

1
drivers/gpu/drm/radeon/r600_cs.c
View File

@ -1304,6 +1304,7 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx,
h0 = G_038004_TEX_HEIGHT(word1) + 1;
d0 = G_038004_TEX_DEPTH(word1);
nfaces = 1;
array = 0;
switch (G_038000_DIM(word0)) {
case V_038000_SQ_TEX_DIM_1D:
case V_038000_SQ_TEX_DIM_2D:

25
drivers/gpu/drm/radeon/radeon_connectors.c
View File

@ -1117,13 +1117,23 @@ static int radeon_dp_get_modes(struct drm_connector *connector)
(connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
struct drm_display_mode *mode;
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_ON);
ret = radeon_ddc_get_modes(radeon_connector);
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_OFF);
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_ON);
ret = radeon_ddc_get_modes(radeon_connector);
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_OFF);
} else {
/* need to setup ddc on the bridge */
if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
ENCODER_OBJECT_ID_NONE) {
if (encoder)
radeon_atom_ext_encoder_setup_ddc(encoder);
}
ret = radeon_ddc_get_modes(radeon_connector);
}
if (ret > 0) {
if (encoder) {
@ -1134,7 +1144,6 @@ static int radeon_dp_get_modes(struct drm_connector *connector)
return ret;
}
encoder = radeon_best_single_encoder(connector);
if (!encoder)
return 0;

2
drivers/gpu/drm/radeon/radeon_gart.c
View File

@ -597,13 +597,13 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev,
if (bo_va == NULL)
return 0;
list_del(&bo_va->bo_list);
mutex_lock(&vm->mutex);
radeon_mutex_lock(&rdev->cs_mutex);
radeon_vm_bo_update_pte(rdev, vm, bo, NULL);
radeon_mutex_unlock(&rdev->cs_mutex);
list_del(&bo_va->vm_list);
mutex_unlock(&vm->mutex);
list_del(&bo_va->bo_list);
kfree(bo_va);
return 0;

89
drivers/hwmon/f75375s.c
View File

@ -178,6 +178,16 @@ static inline void f75375_write16(struct i2c_client *client, u8 reg,
i2c_smbus_write_byte_data(client, reg + 1, (value & 0xFF));
}
static void f75375_write_pwm(struct i2c_client *client, int nr)
{
struct f75375_data *data = i2c_get_clientdata(client);
if (data->kind == f75387)
f75375_write16(client, F75375_REG_FAN_EXP(nr), data->pwm[nr]);
else
f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr),
data->pwm[nr]);
}
static struct f75375_data *f75375_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
@ -254,6 +264,36 @@ static inline u16 rpm_to_reg(int rpm)
return 1500000 / rpm;
}
static bool duty_mode_enabled(u8 pwm_enable)
{
switch (pwm_enable) {
case 0: /* Manual, duty mode (full speed) */
case 1: /* Manual, duty mode */
case 4: /* Auto, duty mode */
return true;
case 2: /* Auto, speed mode */
case 3: /* Manual, speed mode */
return false;
default:
BUG();
}
}
static bool auto_mode_enabled(u8 pwm_enable)
{
switch (pwm_enable) {
case 0: /* Manual, duty mode (full speed) */
case 1: /* Manual, duty mode */
case 3: /* Manual, speed mode */
return false;
case 2: /* Auto, speed mode */
case 4: /* Auto, duty mode */
return true;
default:
BUG();
}
}
static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
@ -287,6 +327,11 @@ static ssize_t set_fan_target(struct device *dev, struct device_attribute *attr,
if (err < 0)
return err;
if (auto_mode_enabled(data->pwm_enable[nr]))
return -EINVAL;
if (data->kind == f75387 && duty_mode_enabled(data->pwm_enable[nr]))
return -EINVAL;
mutex_lock(&data->update_lock);
data->fan_target[nr] = rpm_to_reg(val);
f75375_write16(client, F75375_REG_FAN_EXP(nr), data->fan_target[nr]);
@ -307,9 +352,13 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
if (err < 0)
return err;
if (auto_mode_enabled(data->pwm_enable[nr]) ||
!duty_mode_enabled(data->pwm_enable[nr]))
return -EINVAL;
mutex_lock(&data->update_lock);
data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr), data->pwm[nr]);
f75375_write_pwm(client, nr);
mutex_unlock(&data->update_lock);
return count;
}
@ -327,11 +376,15 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
struct f75375_data *data = i2c_get_clientdata(client);
u8 fanmode;
if (val < 0 || val > 3)
if (val < 0 || val > 4)
return -EINVAL;
fanmode = f75375_read8(client, F75375_REG_FAN_TIMER);
if (data->kind == f75387) {
/* For now, deny dangerous toggling of duty mode */
if (duty_mode_enabled(data->pwm_enable[nr]) !=
duty_mode_enabled(val))
return -EOPNOTSUPP;
/* clear each fanX_mode bit before setting them properly */
fanmode &= ~(1 << F75387_FAN_DUTY_MODE(nr));
fanmode &= ~(1 << F75387_FAN_MANU_MODE(nr));
@ -345,12 +398,14 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
fanmode |= (1 << F75387_FAN_MANU_MODE(nr));
fanmode |= (1 << F75387_FAN_DUTY_MODE(nr));
break;
case 2: /* AUTOMATIC*/
fanmode |= (1 << F75387_FAN_DUTY_MODE(nr));
case 2: /* Automatic, speed mode */
break;
case 3: /* fan speed */
fanmode |= (1 << F75387_FAN_MANU_MODE(nr));
break;
case 4: /* Automatic, pwm */
fanmode |= (1 << F75387_FAN_DUTY_MODE(nr));
break;
}
} else {
/* clear each fanX_mode bit before setting them properly */
@ -368,14 +423,15 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
break;
case 3: /* fan speed */
break;
case 4: /* Automatic pwm */
return -EINVAL;
}
}
f75375_write8(client, F75375_REG_FAN_TIMER, fanmode);
data->pwm_enable[nr] = val;
if (val == 0)
f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr),
data->pwm[nr]);
f75375_write_pwm(client, nr);
return 0;
}
@ -726,14 +782,17 @@ static void f75375_init(struct i2c_client *client, struct f75375_data *data,
manu = ((mode >> F75387_FAN_MANU_MODE(nr)) & 1);
duty = ((mode >> F75387_FAN_DUTY_MODE(nr)) & 1);
if (manu && duty)
/* speed */
if (!manu && duty)
/* auto, pwm */
data->pwm_enable[nr] = 4;
else if (manu && !duty)
/* manual, speed */
data->pwm_enable[nr] = 3;
else if (!manu && duty)
/* automatic */
else if (!manu && !duty)
/* automatic, speed */
data->pwm_enable[nr] = 2;
else
/* manual */
/* manual, pwm */
data->pwm_enable[nr] = 1;
} else {
if (!(conf & (1 << F75375_FAN_CTRL_LINEAR(nr))))
@ -758,9 +817,11 @@ static void f75375_init(struct i2c_client *client, struct f75375_data *data,
set_pwm_enable_direct(client, 0, f75375s_pdata->pwm_enable[0]);
set_pwm_enable_direct(client, 1, f75375s_pdata->pwm_enable[1]);
for (nr = 0; nr < 2; nr++) {
if (auto_mode_enabled(f75375s_pdata->pwm_enable[nr]) ||
!duty_mode_enabled(f75375s_pdata->pwm_enable[nr]))
continue;
data->pwm[nr] = SENSORS_LIMIT(f75375s_pdata->pwm[nr], 0, 255);
f75375_write8(client, F75375_REG_FAN_PWM_DUTY(nr),
data->pwm[nr]);
f75375_write_pwm(client, nr);
}
}
@ -787,7 +848,7 @@ static int f75375_probe(struct i2c_client *client,
if (err)
goto exit_free;
if (data->kind == f75375) {
if (data->kind != f75373) {
err = sysfs_chmod_file(&client->dev.kobj,
&sensor_dev_attr_pwm1_mode.dev_attr.attr,
S_IRUGO | S_IWUSR);

13
drivers/i2c/busses/i2c-mxs.c
View File

@ -72,6 +72,7 @@
#define MXS_I2C_QUEUESTAT (0x70)
#define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000
#define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F
#define MXS_I2C_QUEUECMD (0x80)
@ -219,14 +220,14 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
int ret;
int flags;
init_completion(&i2c->cmd_complete);
dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
msg->addr, msg->len, msg->flags, stop);
if (msg->len == 0)
return -EINVAL;
init_completion(&i2c->cmd_complete);
flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
if (msg->flags & I2C_M_RD)
@ -286,6 +287,7 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
{
struct mxs_i2c_dev *i2c = dev_id;
u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
bool is_last_cmd;
if (!stat)
return IRQ_NONE;
@ -300,9 +302,14 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
else
i2c->cmd_err = 0;
complete(&i2c->cmd_complete);
is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) &
MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0;
if (is_last_cmd || i2c->cmd_err)
complete(&i2c->cmd_complete);
writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
return IRQ_HANDLED;
}

97
drivers/i2c/busses/i2c-pxa.c
View File

@ -29,6 +29,8 @@
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/i2c-pxa.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_i2c.h>
#include <linux/platform_device.h>
#include <linux/err.h>
@ -1044,23 +1046,60 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
.functionality = i2c_pxa_functionality,
};
static struct of_device_id i2c_pxa_dt_ids[] = {
{ .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
{ .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX },
{ .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA2XX },
{}
};
MODULE_DEVICE_TABLE(of, i2c_pxa_dt_ids);
static int i2c_pxa_probe_dt(struct platform_device *pdev, struct pxa_i2c *i2c,
enum pxa_i2c_types *i2c_types)
{
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_id =
of_match_device(i2c_pxa_dt_ids, &pdev->dev);
int ret;
if (!of_id)
return 1;
ret = of_alias_get_id(np, "i2c");
if (ret < 0) {
dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
return ret;
}
pdev->id = ret;
if (of_get_property(np, "mrvl,i2c-polling", NULL))
i2c->use_pio = 1;
if (of_get_property(np, "mrvl,i2c-fast-mode", NULL))
i2c->fast_mode = 1;
*i2c_types = (u32)(of_id->data);
return 0;
}
static int i2c_pxa_probe_pdata(struct platform_device *pdev,
struct pxa_i2c *i2c,
enum pxa_i2c_types *i2c_types)
{
struct i2c_pxa_platform_data *plat = pdev->dev.platform_data;
const struct platform_device_id *id = platform_get_device_id(pdev);
*i2c_types = id->driver_data;
if (plat) {
i2c->use_pio = plat->use_pio;
i2c->fast_mode = plat->fast_mode;
}
return 0;
}
static int i2c_pxa_probe(struct platform_device *dev)
{
struct pxa_i2c *i2c;
struct resource *res;
struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
const struct platform_device_id *id = platform_get_device_id(dev);
enum pxa_i2c_types i2c_type = id->driver_data;
int ret;
int irq;
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
irq = platform_get_irq(dev, 0);
if (res == NULL || irq < 0)
return -ENODEV;
if (!request_mem_region(res->start, resource_size(res), res->name))
return -ENOMEM;
enum pxa_i2c_types i2c_type;
struct pxa_i2c *i2c;
struct resource *res = NULL;
int ret, irq;
i2c = kzalloc(sizeof(struct pxa_i2c), GFP_KERNEL);
if (!i2c) {
@ -1068,6 +1107,24 @@ static int i2c_pxa_probe(struct platform_device *dev)
goto emalloc;
}
ret = i2c_pxa_probe_dt(dev, i2c, &i2c_type);
if (ret > 0)
ret = i2c_pxa_probe_pdata(dev, i2c, &i2c_type);
if (ret < 0)
goto eclk;
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
irq = platform_get_irq(dev, 0);
if (res == NULL || irq < 0) {
ret = -ENODEV;
goto eclk;
}
if (!request_mem_region(res->start, resource_size(res), res->name)) {
ret = -ENOMEM;
goto eclk;
}
i2c->adap.owner = THIS_MODULE;
i2c->adap.retries = 5;
@ -1109,21 +1166,16 @@ static int i2c_pxa_probe(struct platform_device *dev)
i2c->slave_addr = I2C_PXA_SLAVE_ADDR;
#ifdef CONFIG_I2C_PXA_SLAVE
if (plat) {
#ifdef CONFIG_I2C_PXA_SLAVE
i2c->slave_addr = plat->slave_addr;
i2c->slave = plat->slave;
}
#endif
i2c->adap.class = plat->class;
}
clk_enable(i2c->clk);
if (plat) {
i2c->adap.class = plat->class;
i2c->use_pio = plat->use_pio;
i2c->fast_mode = plat->fast_mode;
}
if (i2c->use_pio) {
i2c->adap.algo = &i2c_pxa_pio_algorithm;
} else {
@ -1234,6 +1286,7 @@ static struct platform_driver i2c_pxa_driver = {
.name = "pxa2xx-i2c",
.owner = THIS_MODULE,
.pm = I2C_PXA_DEV_PM_OPS,
.of_match_table = i2c_pxa_dt_ids,
},
.id_table = i2c_pxa_id_table,
};

59
drivers/iommu/omap-iommu-debug.c
View File

@ -44,7 +44,8 @@ static ssize_t debug_read_ver(struct file *file, char __user *userbuf,
static ssize_t debug_read_regs(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct omap_iommu *obj = file->private_data;
struct device *dev = file->private_data;
struct omap_iommu *obj = dev_to_omap_iommu(dev);
char *p, *buf;
ssize_t bytes;
@ -67,7 +68,8 @@ static ssize_t debug_read_regs(struct file *file, char __user *userbuf,
static ssize_t debug_read_tlb(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct omap_iommu *obj = file->private_data;
struct device *dev = file->private_data;
struct omap_iommu *obj = dev_to_omap_iommu(dev);
char *p, *buf;
ssize_t bytes, rest;
@ -97,7 +99,8 @@ static ssize_t debug_write_pagetable(struct file *file,
struct iotlb_entry e;
struct cr_regs cr;
int err;
struct omap_iommu *obj = file->private_data;
struct device *dev = file->private_data;
struct omap_iommu *obj = dev_to_omap_iommu(dev);
char buf[MAXCOLUMN], *p = buf;
count = min(count, sizeof(buf));
@ -184,7 +187,8 @@ static ssize_t dump_ioptable(struct omap_iommu *obj, char *buf, ssize_t len)
static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct omap_iommu *obj = file->private_data;
struct device *dev = file->private_data;
struct omap_iommu *obj = dev_to_omap_iommu(dev);
char *p, *buf;
size_t bytes;
@ -212,7 +216,8 @@ static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct omap_iommu *obj = file->private_data;
struct device *dev = file->private_data;
struct omap_iommu *obj = dev_to_omap_iommu(dev);
char *p, *buf;
struct iovm_struct *tmp;
int uninitialized_var(i);
@ -254,7 +259,7 @@ static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct omap_iommu *obj = file->private_data;
struct device *dev = file->private_data;
char *p, *buf;
struct iovm_struct *area;
ssize_t bytes;
@ -268,8 +273,8 @@ static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
mutex_lock(&iommu_debug_lock);
area = omap_find_iovm_area(obj, (u32)ppos);
if (IS_ERR(area)) {
area = omap_find_iovm_area(dev, (u32)ppos);
if (!area) {
bytes = -EINVAL;
goto err_out;
}
@ -287,7 +292,7 @@ static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
size_t count, loff_t *ppos)
{
struct omap_iommu *obj = file->private_data;
struct device *dev = file->private_data;
struct iovm_struct *area;
char *p, *buf;
@ -305,8 +310,8 @@ static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
goto err_out;
}
area = omap_find_iovm_area(obj, (u32)ppos);
if (IS_ERR(area)) {
area = omap_find_iovm_area(dev, (u32)ppos);
if (!area) {
count = -EINVAL;
goto err_out;
}
@ -350,7 +355,7 @@ DEBUG_FOPS(mem);
{ \
struct dentry *dent; \
dent = debugfs_create_file(#attr, mode, parent, \
obj, &debug_##attr##_fops); \
dev, &debug_##attr##_fops); \
if (!dent) \
return -ENOMEM; \
}
@ -362,20 +367,29 @@ static int iommu_debug_register(struct device *dev, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
struct omap_iommu *obj = platform_get_drvdata(pdev);
struct omap_iommu_arch_data *arch_data;
struct dentry *d, *parent;
if (!obj || !obj->dev)
return -EINVAL;
arch_data = kzalloc(sizeof(*arch_data), GFP_KERNEL);
if (!arch_data)
return -ENOMEM;
arch_data->iommu_dev = obj;
dev->archdata.iommu = arch_data;
d = debugfs_create_dir(obj->name, iommu_debug_root);
if (!d)
return -ENOMEM;
goto nomem;
parent = d;
d = debugfs_create_u8("nr_tlb_entries", 400, parent,
(u8 *)&obj->nr_tlb_entries);
if (!d)
return -ENOMEM;
goto nomem;
DEBUG_ADD_FILE_RO(ver);
DEBUG_ADD_FILE_RO(regs);
@ -384,6 +398,22 @@ static int iommu_debug_register(struct device *dev, void *data)
DEBUG_ADD_FILE_RO(mmap);
DEBUG_ADD_FILE(mem);
return 0;
nomem:
kfree(arch_data);
return -ENOMEM;
}
static int iommu_debug_unregister(struct device *dev, void *data)
{
if (!dev->archdata.iommu)
return 0;
kfree(dev->archdata.iommu);
dev->archdata.iommu = NULL;
return 0;
}
@ -411,6 +441,7 @@ module_init(iommu_debug_init)
static void __exit iommu_debugfs_exit(void)
{
debugfs_remove_recursive(iommu_debug_root);
omap_foreach_iommu_device(NULL, iommu_debug_unregister);
}
module_exit(iommu_debugfs_exit)

3
drivers/iommu/omap-iommu.c
View File

@ -1223,7 +1223,8 @@ static int __init omap_iommu_init(void)
return platform_driver_register(&omap_iommu_driver);
}
module_init(omap_iommu_init);
/* must be ready before omap3isp is probed */
subsys_initcall(omap_iommu_init);
static void __exit omap_iommu_exit(void)
{

13
drivers/net/can/sja1000/sja1000.c
View File

@ -95,11 +95,16 @@ static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val)
spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
}
static int sja1000_is_absent(struct sja1000_priv *priv)
{
return (priv->read_reg(priv, REG_MOD) == 0xFF);
}
static int sja1000_probe_chip(struct net_device *dev)
{
struct sja1000_priv *priv = netdev_priv(dev);
if (priv->reg_base && (priv->read_reg(priv, 0) == 0xFF)) {
if (priv->reg_base && sja1000_is_absent(priv)) {
printk(KERN_INFO "%s: probing @0x%lX failed\n",
DRV_NAME, dev->base_addr);
return 0;
@ -493,6 +498,9 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
while ((isrc = priv->read_reg(priv, REG_IR)) && (n < SJA1000_MAX_IRQ)) {
n++;
status = priv->read_reg(priv, REG_SR);
/* check for absent controller due to hw unplug */
if (status == 0xFF && sja1000_is_absent(priv))
return IRQ_NONE;
if (isrc & IRQ_WUI)
dev_warn(dev->dev.parent, "wakeup interrupt\n");
@ -509,6 +517,9 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
while (status & SR_RBS) {
sja1000_rx(dev);
status = priv->read_reg(priv, REG_SR);
/* check for absent controller */
if (status == 0xFF && sja1000_is_absent(priv))
return IRQ_NONE;
}
}
if (isrc & (IRQ_DOI | IRQ_EI | IRQ_BEI | IRQ_EPI | IRQ_ALI)) {

4
drivers/net/ethernet/atheros/atl1c/atl1c_main.c
View File

@ -2244,10 +2244,6 @@ static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
dev_info(&adapter->pdev->dev, "tx locked\n");
return NETDEV_TX_LOCKED;
}
if (skb->mark == 0x01)
type = atl1c_trans_high;
else
type = atl1c_trans_normal;
if (atl1c_tpd_avail(adapter, type) < tpd_req) {
/* no enough descriptor, just stop queue */

2
drivers/net/ethernet/broadcom/b44.c
View File

@ -2339,7 +2339,7 @@ static inline int __init b44_pci_init(void)
return err;
}
static inline void __exit b44_pci_exit(void)
static inline void b44_pci_exit(void)
{
#ifdef CONFIG_B44_PCI
ssb_pcihost_unregister(&b44_pci_driver);

6
drivers/net/ethernet/broadcom/cnic.c
View File

@ -3584,7 +3584,11 @@ static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
fl6.flowi6_oif = dst_addr->sin6_scope_id;
*dst = ip6_route_output(&init_net, NULL, &fl6);
if (*dst)
if ((*dst)->error) {
dst_release(*dst);
*dst = NULL;
return -ENETUNREACH;
} else
return 0;
#endif

2
drivers/net/ethernet/cisco/enic/cq_enet_desc.h
View File

@ -157,7 +157,7 @@ static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
*fcoe_enc_error = (desc->flags &
CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
*fcoe_eof = (u8)((desc->checksum_fcoe >>
*fcoe_eof = (u8)((le16_to_cpu(desc->checksum_fcoe) >>
CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
*checksum = 0;

2
drivers/net/ethernet/cisco/enic/enic_pp.c
View File

@ -72,7 +72,7 @@ static int enic_set_port_profile(struct enic *enic, int vf)
struct enic_port_profile *pp;
struct vic_provinfo *vp;
const u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
const u16 os_type = htons(VIC_GENERIC_PROV_OS_TYPE_LINUX);
const __be16 os_type = htons(VIC_GENERIC_PROV_OS_TYPE_LINUX);
char uuid_str[38];
char client_mac_str[18];
u8 *client_mac;

10
drivers/net/ethernet/jme.c
View File

@ -2328,19 +2328,11 @@ jme_change_mtu(struct net_device *netdev, int new_mtu)
((new_mtu) < IPV6_MIN_MTU))
return -EINVAL;
if (new_mtu > 4000) {
jme->reg_rxcs &= ~RXCS_FIFOTHNP;
jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
jme_restart_rx_engine(jme);
} else {
jme->reg_rxcs &= ~RXCS_FIFOTHNP;
jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
jme_restart_rx_engine(jme);
}
netdev->mtu = new_mtu;
netdev_update_features(netdev);
jme_restart_rx_engine(jme);
jme_reset_link(jme);
return 0;

2
drivers/net/ethernet/jme.h
View File

@ -730,7 +730,7 @@ enum jme_rxcs_values {
RXCS_RETRYCNT_60 = 0x00000F00,
RXCS_DEFAULT = RXCS_FIFOTHTP_128T |
RXCS_FIFOTHNP_128QW |
RXCS_FIFOTHNP_16QW |
RXCS_DMAREQSZ_128B |
RXCS_RETRYGAP_256ns |
RXCS_RETRYCNT_32,

8
drivers/net/ethernet/mellanox/mlx4/eq.c
View File

@ -1036,7 +1036,7 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char* name, int * vector)
struct mlx4_priv *priv = mlx4_priv(dev);
int vec = 0, err = 0, i;
spin_lock(&priv->msix_ctl.pool_lock);
mutex_lock(&priv->msix_ctl.pool_lock);
for (i = 0; !vec && i < dev->caps.comp_pool; i++) {
if (~priv->msix_ctl.pool_bm & 1ULL << i) {
priv->msix_ctl.pool_bm |= 1ULL << i;
@ -1058,7 +1058,7 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char* name, int * vector)
eq_set_ci(&priv->eq_table.eq[vec], 1);
}
}
spin_unlock(&priv->msix_ctl.pool_lock);
mutex_unlock(&priv->msix_ctl.pool_lock);
if (vec) {
*vector = vec;
@ -1079,13 +1079,13 @@ void mlx4_release_eq(struct mlx4_dev *dev, int vec)
if (likely(i >= 0)) {
/*sanity check , making sure were not trying to free irq's
Belonging to a legacy EQ*/
spin_lock(&priv->msix_ctl.pool_lock);
mutex_lock(&priv->msix_ctl.pool_lock);
if (priv->msix_ctl.pool_bm & 1ULL << i) {
free_irq(priv->eq_table.eq[vec].irq,
&priv->eq_table.eq[vec]);
priv->msix_ctl.pool_bm &= ~(1ULL << i);
}
spin_unlock(&priv->msix_ctl.pool_lock);
mutex_unlock(&priv->msix_ctl.pool_lock);
}
}

10
drivers/net/ethernet/mellanox/mlx4/main.c
View File

@ -531,15 +531,14 @@ int mlx4_change_port_types(struct mlx4_dev *dev,
for (port = 0; port < dev->caps.num_ports; port++) {
/* Change the port type only if the new type is different
* from the current, and not set to Auto */
if (port_types[port] != dev->caps.port_type[port + 1]) {
if (port_types[port] != dev->caps.port_type[port + 1])
change = 1;
dev->caps.port_type[port + 1] = port_types[port];
}
}
if (change) {
mlx4_unregister_device(dev);
for (port = 1; port <= dev->caps.num_ports; port++) {
mlx4_CLOSE_PORT(dev, port);
dev->caps.port_type[port] = port_types[port - 1];
err = mlx4_SET_PORT(dev, port);
if (err) {
mlx4_err(dev, "Failed to set port %d, "
@ -986,6 +985,9 @@ static int map_bf_area(struct mlx4_dev *dev)
resource_size_t bf_len;
int err = 0;
if (!dev->caps.bf_reg_size)
return -ENXIO;
bf_start = pci_resource_start(dev->pdev, 2) +
(dev->caps.num_uars << PAGE_SHIFT);
bf_len = pci_resource_len(dev->pdev, 2) -
@ -1825,7 +1827,7 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
goto err_master_mfunc;
priv->msix_ctl.pool_bm = 0;
spin_lock_init(&priv->msix_ctl.pool_lock);
mutex_init(&priv->msix_ctl.pool_lock);
mlx4_enable_msi_x(dev);
if ((mlx4_is_mfunc(dev)) &&

2
drivers/net/ethernet/mellanox/mlx4/mlx4.h
View File

@ -697,7 +697,7 @@ struct mlx4_sense {
struct mlx4_msix_ctl {
u64 pool_bm;
spinlock_t pool_lock;
struct mutex pool_lock;
};
struct mlx4_steer {

2
drivers/net/ethernet/micrel/ks8851_mll.c
View File

@ -1545,7 +1545,7 @@ static int __devinit ks8851_probe(struct platform_device *pdev)
netdev->irq = platform_get_irq(pdev, 0);
if (netdev->irq < 0) {
if ((int)netdev->irq < 0) {
err = netdev->irq;
goto err_get_irq;
}

4
drivers/net/ethernet/sfc/rx.c
View File

@ -156,11 +156,10 @@ static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
if (unlikely(!skb))
return -ENOMEM;
/* Adjust the SKB for padding and checksum */
/* Adjust the SKB for padding */
skb_reserve(skb, NET_IP_ALIGN);
rx_buf->len = skb_len - NET_IP_ALIGN;
rx_buf->is_page = false;
skb->ip_summed = CHECKSUM_UNNECESSARY;
rx_buf->dma_addr = pci_map_single(efx->pci_dev,
skb->data, rx_buf->len,
@ -496,6 +495,7 @@ static void efx_rx_packet_gro(struct efx_channel *channel,
EFX_BUG_ON_PARANOID(!checksummed);
rx_buf->u.skb = NULL;
skb->ip_summed = CHECKSUM_UNNECESSARY;
gro_result = napi_gro_receive(napi, skb);
}

6
drivers/net/ethernet/ti/davinci_emac.c
View File

@ -1009,7 +1009,7 @@ static void emac_rx_handler(void *token, int len, int status)
int ret;
/* free and bail if we are shutting down */
if (unlikely(!netif_running(ndev) || !netif_carrier_ok(ndev))) {
if (unlikely(!netif_running(ndev))) {
dev_kfree_skb_any(skb);
return;
}
@ -1038,7 +1038,9 @@ static void emac_rx_handler(void *token, int len, int status)
recycle:
ret = cpdma_chan_submit(priv->rxchan, skb, skb->data,
skb_tailroom(skb), GFP_KERNEL);
if (WARN_ON(ret < 0))
WARN_ON(ret == -ENOMEM);
if (unlikely(ret < 0))
dev_kfree_skb_any(skb);
}

55
drivers/net/phy/icplus.c
View File

@ -30,16 +30,16 @@
#include <asm/irq.h>
#include <asm/uaccess.h>
MODULE_DESCRIPTION("ICPlus IP175C/IP101A/IC1001 PHY drivers");
MODULE_DESCRIPTION("ICPlus IP175C/IP101A/IP101G/IC1001 PHY drivers");
MODULE_AUTHOR("Michael Barkowski");
MODULE_LICENSE("GPL");
/* IP101A/IP1001 */
#define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */
#define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */
#define IP1001_PHASE_SEL_MASK 3 /* IP1001 RX/TXPHASE_SEL */
#define IP1001_APS_ON 11 /* IP1001 APS Mode bit */
#define IP101A_APS_ON 2 /* IP101A APS Mode bit */
/* IP101A/G - IP1001 */
#define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */
#define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */
#define IP1001_PHASE_SEL_MASK 3 /* IP1001 RX/TXPHASE_SEL */
#define IP1001_APS_ON 11 /* IP1001 APS Mode bit */
#define IP101A_G_APS_ON 2 /* IP101A/G APS Mode bit */
static int ip175c_config_init(struct phy_device *phydev)
{
@ -98,20 +98,24 @@ static int ip175c_config_init(struct phy_device *phydev)
static int ip1xx_reset(struct phy_device *phydev)
{
int err, bmcr;
int bmcr;
/* Software Reset PHY */
bmcr = phy_read(phydev, MII_BMCR);
if (bmcr < 0)
return bmcr;
bmcr |= BMCR_RESET;
err = phy_write(phydev, MII_BMCR, bmcr);
if (err < 0)
return err;
bmcr = phy_write(phydev, MII_BMCR, bmcr);
if (bmcr < 0)
return bmcr;
do {
bmcr = phy_read(phydev, MII_BMCR);
if (bmcr < 0)
return bmcr;
} while (bmcr & BMCR_RESET);
return err;
return 0;
}
static int ip1001_config_init(struct phy_device *phydev)
@ -124,7 +128,10 @@ static int ip1001_config_init(struct phy_device *phydev)
/* Enable Auto Power Saving mode */
c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
if (c < 0)
return c;
c |= IP1001_APS_ON;
c = phy_write(phydev, IP1001_SPEC_CTRL_STATUS_2, c);
if (c < 0)
return c;
@ -132,14 +139,19 @@ static int ip1001_config_init(struct phy_device *phydev)
/* Additional delay (2ns) used to adjust RX clock phase
* at RGMII interface */
c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
if (c < 0)
return c;
c |= IP1001_PHASE_SEL_MASK;
c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
if (c < 0)
return c;
}
return c;
return 0;
}
static int ip101a_config_init(struct phy_device *phydev)
static int ip101a_g_config_init(struct phy_device *phydev)
{
int c;
@ -149,7 +161,7 @@ static int ip101a_config_init(struct phy_device *phydev)
/* Enable Auto Power Saving mode */
c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
c |= IP101A_APS_ON;
c |= IP101A_G_APS_ON;
return c;
}
@ -191,6 +203,7 @@ static struct phy_driver ip1001_driver = {
.phy_id_mask = 0x0ffffff0,
.features = PHY_GBIT_FEATURES | SUPPORTED_Pause |
SUPPORTED_Asym_Pause,
.flags = PHY_HAS_INTERRUPT,
.config_init = &ip1001_config_init,
.config_aneg = &genphy_config_aneg,
.read_status = &genphy_read_status,
@ -199,13 +212,14 @@ static struct phy_driver ip1001_driver = {
.driver = { .owner = THIS_MODULE,},
};
static struct phy_driver ip101a_driver = {
static struct phy_driver ip101a_g_driver = {
.phy_id = 0x02430c54,
.name = "ICPlus IP101A",
.name = "ICPlus IP101A/G",
.phy_id_mask = 0x0ffffff0,
.features = PHY_BASIC_FEATURES | SUPPORTED_Pause |
SUPPORTED_Asym_Pause,
.config_init = &ip101a_config_init,
.flags = PHY_HAS_INTERRUPT,
.config_init = &ip101a_g_config_init,
.config_aneg = &genphy_config_aneg,
.read_status = &genphy_read_status,
.suspend = genphy_suspend,
@ -221,7 +235,7 @@ static int __init icplus_init(void)
if (ret < 0)
return -ENODEV;
ret = phy_driver_register(&ip101a_driver);
ret = phy_driver_register(&ip101a_g_driver);
if (ret < 0)
return -ENODEV;
@ -231,7 +245,7 @@ static int __init icplus_init(void)
static void __exit icplus_exit(void)
{
phy_driver_unregister(&ip1001_driver);
phy_driver_unregister(&ip101a_driver);
phy_driver_unregister(&ip101a_g_driver);
phy_driver_unregister(&ip175c_driver);
}
@ -241,6 +255,7 @@ module_exit(icplus_exit);
static struct mdio_device_id __maybe_unused icplus_tbl[] = {
{ 0x02430d80, 0x0ffffff0 },
{ 0x02430d90, 0x0ffffff0 },
{ 0x02430c54, 0x0ffffff0 },
{ }
};

23
drivers/net/ppp/ppp_generic.c
View File

@ -2024,14 +2024,22 @@ ppp_mp_reconstruct(struct ppp *ppp)
continue;
}
if (PPP_MP_CB(p)->sequence != seq) {
u32 oldseq;
/* Fragment `seq' is missing. If it is after
minseq, it might arrive later, so stop here. */
if (seq_after(seq, minseq))
break;
/* Fragment `seq' is lost, keep going. */
lost = 1;
oldseq = seq;
seq = seq_before(minseq, PPP_MP_CB(p)->sequence)?
minseq + 1: PPP_MP_CB(p)->sequence;
if (ppp->debug & 1)
netdev_printk(KERN_DEBUG, ppp->dev,
"lost frag %u..%u\n",
oldseq, seq-1);
goto again;
}
@ -2076,6 +2084,10 @@ ppp_mp_reconstruct(struct ppp *ppp)
struct sk_buff *tmp2;
skb_queue_reverse_walk_from_safe(list, p, tmp2) {
if (ppp->debug & 1)
netdev_printk(KERN_DEBUG, ppp->dev,
"discarding frag %u\n",
PPP_MP_CB(p)->sequence);
__skb_unlink(p, list);
kfree_skb(p);
}
@ -2091,6 +2103,17 @@ ppp_mp_reconstruct(struct ppp *ppp)
/* If we have discarded any fragments,
signal a receive error. */
if (PPP_MP_CB(head)->sequence != ppp->nextseq) {
skb_queue_walk_safe(list, p, tmp) {
if (p == head)
break;
if (ppp->debug & 1)
netdev_printk(KERN_DEBUG, ppp->dev,
"discarding frag %u\n",
PPP_MP_CB(p)->sequence);
__skb_unlink(p, list);
kfree_skb(p);
}
if (ppp->debug & 1)
netdev_printk(KERN_DEBUG, ppp->dev,
" missed pkts %u..%u\n",

7
drivers/net/usb/cdc_ether.c
View File

@ -573,6 +573,13 @@ static const struct usb_device_id products [] = {
.driver_info = 0,
},
/* Logitech Harmony 900 - uses the pseudo-MDLM (BLAN) driver */
{
USB_DEVICE_AND_INTERFACE_INFO(0x046d, 0xc11f, USB_CLASS_COMM,
USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
.driver_info = 0,
},
/*
* WHITELIST!!!
*

2
drivers/net/usb/hso.c
View File

@ -1632,7 +1632,7 @@ static int hso_get_count(struct tty_struct *tty,
struct hso_serial *serial = get_serial_by_tty(tty);
struct hso_tiocmget *tiocmget = serial->tiocmget;
memset(&icount, 0, sizeof(struct serial_icounter_struct));
memset(icount, 0, sizeof(struct serial_icounter_struct));
if (!tiocmget)
return -ENOENT;

Some files were not shown because too many files have changed in this diff Show More